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Avi Kivity6aa8b732006-12-10 02:21:36 -08001/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * Copyright (C) 2006 Qumranet, Inc.
Nicolas Kaiser9611c182010-10-06 14:23:22 +02008 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
Avi Kivity6aa8b732006-12-10 02:21:36 -08009 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 *
14 * This work is licensed under the terms of the GNU GPL, version 2. See
15 * the COPYING file in the top-level directory.
16 *
17 */
18
Eddie Dong85f455f2007-07-06 12:20:49 +030019#include "irq.h"
Zhang Xiantao1d737c82007-12-14 09:35:10 +080020#include "mmu.h"
Avi Kivity00b27a32011-11-23 16:30:32 +020021#include "cpuid.h"
Avi Kivitye4956062007-06-28 14:15:57 -040022
Avi Kivityedf88412007-12-16 11:02:48 +020023#include <linux/kvm_host.h>
Avi Kivity6aa8b732006-12-10 02:21:36 -080024#include <linux/module.h>
Ahmed S. Darwish9d8f5492007-02-19 14:37:46 +020025#include <linux/kernel.h>
Avi Kivity6aa8b732006-12-10 02:21:36 -080026#include <linux/mm.h>
27#include <linux/highmem.h>
Alexey Dobriyane8edc6e2007-05-21 01:22:52 +040028#include <linux/sched.h>
Avi Kivityc7addb92007-09-16 18:58:32 +020029#include <linux/moduleparam.h>
Josh Triplette9bda3b2012-03-20 23:33:51 -070030#include <linux/mod_devicetable.h>
Marcelo Tosatti229456f2009-06-17 09:22:14 -030031#include <linux/ftrace_event.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090032#include <linux/slab.h>
Shane Wangcafd6652010-04-29 12:09:01 -040033#include <linux/tboot.h>
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -030034#include "kvm_cache_regs.h"
Avi Kivity35920a32008-07-03 14:50:12 +030035#include "x86.h"
Avi Kivitye4956062007-06-28 14:15:57 -040036
Avi Kivity6aa8b732006-12-10 02:21:36 -080037#include <asm/io.h>
Anthony Liguori3b3be0d2006-12-13 00:33:43 -080038#include <asm/desc.h>
Eduardo Habkost13673a92008-11-17 19:03:13 -020039#include <asm/vmx.h>
Eduardo Habkost6210e372008-11-17 19:03:16 -020040#include <asm/virtext.h>
Andi Kleena0861c02009-06-08 17:37:09 +080041#include <asm/mce.h>
Dexuan Cui2acf9232010-06-10 11:27:12 +080042#include <asm/i387.h>
43#include <asm/xcr.h>
Gleb Natapovd7cd9792011-10-05 14:01:23 +020044#include <asm/perf_event.h>
Avi Kivity6aa8b732006-12-10 02:21:36 -080045
Marcelo Tosatti229456f2009-06-17 09:22:14 -030046#include "trace.h"
47
Avi Kivity4ecac3f2008-05-13 13:23:38 +030048#define __ex(x) __kvm_handle_fault_on_reboot(x)
Avi Kivity5e520e62011-05-15 10:13:12 -040049#define __ex_clear(x, reg) \
50 ____kvm_handle_fault_on_reboot(x, "xor " reg " , " reg)
Avi Kivity4ecac3f2008-05-13 13:23:38 +030051
Avi Kivity6aa8b732006-12-10 02:21:36 -080052MODULE_AUTHOR("Qumranet");
53MODULE_LICENSE("GPL");
54
Josh Triplette9bda3b2012-03-20 23:33:51 -070055static const struct x86_cpu_id vmx_cpu_id[] = {
56 X86_FEATURE_MATCH(X86_FEATURE_VMX),
57 {}
58};
59MODULE_DEVICE_TABLE(x86cpu, vmx_cpu_id);
60
Rusty Russell476bc002012-01-13 09:32:18 +103061static bool __read_mostly enable_vpid = 1;
Avi Kivity736caef2009-03-23 17:39:48 +020062module_param_named(vpid, enable_vpid, bool, 0444);
Sheng Yang2384d2b2008-01-17 15:14:33 +080063
Rusty Russell476bc002012-01-13 09:32:18 +103064static bool __read_mostly flexpriority_enabled = 1;
Avi Kivity736caef2009-03-23 17:39:48 +020065module_param_named(flexpriority, flexpriority_enabled, bool, S_IRUGO);
Avi Kivity4c9fc8e2008-03-24 18:15:14 +020066
Rusty Russell476bc002012-01-13 09:32:18 +103067static bool __read_mostly enable_ept = 1;
Avi Kivity736caef2009-03-23 17:39:48 +020068module_param_named(ept, enable_ept, bool, S_IRUGO);
Sheng Yangd56f5462008-04-25 10:13:16 +080069
Rusty Russell476bc002012-01-13 09:32:18 +103070static bool __read_mostly enable_unrestricted_guest = 1;
Nitin A Kamble3a624e22009-06-08 11:34:16 -070071module_param_named(unrestricted_guest,
72 enable_unrestricted_guest, bool, S_IRUGO);
73
Xudong Hao83c3a332012-05-28 19:33:35 +080074static bool __read_mostly enable_ept_ad_bits = 1;
75module_param_named(eptad, enable_ept_ad_bits, bool, S_IRUGO);
76
Avi Kivitya27685c2012-06-12 20:30:18 +030077static bool __read_mostly emulate_invalid_guest_state = true;
Avi Kivityc1f8bc02009-03-23 15:41:17 +020078module_param(emulate_invalid_guest_state, bool, S_IRUGO);
Mohammed Gamal04fa4d32008-08-17 16:39:48 +030079
Rusty Russell476bc002012-01-13 09:32:18 +103080static bool __read_mostly vmm_exclusive = 1;
Dongxiao Xub923e622010-05-11 18:29:45 +080081module_param(vmm_exclusive, bool, S_IRUGO);
82
Rusty Russell476bc002012-01-13 09:32:18 +103083static bool __read_mostly fasteoi = 1;
Kevin Tian58fbbf22011-08-30 13:56:17 +030084module_param(fasteoi, bool, S_IRUGO);
85
Nadav Har'El801d3422011-05-25 23:02:23 +030086/*
87 * If nested=1, nested virtualization is supported, i.e., guests may use
88 * VMX and be a hypervisor for its own guests. If nested=0, guests may not
89 * use VMX instructions.
90 */
Rusty Russell476bc002012-01-13 09:32:18 +103091static bool __read_mostly nested = 0;
Nadav Har'El801d3422011-05-25 23:02:23 +030092module_param(nested, bool, S_IRUGO);
93
Avi Kivitycdc0e242009-12-06 17:21:14 +020094#define KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST \
95 (X86_CR0_WP | X86_CR0_NE | X86_CR0_NW | X86_CR0_CD)
96#define KVM_GUEST_CR0_MASK \
97 (KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
98#define KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST \
Avi Kivity81231c62010-01-24 16:26:40 +020099 (X86_CR0_WP | X86_CR0_NE)
Avi Kivitycdc0e242009-12-06 17:21:14 +0200100#define KVM_VM_CR0_ALWAYS_ON \
101 (KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
Avi Kivity4c386092009-12-07 12:26:18 +0200102#define KVM_CR4_GUEST_OWNED_BITS \
103 (X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR \
104 | X86_CR4_OSXMMEXCPT)
105
Avi Kivitycdc0e242009-12-06 17:21:14 +0200106#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
107#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
108
Avi Kivity78ac8b42010-04-08 18:19:35 +0300109#define RMODE_GUEST_OWNED_EFLAGS_BITS (~(X86_EFLAGS_IOPL | X86_EFLAGS_VM))
110
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +0800111/*
112 * These 2 parameters are used to config the controls for Pause-Loop Exiting:
113 * ple_gap: upper bound on the amount of time between two successive
114 * executions of PAUSE in a loop. Also indicate if ple enabled.
Rik van Riel00c25bc2011-01-04 09:51:33 -0500115 * According to test, this time is usually smaller than 128 cycles.
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +0800116 * ple_window: upper bound on the amount of time a guest is allowed to execute
117 * in a PAUSE loop. Tests indicate that most spinlocks are held for
118 * less than 2^12 cycles
119 * Time is measured based on a counter that runs at the same rate as the TSC,
120 * refer SDM volume 3b section 21.6.13 & 22.1.3.
121 */
Rik van Riel00c25bc2011-01-04 09:51:33 -0500122#define KVM_VMX_DEFAULT_PLE_GAP 128
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +0800123#define KVM_VMX_DEFAULT_PLE_WINDOW 4096
124static int ple_gap = KVM_VMX_DEFAULT_PLE_GAP;
125module_param(ple_gap, int, S_IRUGO);
126
127static int ple_window = KVM_VMX_DEFAULT_PLE_WINDOW;
128module_param(ple_window, int, S_IRUGO);
129
Gleb Natapov8bf00a52011-10-05 14:01:22 +0200130#define NR_AUTOLOAD_MSRS 8
Nadav Har'Elff2f6fe2011-05-25 23:05:27 +0300131#define VMCS02_POOL_SIZE 1
Avi Kivity61d2ef22010-04-28 16:40:38 +0300132
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400133struct vmcs {
134 u32 revision_id;
135 u32 abort;
136 char data[0];
137};
138
Nadav Har'Eld462b812011-05-24 15:26:10 +0300139/*
140 * Track a VMCS that may be loaded on a certain CPU. If it is (cpu!=-1), also
141 * remember whether it was VMLAUNCHed, and maintain a linked list of all VMCSs
142 * loaded on this CPU (so we can clear them if the CPU goes down).
143 */
144struct loaded_vmcs {
145 struct vmcs *vmcs;
146 int cpu;
147 int launched;
148 struct list_head loaded_vmcss_on_cpu_link;
149};
150
Avi Kivity26bb0982009-09-07 11:14:12 +0300151struct shared_msr_entry {
152 unsigned index;
153 u64 data;
Avi Kivityd5696722009-12-02 12:28:47 +0200154 u64 mask;
Avi Kivity26bb0982009-09-07 11:14:12 +0300155};
156
Nadav Har'Elec378ae2011-05-25 23:02:54 +0300157/*
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300158 * struct vmcs12 describes the state that our guest hypervisor (L1) keeps for a
159 * single nested guest (L2), hence the name vmcs12. Any VMX implementation has
160 * a VMCS structure, and vmcs12 is our emulated VMX's VMCS. This structure is
161 * stored in guest memory specified by VMPTRLD, but is opaque to the guest,
162 * which must access it using VMREAD/VMWRITE/VMCLEAR instructions.
163 * More than one of these structures may exist, if L1 runs multiple L2 guests.
164 * nested_vmx_run() will use the data here to build a vmcs02: a VMCS for the
165 * underlying hardware which will be used to run L2.
166 * This structure is packed to ensure that its layout is identical across
167 * machines (necessary for live migration).
168 * If there are changes in this struct, VMCS12_REVISION must be changed.
169 */
Nadav Har'El22bd0352011-05-25 23:05:57 +0300170typedef u64 natural_width;
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300171struct __packed vmcs12 {
172 /* According to the Intel spec, a VMCS region must start with the
173 * following two fields. Then follow implementation-specific data.
174 */
175 u32 revision_id;
176 u32 abort;
Nadav Har'El22bd0352011-05-25 23:05:57 +0300177
Nadav Har'El27d6c862011-05-25 23:06:59 +0300178 u32 launch_state; /* set to 0 by VMCLEAR, to 1 by VMLAUNCH */
179 u32 padding[7]; /* room for future expansion */
180
Nadav Har'El22bd0352011-05-25 23:05:57 +0300181 u64 io_bitmap_a;
182 u64 io_bitmap_b;
183 u64 msr_bitmap;
184 u64 vm_exit_msr_store_addr;
185 u64 vm_exit_msr_load_addr;
186 u64 vm_entry_msr_load_addr;
187 u64 tsc_offset;
188 u64 virtual_apic_page_addr;
189 u64 apic_access_addr;
190 u64 ept_pointer;
191 u64 guest_physical_address;
192 u64 vmcs_link_pointer;
193 u64 guest_ia32_debugctl;
194 u64 guest_ia32_pat;
195 u64 guest_ia32_efer;
196 u64 guest_ia32_perf_global_ctrl;
197 u64 guest_pdptr0;
198 u64 guest_pdptr1;
199 u64 guest_pdptr2;
200 u64 guest_pdptr3;
201 u64 host_ia32_pat;
202 u64 host_ia32_efer;
203 u64 host_ia32_perf_global_ctrl;
204 u64 padding64[8]; /* room for future expansion */
205 /*
206 * To allow migration of L1 (complete with its L2 guests) between
207 * machines of different natural widths (32 or 64 bit), we cannot have
208 * unsigned long fields with no explict size. We use u64 (aliased
209 * natural_width) instead. Luckily, x86 is little-endian.
210 */
211 natural_width cr0_guest_host_mask;
212 natural_width cr4_guest_host_mask;
213 natural_width cr0_read_shadow;
214 natural_width cr4_read_shadow;
215 natural_width cr3_target_value0;
216 natural_width cr3_target_value1;
217 natural_width cr3_target_value2;
218 natural_width cr3_target_value3;
219 natural_width exit_qualification;
220 natural_width guest_linear_address;
221 natural_width guest_cr0;
222 natural_width guest_cr3;
223 natural_width guest_cr4;
224 natural_width guest_es_base;
225 natural_width guest_cs_base;
226 natural_width guest_ss_base;
227 natural_width guest_ds_base;
228 natural_width guest_fs_base;
229 natural_width guest_gs_base;
230 natural_width guest_ldtr_base;
231 natural_width guest_tr_base;
232 natural_width guest_gdtr_base;
233 natural_width guest_idtr_base;
234 natural_width guest_dr7;
235 natural_width guest_rsp;
236 natural_width guest_rip;
237 natural_width guest_rflags;
238 natural_width guest_pending_dbg_exceptions;
239 natural_width guest_sysenter_esp;
240 natural_width guest_sysenter_eip;
241 natural_width host_cr0;
242 natural_width host_cr3;
243 natural_width host_cr4;
244 natural_width host_fs_base;
245 natural_width host_gs_base;
246 natural_width host_tr_base;
247 natural_width host_gdtr_base;
248 natural_width host_idtr_base;
249 natural_width host_ia32_sysenter_esp;
250 natural_width host_ia32_sysenter_eip;
251 natural_width host_rsp;
252 natural_width host_rip;
253 natural_width paddingl[8]; /* room for future expansion */
254 u32 pin_based_vm_exec_control;
255 u32 cpu_based_vm_exec_control;
256 u32 exception_bitmap;
257 u32 page_fault_error_code_mask;
258 u32 page_fault_error_code_match;
259 u32 cr3_target_count;
260 u32 vm_exit_controls;
261 u32 vm_exit_msr_store_count;
262 u32 vm_exit_msr_load_count;
263 u32 vm_entry_controls;
264 u32 vm_entry_msr_load_count;
265 u32 vm_entry_intr_info_field;
266 u32 vm_entry_exception_error_code;
267 u32 vm_entry_instruction_len;
268 u32 tpr_threshold;
269 u32 secondary_vm_exec_control;
270 u32 vm_instruction_error;
271 u32 vm_exit_reason;
272 u32 vm_exit_intr_info;
273 u32 vm_exit_intr_error_code;
274 u32 idt_vectoring_info_field;
275 u32 idt_vectoring_error_code;
276 u32 vm_exit_instruction_len;
277 u32 vmx_instruction_info;
278 u32 guest_es_limit;
279 u32 guest_cs_limit;
280 u32 guest_ss_limit;
281 u32 guest_ds_limit;
282 u32 guest_fs_limit;
283 u32 guest_gs_limit;
284 u32 guest_ldtr_limit;
285 u32 guest_tr_limit;
286 u32 guest_gdtr_limit;
287 u32 guest_idtr_limit;
288 u32 guest_es_ar_bytes;
289 u32 guest_cs_ar_bytes;
290 u32 guest_ss_ar_bytes;
291 u32 guest_ds_ar_bytes;
292 u32 guest_fs_ar_bytes;
293 u32 guest_gs_ar_bytes;
294 u32 guest_ldtr_ar_bytes;
295 u32 guest_tr_ar_bytes;
296 u32 guest_interruptibility_info;
297 u32 guest_activity_state;
298 u32 guest_sysenter_cs;
299 u32 host_ia32_sysenter_cs;
300 u32 padding32[8]; /* room for future expansion */
301 u16 virtual_processor_id;
302 u16 guest_es_selector;
303 u16 guest_cs_selector;
304 u16 guest_ss_selector;
305 u16 guest_ds_selector;
306 u16 guest_fs_selector;
307 u16 guest_gs_selector;
308 u16 guest_ldtr_selector;
309 u16 guest_tr_selector;
310 u16 host_es_selector;
311 u16 host_cs_selector;
312 u16 host_ss_selector;
313 u16 host_ds_selector;
314 u16 host_fs_selector;
315 u16 host_gs_selector;
316 u16 host_tr_selector;
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300317};
318
319/*
320 * VMCS12_REVISION is an arbitrary id that should be changed if the content or
321 * layout of struct vmcs12 is changed. MSR_IA32_VMX_BASIC returns this id, and
322 * VMPTRLD verifies that the VMCS region that L1 is loading contains this id.
323 */
324#define VMCS12_REVISION 0x11e57ed0
325
326/*
327 * VMCS12_SIZE is the number of bytes L1 should allocate for the VMXON region
328 * and any VMCS region. Although only sizeof(struct vmcs12) are used by the
329 * current implementation, 4K are reserved to avoid future complications.
330 */
331#define VMCS12_SIZE 0x1000
332
Nadav Har'Elff2f6fe2011-05-25 23:05:27 +0300333/* Used to remember the last vmcs02 used for some recently used vmcs12s */
334struct vmcs02_list {
335 struct list_head list;
336 gpa_t vmptr;
337 struct loaded_vmcs vmcs02;
338};
339
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300340/*
Nadav Har'Elec378ae2011-05-25 23:02:54 +0300341 * The nested_vmx structure is part of vcpu_vmx, and holds information we need
342 * for correct emulation of VMX (i.e., nested VMX) on this vcpu.
343 */
344struct nested_vmx {
345 /* Has the level1 guest done vmxon? */
346 bool vmxon;
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300347
348 /* The guest-physical address of the current VMCS L1 keeps for L2 */
349 gpa_t current_vmptr;
350 /* The host-usable pointer to the above */
351 struct page *current_vmcs12_page;
352 struct vmcs12 *current_vmcs12;
Nadav Har'Elff2f6fe2011-05-25 23:05:27 +0300353
354 /* vmcs02_list cache of VMCSs recently used to run L2 guests */
355 struct list_head vmcs02_pool;
356 int vmcs02_num;
Nadav Har'Elfe3ef052011-05-25 23:10:02 +0300357 u64 vmcs01_tsc_offset;
Nadav Har'El644d7112011-05-25 23:12:35 +0300358 /* L2 must run next, and mustn't decide to exit to L1. */
359 bool nested_run_pending;
Nadav Har'Elfe3ef052011-05-25 23:10:02 +0300360 /*
361 * Guest pages referred to in vmcs02 with host-physical pointers, so
362 * we must keep them pinned while L2 runs.
363 */
364 struct page *apic_access_page;
Nadav Har'Elec378ae2011-05-25 23:02:54 +0300365};
366
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400367struct vcpu_vmx {
Rusty Russellfb3f0f52007-07-27 17:16:56 +1000368 struct kvm_vcpu vcpu;
Avi Kivity313dbd42008-07-17 18:04:30 +0300369 unsigned long host_rsp;
Avi Kivity29bd8a72007-09-10 17:27:03 +0300370 u8 fail;
Avi Kivity69c73022011-03-07 15:26:44 +0200371 u8 cpl;
Avi Kivity9d58b932011-03-07 16:52:07 +0200372 bool nmi_known_unmasked;
Avi Kivity51aa01d2010-07-20 14:31:20 +0300373 u32 exit_intr_info;
Avi Kivity1155f762007-11-22 11:30:47 +0200374 u32 idt_vectoring_info;
Avi Kivity6de12732011-03-07 12:51:22 +0200375 ulong rflags;
Avi Kivity26bb0982009-09-07 11:14:12 +0300376 struct shared_msr_entry *guest_msrs;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400377 int nmsrs;
378 int save_nmsrs;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400379#ifdef CONFIG_X86_64
Avi Kivity44ea2b12009-09-06 15:55:37 +0300380 u64 msr_host_kernel_gs_base;
381 u64 msr_guest_kernel_gs_base;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400382#endif
Nadav Har'Eld462b812011-05-24 15:26:10 +0300383 /*
384 * loaded_vmcs points to the VMCS currently used in this vcpu. For a
385 * non-nested (L1) guest, it always points to vmcs01. For a nested
386 * guest (L2), it points to a different VMCS.
387 */
388 struct loaded_vmcs vmcs01;
389 struct loaded_vmcs *loaded_vmcs;
390 bool __launched; /* temporary, used in vmx_vcpu_run */
Avi Kivity61d2ef22010-04-28 16:40:38 +0300391 struct msr_autoload {
392 unsigned nr;
393 struct vmx_msr_entry guest[NR_AUTOLOAD_MSRS];
394 struct vmx_msr_entry host[NR_AUTOLOAD_MSRS];
395 } msr_autoload;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400396 struct {
397 int loaded;
398 u16 fs_sel, gs_sel, ldt_sel;
Avi Kivityb2da15a2012-05-13 19:53:24 +0300399#ifdef CONFIG_X86_64
400 u16 ds_sel, es_sel;
401#endif
Laurent Vivier152d3f22007-08-23 16:33:11 +0200402 int gs_ldt_reload_needed;
403 int fs_reload_needed;
Mike Dayd77c26f2007-10-08 09:02:08 -0400404 } host_state;
Avi Kivity9c8cba32007-11-22 11:42:59 +0200405 struct {
Avi Kivity7ffd92c2009-06-09 14:10:45 +0300406 int vm86_active;
Avi Kivity78ac8b42010-04-08 18:19:35 +0300407 ulong save_rflags;
Avi Kivity7ffd92c2009-06-09 14:10:45 +0300408 struct kvm_save_segment {
409 u16 selector;
410 unsigned long base;
411 u32 limit;
412 u32 ar;
413 } tr, es, ds, fs, gs;
Avi Kivity9c8cba32007-11-22 11:42:59 +0200414 } rmode;
Avi Kivity2fb92db2011-04-27 19:42:18 +0300415 struct {
416 u32 bitmask; /* 4 bits per segment (1 bit per field) */
417 struct kvm_save_segment seg[8];
418 } segment_cache;
Sheng Yang2384d2b2008-01-17 15:14:33 +0800419 int vpid;
Mohammed Gamal04fa4d32008-08-17 16:39:48 +0300420 bool emulation_required;
Jan Kiszka3b86cd92008-09-26 09:30:57 +0200421
422 /* Support for vnmi-less CPUs */
423 int soft_vnmi_blocked;
424 ktime_t entry_time;
425 s64 vnmi_blocked_time;
Andi Kleena0861c02009-06-08 17:37:09 +0800426 u32 exit_reason;
Sheng Yang4e47c7a2009-12-18 16:48:47 +0800427
428 bool rdtscp_enabled;
Nadav Har'Elec378ae2011-05-25 23:02:54 +0300429
430 /* Support for a guest hypervisor (nested VMX) */
431 struct nested_vmx nested;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400432};
433
Avi Kivity2fb92db2011-04-27 19:42:18 +0300434enum segment_cache_field {
435 SEG_FIELD_SEL = 0,
436 SEG_FIELD_BASE = 1,
437 SEG_FIELD_LIMIT = 2,
438 SEG_FIELD_AR = 3,
439
440 SEG_FIELD_NR = 4
441};
442
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400443static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
444{
Rusty Russellfb3f0f52007-07-27 17:16:56 +1000445 return container_of(vcpu, struct vcpu_vmx, vcpu);
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400446}
447
Nadav Har'El22bd0352011-05-25 23:05:57 +0300448#define VMCS12_OFFSET(x) offsetof(struct vmcs12, x)
449#define FIELD(number, name) [number] = VMCS12_OFFSET(name)
450#define FIELD64(number, name) [number] = VMCS12_OFFSET(name), \
451 [number##_HIGH] = VMCS12_OFFSET(name)+4
452
453static unsigned short vmcs_field_to_offset_table[] = {
454 FIELD(VIRTUAL_PROCESSOR_ID, virtual_processor_id),
455 FIELD(GUEST_ES_SELECTOR, guest_es_selector),
456 FIELD(GUEST_CS_SELECTOR, guest_cs_selector),
457 FIELD(GUEST_SS_SELECTOR, guest_ss_selector),
458 FIELD(GUEST_DS_SELECTOR, guest_ds_selector),
459 FIELD(GUEST_FS_SELECTOR, guest_fs_selector),
460 FIELD(GUEST_GS_SELECTOR, guest_gs_selector),
461 FIELD(GUEST_LDTR_SELECTOR, guest_ldtr_selector),
462 FIELD(GUEST_TR_SELECTOR, guest_tr_selector),
463 FIELD(HOST_ES_SELECTOR, host_es_selector),
464 FIELD(HOST_CS_SELECTOR, host_cs_selector),
465 FIELD(HOST_SS_SELECTOR, host_ss_selector),
466 FIELD(HOST_DS_SELECTOR, host_ds_selector),
467 FIELD(HOST_FS_SELECTOR, host_fs_selector),
468 FIELD(HOST_GS_SELECTOR, host_gs_selector),
469 FIELD(HOST_TR_SELECTOR, host_tr_selector),
470 FIELD64(IO_BITMAP_A, io_bitmap_a),
471 FIELD64(IO_BITMAP_B, io_bitmap_b),
472 FIELD64(MSR_BITMAP, msr_bitmap),
473 FIELD64(VM_EXIT_MSR_STORE_ADDR, vm_exit_msr_store_addr),
474 FIELD64(VM_EXIT_MSR_LOAD_ADDR, vm_exit_msr_load_addr),
475 FIELD64(VM_ENTRY_MSR_LOAD_ADDR, vm_entry_msr_load_addr),
476 FIELD64(TSC_OFFSET, tsc_offset),
477 FIELD64(VIRTUAL_APIC_PAGE_ADDR, virtual_apic_page_addr),
478 FIELD64(APIC_ACCESS_ADDR, apic_access_addr),
479 FIELD64(EPT_POINTER, ept_pointer),
480 FIELD64(GUEST_PHYSICAL_ADDRESS, guest_physical_address),
481 FIELD64(VMCS_LINK_POINTER, vmcs_link_pointer),
482 FIELD64(GUEST_IA32_DEBUGCTL, guest_ia32_debugctl),
483 FIELD64(GUEST_IA32_PAT, guest_ia32_pat),
484 FIELD64(GUEST_IA32_EFER, guest_ia32_efer),
485 FIELD64(GUEST_IA32_PERF_GLOBAL_CTRL, guest_ia32_perf_global_ctrl),
486 FIELD64(GUEST_PDPTR0, guest_pdptr0),
487 FIELD64(GUEST_PDPTR1, guest_pdptr1),
488 FIELD64(GUEST_PDPTR2, guest_pdptr2),
489 FIELD64(GUEST_PDPTR3, guest_pdptr3),
490 FIELD64(HOST_IA32_PAT, host_ia32_pat),
491 FIELD64(HOST_IA32_EFER, host_ia32_efer),
492 FIELD64(HOST_IA32_PERF_GLOBAL_CTRL, host_ia32_perf_global_ctrl),
493 FIELD(PIN_BASED_VM_EXEC_CONTROL, pin_based_vm_exec_control),
494 FIELD(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control),
495 FIELD(EXCEPTION_BITMAP, exception_bitmap),
496 FIELD(PAGE_FAULT_ERROR_CODE_MASK, page_fault_error_code_mask),
497 FIELD(PAGE_FAULT_ERROR_CODE_MATCH, page_fault_error_code_match),
498 FIELD(CR3_TARGET_COUNT, cr3_target_count),
499 FIELD(VM_EXIT_CONTROLS, vm_exit_controls),
500 FIELD(VM_EXIT_MSR_STORE_COUNT, vm_exit_msr_store_count),
501 FIELD(VM_EXIT_MSR_LOAD_COUNT, vm_exit_msr_load_count),
502 FIELD(VM_ENTRY_CONTROLS, vm_entry_controls),
503 FIELD(VM_ENTRY_MSR_LOAD_COUNT, vm_entry_msr_load_count),
504 FIELD(VM_ENTRY_INTR_INFO_FIELD, vm_entry_intr_info_field),
505 FIELD(VM_ENTRY_EXCEPTION_ERROR_CODE, vm_entry_exception_error_code),
506 FIELD(VM_ENTRY_INSTRUCTION_LEN, vm_entry_instruction_len),
507 FIELD(TPR_THRESHOLD, tpr_threshold),
508 FIELD(SECONDARY_VM_EXEC_CONTROL, secondary_vm_exec_control),
509 FIELD(VM_INSTRUCTION_ERROR, vm_instruction_error),
510 FIELD(VM_EXIT_REASON, vm_exit_reason),
511 FIELD(VM_EXIT_INTR_INFO, vm_exit_intr_info),
512 FIELD(VM_EXIT_INTR_ERROR_CODE, vm_exit_intr_error_code),
513 FIELD(IDT_VECTORING_INFO_FIELD, idt_vectoring_info_field),
514 FIELD(IDT_VECTORING_ERROR_CODE, idt_vectoring_error_code),
515 FIELD(VM_EXIT_INSTRUCTION_LEN, vm_exit_instruction_len),
516 FIELD(VMX_INSTRUCTION_INFO, vmx_instruction_info),
517 FIELD(GUEST_ES_LIMIT, guest_es_limit),
518 FIELD(GUEST_CS_LIMIT, guest_cs_limit),
519 FIELD(GUEST_SS_LIMIT, guest_ss_limit),
520 FIELD(GUEST_DS_LIMIT, guest_ds_limit),
521 FIELD(GUEST_FS_LIMIT, guest_fs_limit),
522 FIELD(GUEST_GS_LIMIT, guest_gs_limit),
523 FIELD(GUEST_LDTR_LIMIT, guest_ldtr_limit),
524 FIELD(GUEST_TR_LIMIT, guest_tr_limit),
525 FIELD(GUEST_GDTR_LIMIT, guest_gdtr_limit),
526 FIELD(GUEST_IDTR_LIMIT, guest_idtr_limit),
527 FIELD(GUEST_ES_AR_BYTES, guest_es_ar_bytes),
528 FIELD(GUEST_CS_AR_BYTES, guest_cs_ar_bytes),
529 FIELD(GUEST_SS_AR_BYTES, guest_ss_ar_bytes),
530 FIELD(GUEST_DS_AR_BYTES, guest_ds_ar_bytes),
531 FIELD(GUEST_FS_AR_BYTES, guest_fs_ar_bytes),
532 FIELD(GUEST_GS_AR_BYTES, guest_gs_ar_bytes),
533 FIELD(GUEST_LDTR_AR_BYTES, guest_ldtr_ar_bytes),
534 FIELD(GUEST_TR_AR_BYTES, guest_tr_ar_bytes),
535 FIELD(GUEST_INTERRUPTIBILITY_INFO, guest_interruptibility_info),
536 FIELD(GUEST_ACTIVITY_STATE, guest_activity_state),
537 FIELD(GUEST_SYSENTER_CS, guest_sysenter_cs),
538 FIELD(HOST_IA32_SYSENTER_CS, host_ia32_sysenter_cs),
539 FIELD(CR0_GUEST_HOST_MASK, cr0_guest_host_mask),
540 FIELD(CR4_GUEST_HOST_MASK, cr4_guest_host_mask),
541 FIELD(CR0_READ_SHADOW, cr0_read_shadow),
542 FIELD(CR4_READ_SHADOW, cr4_read_shadow),
543 FIELD(CR3_TARGET_VALUE0, cr3_target_value0),
544 FIELD(CR3_TARGET_VALUE1, cr3_target_value1),
545 FIELD(CR3_TARGET_VALUE2, cr3_target_value2),
546 FIELD(CR3_TARGET_VALUE3, cr3_target_value3),
547 FIELD(EXIT_QUALIFICATION, exit_qualification),
548 FIELD(GUEST_LINEAR_ADDRESS, guest_linear_address),
549 FIELD(GUEST_CR0, guest_cr0),
550 FIELD(GUEST_CR3, guest_cr3),
551 FIELD(GUEST_CR4, guest_cr4),
552 FIELD(GUEST_ES_BASE, guest_es_base),
553 FIELD(GUEST_CS_BASE, guest_cs_base),
554 FIELD(GUEST_SS_BASE, guest_ss_base),
555 FIELD(GUEST_DS_BASE, guest_ds_base),
556 FIELD(GUEST_FS_BASE, guest_fs_base),
557 FIELD(GUEST_GS_BASE, guest_gs_base),
558 FIELD(GUEST_LDTR_BASE, guest_ldtr_base),
559 FIELD(GUEST_TR_BASE, guest_tr_base),
560 FIELD(GUEST_GDTR_BASE, guest_gdtr_base),
561 FIELD(GUEST_IDTR_BASE, guest_idtr_base),
562 FIELD(GUEST_DR7, guest_dr7),
563 FIELD(GUEST_RSP, guest_rsp),
564 FIELD(GUEST_RIP, guest_rip),
565 FIELD(GUEST_RFLAGS, guest_rflags),
566 FIELD(GUEST_PENDING_DBG_EXCEPTIONS, guest_pending_dbg_exceptions),
567 FIELD(GUEST_SYSENTER_ESP, guest_sysenter_esp),
568 FIELD(GUEST_SYSENTER_EIP, guest_sysenter_eip),
569 FIELD(HOST_CR0, host_cr0),
570 FIELD(HOST_CR3, host_cr3),
571 FIELD(HOST_CR4, host_cr4),
572 FIELD(HOST_FS_BASE, host_fs_base),
573 FIELD(HOST_GS_BASE, host_gs_base),
574 FIELD(HOST_TR_BASE, host_tr_base),
575 FIELD(HOST_GDTR_BASE, host_gdtr_base),
576 FIELD(HOST_IDTR_BASE, host_idtr_base),
577 FIELD(HOST_IA32_SYSENTER_ESP, host_ia32_sysenter_esp),
578 FIELD(HOST_IA32_SYSENTER_EIP, host_ia32_sysenter_eip),
579 FIELD(HOST_RSP, host_rsp),
580 FIELD(HOST_RIP, host_rip),
581};
582static const int max_vmcs_field = ARRAY_SIZE(vmcs_field_to_offset_table);
583
584static inline short vmcs_field_to_offset(unsigned long field)
585{
586 if (field >= max_vmcs_field || vmcs_field_to_offset_table[field] == 0)
587 return -1;
588 return vmcs_field_to_offset_table[field];
589}
590
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300591static inline struct vmcs12 *get_vmcs12(struct kvm_vcpu *vcpu)
592{
593 return to_vmx(vcpu)->nested.current_vmcs12;
594}
595
596static struct page *nested_get_page(struct kvm_vcpu *vcpu, gpa_t addr)
597{
598 struct page *page = gfn_to_page(vcpu->kvm, addr >> PAGE_SHIFT);
Xiao Guangrong32cad842012-08-03 15:42:52 +0800599 if (is_error_page(page))
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300600 return NULL;
Xiao Guangrong32cad842012-08-03 15:42:52 +0800601
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300602 return page;
603}
604
605static void nested_release_page(struct page *page)
606{
607 kvm_release_page_dirty(page);
608}
609
610static void nested_release_page_clean(struct page *page)
611{
612 kvm_release_page_clean(page);
613}
614
Sheng Yang4e1096d2008-07-06 19:16:51 +0800615static u64 construct_eptp(unsigned long root_hpa);
Dongxiao Xu4610c9c2010-05-11 18:29:48 +0800616static void kvm_cpu_vmxon(u64 addr);
617static void kvm_cpu_vmxoff(void);
Avi Kivityaff48ba2010-12-05 18:56:11 +0200618static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
Gleb Natapov776e58e2011-03-13 12:34:27 +0200619static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr);
Orit Wassermanb246dd52012-05-31 14:49:22 +0300620static void vmx_set_segment(struct kvm_vcpu *vcpu,
621 struct kvm_segment *var, int seg);
622static void vmx_get_segment(struct kvm_vcpu *vcpu,
623 struct kvm_segment *var, int seg);
Avi Kivity75880a02007-06-20 11:20:04 +0300624
Avi Kivity6aa8b732006-12-10 02:21:36 -0800625static DEFINE_PER_CPU(struct vmcs *, vmxarea);
626static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
Nadav Har'Eld462b812011-05-24 15:26:10 +0300627/*
628 * We maintain a per-CPU linked-list of VMCS loaded on that CPU. This is needed
629 * when a CPU is brought down, and we need to VMCLEAR all VMCSs loaded on it.
630 */
631static DEFINE_PER_CPU(struct list_head, loaded_vmcss_on_cpu);
Avi Kivity3444d7d2010-07-26 18:32:38 +0300632static DEFINE_PER_CPU(struct desc_ptr, host_gdt);
Avi Kivity6aa8b732006-12-10 02:21:36 -0800633
Avi Kivity3e7c73e2009-02-24 21:46:19 +0200634static unsigned long *vmx_io_bitmap_a;
635static unsigned long *vmx_io_bitmap_b;
Avi Kivity58972972009-02-24 22:26:47 +0200636static unsigned long *vmx_msr_bitmap_legacy;
637static unsigned long *vmx_msr_bitmap_longmode;
He, Qingfdef3ad2007-04-30 09:45:24 +0300638
Avi Kivity110312c2010-12-21 12:54:20 +0200639static bool cpu_has_load_ia32_efer;
Gleb Natapov8bf00a52011-10-05 14:01:22 +0200640static bool cpu_has_load_perf_global_ctrl;
Avi Kivity110312c2010-12-21 12:54:20 +0200641
Sheng Yang2384d2b2008-01-17 15:14:33 +0800642static DECLARE_BITMAP(vmx_vpid_bitmap, VMX_NR_VPIDS);
643static DEFINE_SPINLOCK(vmx_vpid_lock);
644
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +0300645static struct vmcs_config {
Avi Kivity6aa8b732006-12-10 02:21:36 -0800646 int size;
647 int order;
648 u32 revision_id;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +0300649 u32 pin_based_exec_ctrl;
650 u32 cpu_based_exec_ctrl;
Sheng Yangf78e0e22007-10-29 09:40:42 +0800651 u32 cpu_based_2nd_exec_ctrl;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +0300652 u32 vmexit_ctrl;
653 u32 vmentry_ctrl;
654} vmcs_config;
Avi Kivity6aa8b732006-12-10 02:21:36 -0800655
Hannes Ederefff9e52008-11-28 17:02:06 +0100656static struct vmx_capability {
Sheng Yangd56f5462008-04-25 10:13:16 +0800657 u32 ept;
658 u32 vpid;
659} vmx_capability;
660
Avi Kivity6aa8b732006-12-10 02:21:36 -0800661#define VMX_SEGMENT_FIELD(seg) \
662 [VCPU_SREG_##seg] = { \
663 .selector = GUEST_##seg##_SELECTOR, \
664 .base = GUEST_##seg##_BASE, \
665 .limit = GUEST_##seg##_LIMIT, \
666 .ar_bytes = GUEST_##seg##_AR_BYTES, \
667 }
668
669static struct kvm_vmx_segment_field {
670 unsigned selector;
671 unsigned base;
672 unsigned limit;
673 unsigned ar_bytes;
674} kvm_vmx_segment_fields[] = {
675 VMX_SEGMENT_FIELD(CS),
676 VMX_SEGMENT_FIELD(DS),
677 VMX_SEGMENT_FIELD(ES),
678 VMX_SEGMENT_FIELD(FS),
679 VMX_SEGMENT_FIELD(GS),
680 VMX_SEGMENT_FIELD(SS),
681 VMX_SEGMENT_FIELD(TR),
682 VMX_SEGMENT_FIELD(LDTR),
683};
684
Avi Kivity26bb0982009-09-07 11:14:12 +0300685static u64 host_efer;
686
Avi Kivity6de4f3a2009-05-31 22:58:47 +0300687static void ept_save_pdptrs(struct kvm_vcpu *vcpu);
688
Avi Kivity4d56c8a2007-04-19 14:28:44 +0300689/*
Brian Gerst8c065852010-07-17 09:03:26 -0400690 * Keep MSR_STAR at the end, as setup_msrs() will try to optimize it
Avi Kivity4d56c8a2007-04-19 14:28:44 +0300691 * away by decrementing the array size.
692 */
Avi Kivity6aa8b732006-12-10 02:21:36 -0800693static const u32 vmx_msr_index[] = {
Avi Kivity05b3e0c2006-12-13 00:33:45 -0800694#ifdef CONFIG_X86_64
Avi Kivity44ea2b12009-09-06 15:55:37 +0300695 MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800696#endif
Brian Gerst8c065852010-07-17 09:03:26 -0400697 MSR_EFER, MSR_TSC_AUX, MSR_STAR,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800698};
Ahmed S. Darwish9d8f5492007-02-19 14:37:46 +0200699#define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800700
Gui Jianfeng31299942010-03-15 17:29:09 +0800701static inline bool is_page_fault(u32 intr_info)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800702{
703 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
704 INTR_INFO_VALID_MASK)) ==
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +0100705 (INTR_TYPE_HARD_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
Avi Kivity6aa8b732006-12-10 02:21:36 -0800706}
707
Gui Jianfeng31299942010-03-15 17:29:09 +0800708static inline bool is_no_device(u32 intr_info)
Anthony Liguori2ab455c2007-04-27 09:29:49 +0300709{
710 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
711 INTR_INFO_VALID_MASK)) ==
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +0100712 (INTR_TYPE_HARD_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
Anthony Liguori2ab455c2007-04-27 09:29:49 +0300713}
714
Gui Jianfeng31299942010-03-15 17:29:09 +0800715static inline bool is_invalid_opcode(u32 intr_info)
Anthony Liguori7aa81cc2007-09-17 14:57:50 -0500716{
717 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
718 INTR_INFO_VALID_MASK)) ==
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +0100719 (INTR_TYPE_HARD_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK);
Anthony Liguori7aa81cc2007-09-17 14:57:50 -0500720}
721
Gui Jianfeng31299942010-03-15 17:29:09 +0800722static inline bool is_external_interrupt(u32 intr_info)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800723{
724 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
725 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
726}
727
Gui Jianfeng31299942010-03-15 17:29:09 +0800728static inline bool is_machine_check(u32 intr_info)
Andi Kleena0861c02009-06-08 17:37:09 +0800729{
730 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
731 INTR_INFO_VALID_MASK)) ==
732 (INTR_TYPE_HARD_EXCEPTION | MC_VECTOR | INTR_INFO_VALID_MASK);
733}
734
Gui Jianfeng31299942010-03-15 17:29:09 +0800735static inline bool cpu_has_vmx_msr_bitmap(void)
Sheng Yang25c5f222008-03-28 13:18:56 +0800736{
Sheng Yang04547152009-04-01 15:52:31 +0800737 return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS;
Sheng Yang25c5f222008-03-28 13:18:56 +0800738}
739
Gui Jianfeng31299942010-03-15 17:29:09 +0800740static inline bool cpu_has_vmx_tpr_shadow(void)
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800741{
Sheng Yang04547152009-04-01 15:52:31 +0800742 return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW;
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800743}
744
Gui Jianfeng31299942010-03-15 17:29:09 +0800745static inline bool vm_need_tpr_shadow(struct kvm *kvm)
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800746{
Sheng Yang04547152009-04-01 15:52:31 +0800747 return (cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm));
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800748}
749
Gui Jianfeng31299942010-03-15 17:29:09 +0800750static inline bool cpu_has_secondary_exec_ctrls(void)
Sheng Yangf78e0e22007-10-29 09:40:42 +0800751{
Sheng Yang04547152009-04-01 15:52:31 +0800752 return vmcs_config.cpu_based_exec_ctrl &
753 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
Sheng Yangf78e0e22007-10-29 09:40:42 +0800754}
755
Avi Kivity774ead32007-12-26 13:57:04 +0200756static inline bool cpu_has_vmx_virtualize_apic_accesses(void)
Sheng Yangf78e0e22007-10-29 09:40:42 +0800757{
Sheng Yang04547152009-04-01 15:52:31 +0800758 return vmcs_config.cpu_based_2nd_exec_ctrl &
759 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
760}
761
762static inline bool cpu_has_vmx_flexpriority(void)
763{
764 return cpu_has_vmx_tpr_shadow() &&
765 cpu_has_vmx_virtualize_apic_accesses();
Sheng Yangf78e0e22007-10-29 09:40:42 +0800766}
767
Marcelo Tosattie7997942009-06-11 12:07:40 -0300768static inline bool cpu_has_vmx_ept_execute_only(void)
769{
Gui Jianfeng31299942010-03-15 17:29:09 +0800770 return vmx_capability.ept & VMX_EPT_EXECUTE_ONLY_BIT;
Marcelo Tosattie7997942009-06-11 12:07:40 -0300771}
772
773static inline bool cpu_has_vmx_eptp_uncacheable(void)
774{
Gui Jianfeng31299942010-03-15 17:29:09 +0800775 return vmx_capability.ept & VMX_EPTP_UC_BIT;
Marcelo Tosattie7997942009-06-11 12:07:40 -0300776}
777
778static inline bool cpu_has_vmx_eptp_writeback(void)
779{
Gui Jianfeng31299942010-03-15 17:29:09 +0800780 return vmx_capability.ept & VMX_EPTP_WB_BIT;
Marcelo Tosattie7997942009-06-11 12:07:40 -0300781}
782
783static inline bool cpu_has_vmx_ept_2m_page(void)
784{
Gui Jianfeng31299942010-03-15 17:29:09 +0800785 return vmx_capability.ept & VMX_EPT_2MB_PAGE_BIT;
Marcelo Tosattie7997942009-06-11 12:07:40 -0300786}
787
Sheng Yang878403b2010-01-05 19:02:29 +0800788static inline bool cpu_has_vmx_ept_1g_page(void)
789{
Gui Jianfeng31299942010-03-15 17:29:09 +0800790 return vmx_capability.ept & VMX_EPT_1GB_PAGE_BIT;
Sheng Yang878403b2010-01-05 19:02:29 +0800791}
792
Sheng Yang4bc9b982010-06-02 14:05:24 +0800793static inline bool cpu_has_vmx_ept_4levels(void)
794{
795 return vmx_capability.ept & VMX_EPT_PAGE_WALK_4_BIT;
796}
797
Xudong Hao83c3a332012-05-28 19:33:35 +0800798static inline bool cpu_has_vmx_ept_ad_bits(void)
799{
800 return vmx_capability.ept & VMX_EPT_AD_BIT;
801}
802
Gui Jianfeng31299942010-03-15 17:29:09 +0800803static inline bool cpu_has_vmx_invept_individual_addr(void)
Sheng Yangd56f5462008-04-25 10:13:16 +0800804{
Gui Jianfeng31299942010-03-15 17:29:09 +0800805 return vmx_capability.ept & VMX_EPT_EXTENT_INDIVIDUAL_BIT;
Sheng Yangd56f5462008-04-25 10:13:16 +0800806}
807
Gui Jianfeng31299942010-03-15 17:29:09 +0800808static inline bool cpu_has_vmx_invept_context(void)
Sheng Yangd56f5462008-04-25 10:13:16 +0800809{
Gui Jianfeng31299942010-03-15 17:29:09 +0800810 return vmx_capability.ept & VMX_EPT_EXTENT_CONTEXT_BIT;
Sheng Yangd56f5462008-04-25 10:13:16 +0800811}
812
Gui Jianfeng31299942010-03-15 17:29:09 +0800813static inline bool cpu_has_vmx_invept_global(void)
Sheng Yangd56f5462008-04-25 10:13:16 +0800814{
Gui Jianfeng31299942010-03-15 17:29:09 +0800815 return vmx_capability.ept & VMX_EPT_EXTENT_GLOBAL_BIT;
Sheng Yangd56f5462008-04-25 10:13:16 +0800816}
817
Gui Jianfeng518c8ae2010-06-04 08:51:39 +0800818static inline bool cpu_has_vmx_invvpid_single(void)
819{
820 return vmx_capability.vpid & VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT;
821}
822
Gui Jianfengb9d762f2010-06-07 10:32:29 +0800823static inline bool cpu_has_vmx_invvpid_global(void)
824{
825 return vmx_capability.vpid & VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT;
826}
827
Gui Jianfeng31299942010-03-15 17:29:09 +0800828static inline bool cpu_has_vmx_ept(void)
Sheng Yangd56f5462008-04-25 10:13:16 +0800829{
Sheng Yang04547152009-04-01 15:52:31 +0800830 return vmcs_config.cpu_based_2nd_exec_ctrl &
831 SECONDARY_EXEC_ENABLE_EPT;
Sheng Yangd56f5462008-04-25 10:13:16 +0800832}
833
Gui Jianfeng31299942010-03-15 17:29:09 +0800834static inline bool cpu_has_vmx_unrestricted_guest(void)
Nitin A Kamble3a624e22009-06-08 11:34:16 -0700835{
836 return vmcs_config.cpu_based_2nd_exec_ctrl &
837 SECONDARY_EXEC_UNRESTRICTED_GUEST;
838}
839
Gui Jianfeng31299942010-03-15 17:29:09 +0800840static inline bool cpu_has_vmx_ple(void)
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +0800841{
842 return vmcs_config.cpu_based_2nd_exec_ctrl &
843 SECONDARY_EXEC_PAUSE_LOOP_EXITING;
844}
845
Gui Jianfeng31299942010-03-15 17:29:09 +0800846static inline bool vm_need_virtualize_apic_accesses(struct kvm *kvm)
Sheng Yangf78e0e22007-10-29 09:40:42 +0800847{
Gui Jianfeng6d3e4352010-01-29 15:36:59 +0800848 return flexpriority_enabled && irqchip_in_kernel(kvm);
Sheng Yangf78e0e22007-10-29 09:40:42 +0800849}
850
Gui Jianfeng31299942010-03-15 17:29:09 +0800851static inline bool cpu_has_vmx_vpid(void)
Sheng Yang2384d2b2008-01-17 15:14:33 +0800852{
Sheng Yang04547152009-04-01 15:52:31 +0800853 return vmcs_config.cpu_based_2nd_exec_ctrl &
854 SECONDARY_EXEC_ENABLE_VPID;
Sheng Yang2384d2b2008-01-17 15:14:33 +0800855}
856
Gui Jianfeng31299942010-03-15 17:29:09 +0800857static inline bool cpu_has_vmx_rdtscp(void)
Sheng Yang4e47c7a2009-12-18 16:48:47 +0800858{
859 return vmcs_config.cpu_based_2nd_exec_ctrl &
860 SECONDARY_EXEC_RDTSCP;
861}
862
Mao, Junjiead756a12012-07-02 01:18:48 +0000863static inline bool cpu_has_vmx_invpcid(void)
864{
865 return vmcs_config.cpu_based_2nd_exec_ctrl &
866 SECONDARY_EXEC_ENABLE_INVPCID;
867}
868
Gui Jianfeng31299942010-03-15 17:29:09 +0800869static inline bool cpu_has_virtual_nmis(void)
Sheng Yangf08864b2008-05-15 18:23:25 +0800870{
871 return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS;
872}
873
Sheng Yangf5f48ee2010-06-30 12:25:15 +0800874static inline bool cpu_has_vmx_wbinvd_exit(void)
875{
876 return vmcs_config.cpu_based_2nd_exec_ctrl &
877 SECONDARY_EXEC_WBINVD_EXITING;
878}
879
Sheng Yang04547152009-04-01 15:52:31 +0800880static inline bool report_flexpriority(void)
881{
882 return flexpriority_enabled;
883}
884
Nadav Har'Elfe3ef052011-05-25 23:10:02 +0300885static inline bool nested_cpu_has(struct vmcs12 *vmcs12, u32 bit)
886{
887 return vmcs12->cpu_based_vm_exec_control & bit;
888}
889
890static inline bool nested_cpu_has2(struct vmcs12 *vmcs12, u32 bit)
891{
892 return (vmcs12->cpu_based_vm_exec_control &
893 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) &&
894 (vmcs12->secondary_vm_exec_control & bit);
895}
896
Nadav Har'El644d7112011-05-25 23:12:35 +0300897static inline bool nested_cpu_has_virtual_nmis(struct vmcs12 *vmcs12,
898 struct kvm_vcpu *vcpu)
899{
900 return vmcs12->pin_based_vm_exec_control & PIN_BASED_VIRTUAL_NMIS;
901}
902
903static inline bool is_exception(u32 intr_info)
904{
905 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
906 == (INTR_TYPE_HARD_EXCEPTION | INTR_INFO_VALID_MASK);
907}
908
909static void nested_vmx_vmexit(struct kvm_vcpu *vcpu);
Nadav Har'El7c177932011-05-25 23:12:04 +0300910static void nested_vmx_entry_failure(struct kvm_vcpu *vcpu,
911 struct vmcs12 *vmcs12,
912 u32 reason, unsigned long qualification);
913
Rusty Russell8b9cf982007-07-30 16:31:43 +1000914static int __find_msr_index(struct vcpu_vmx *vmx, u32 msr)
Avi Kivity7725f0b2006-12-13 00:34:01 -0800915{
916 int i;
917
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400918 for (i = 0; i < vmx->nmsrs; ++i)
Avi Kivity26bb0982009-09-07 11:14:12 +0300919 if (vmx_msr_index[vmx->guest_msrs[i].index] == msr)
Eddie Donga75beee2007-05-17 18:55:15 +0300920 return i;
921 return -1;
922}
923
Sheng Yang2384d2b2008-01-17 15:14:33 +0800924static inline void __invvpid(int ext, u16 vpid, gva_t gva)
925{
926 struct {
927 u64 vpid : 16;
928 u64 rsvd : 48;
929 u64 gva;
930 } operand = { vpid, 0, gva };
931
Avi Kivity4ecac3f2008-05-13 13:23:38 +0300932 asm volatile (__ex(ASM_VMX_INVVPID)
Sheng Yang2384d2b2008-01-17 15:14:33 +0800933 /* CF==1 or ZF==1 --> rc = -1 */
934 "; ja 1f ; ud2 ; 1:"
935 : : "a"(&operand), "c"(ext) : "cc", "memory");
936}
937
Sheng Yang14394422008-04-28 12:24:45 +0800938static inline void __invept(int ext, u64 eptp, gpa_t gpa)
939{
940 struct {
941 u64 eptp, gpa;
942 } operand = {eptp, gpa};
943
Avi Kivity4ecac3f2008-05-13 13:23:38 +0300944 asm volatile (__ex(ASM_VMX_INVEPT)
Sheng Yang14394422008-04-28 12:24:45 +0800945 /* CF==1 or ZF==1 --> rc = -1 */
946 "; ja 1f ; ud2 ; 1:\n"
947 : : "a" (&operand), "c" (ext) : "cc", "memory");
948}
949
Avi Kivity26bb0982009-09-07 11:14:12 +0300950static struct shared_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr)
Eddie Donga75beee2007-05-17 18:55:15 +0300951{
952 int i;
953
Rusty Russell8b9cf982007-07-30 16:31:43 +1000954 i = __find_msr_index(vmx, msr);
Eddie Donga75beee2007-05-17 18:55:15 +0300955 if (i >= 0)
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400956 return &vmx->guest_msrs[i];
Al Viro8b6d44c2007-02-09 16:38:40 +0000957 return NULL;
Avi Kivity7725f0b2006-12-13 00:34:01 -0800958}
959
Avi Kivity6aa8b732006-12-10 02:21:36 -0800960static void vmcs_clear(struct vmcs *vmcs)
961{
962 u64 phys_addr = __pa(vmcs);
963 u8 error;
964
Avi Kivity4ecac3f2008-05-13 13:23:38 +0300965 asm volatile (__ex(ASM_VMX_VMCLEAR_RAX) "; setna %0"
Avi Kivity16d8f722010-12-21 16:51:50 +0200966 : "=qm"(error) : "a"(&phys_addr), "m"(phys_addr)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800967 : "cc", "memory");
968 if (error)
969 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
970 vmcs, phys_addr);
971}
972
Nadav Har'Eld462b812011-05-24 15:26:10 +0300973static inline void loaded_vmcs_init(struct loaded_vmcs *loaded_vmcs)
974{
975 vmcs_clear(loaded_vmcs->vmcs);
976 loaded_vmcs->cpu = -1;
977 loaded_vmcs->launched = 0;
978}
979
Dongxiao Xu7725b892010-05-11 18:29:38 +0800980static void vmcs_load(struct vmcs *vmcs)
981{
982 u64 phys_addr = __pa(vmcs);
983 u8 error;
984
985 asm volatile (__ex(ASM_VMX_VMPTRLD_RAX) "; setna %0"
Avi Kivity16d8f722010-12-21 16:51:50 +0200986 : "=qm"(error) : "a"(&phys_addr), "m"(phys_addr)
Dongxiao Xu7725b892010-05-11 18:29:38 +0800987 : "cc", "memory");
988 if (error)
Nadav Har'El2844d842011-05-25 23:16:40 +0300989 printk(KERN_ERR "kvm: vmptrld %p/%llx failed\n",
Dongxiao Xu7725b892010-05-11 18:29:38 +0800990 vmcs, phys_addr);
991}
992
Nadav Har'Eld462b812011-05-24 15:26:10 +0300993static void __loaded_vmcs_clear(void *arg)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800994{
Nadav Har'Eld462b812011-05-24 15:26:10 +0300995 struct loaded_vmcs *loaded_vmcs = arg;
Ingo Molnard3b2c332007-01-05 16:36:23 -0800996 int cpu = raw_smp_processor_id();
Avi Kivity6aa8b732006-12-10 02:21:36 -0800997
Nadav Har'Eld462b812011-05-24 15:26:10 +0300998 if (loaded_vmcs->cpu != cpu)
999 return; /* vcpu migration can race with cpu offline */
1000 if (per_cpu(current_vmcs, cpu) == loaded_vmcs->vmcs)
Avi Kivity6aa8b732006-12-10 02:21:36 -08001001 per_cpu(current_vmcs, cpu) = NULL;
Nadav Har'Eld462b812011-05-24 15:26:10 +03001002 list_del(&loaded_vmcs->loaded_vmcss_on_cpu_link);
1003 loaded_vmcs_init(loaded_vmcs);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001004}
1005
Nadav Har'Eld462b812011-05-24 15:26:10 +03001006static void loaded_vmcs_clear(struct loaded_vmcs *loaded_vmcs)
Avi Kivity8d0be2b2007-02-12 00:54:46 -08001007{
Nadav Har'Eld462b812011-05-24 15:26:10 +03001008 if (loaded_vmcs->cpu != -1)
1009 smp_call_function_single(
1010 loaded_vmcs->cpu, __loaded_vmcs_clear, loaded_vmcs, 1);
Avi Kivity8d0be2b2007-02-12 00:54:46 -08001011}
1012
Gui Jianfeng1760dd42010-06-07 10:33:27 +08001013static inline void vpid_sync_vcpu_single(struct vcpu_vmx *vmx)
Sheng Yang2384d2b2008-01-17 15:14:33 +08001014{
1015 if (vmx->vpid == 0)
1016 return;
1017
Gui Jianfeng518c8ae2010-06-04 08:51:39 +08001018 if (cpu_has_vmx_invvpid_single())
1019 __invvpid(VMX_VPID_EXTENT_SINGLE_CONTEXT, vmx->vpid, 0);
Sheng Yang2384d2b2008-01-17 15:14:33 +08001020}
1021
Gui Jianfengb9d762f2010-06-07 10:32:29 +08001022static inline void vpid_sync_vcpu_global(void)
1023{
1024 if (cpu_has_vmx_invvpid_global())
1025 __invvpid(VMX_VPID_EXTENT_ALL_CONTEXT, 0, 0);
1026}
1027
1028static inline void vpid_sync_context(struct vcpu_vmx *vmx)
1029{
1030 if (cpu_has_vmx_invvpid_single())
Gui Jianfeng1760dd42010-06-07 10:33:27 +08001031 vpid_sync_vcpu_single(vmx);
Gui Jianfengb9d762f2010-06-07 10:32:29 +08001032 else
1033 vpid_sync_vcpu_global();
1034}
1035
Sheng Yang14394422008-04-28 12:24:45 +08001036static inline void ept_sync_global(void)
1037{
1038 if (cpu_has_vmx_invept_global())
1039 __invept(VMX_EPT_EXTENT_GLOBAL, 0, 0);
1040}
1041
1042static inline void ept_sync_context(u64 eptp)
1043{
Avi Kivity089d0342009-03-23 18:26:32 +02001044 if (enable_ept) {
Sheng Yang14394422008-04-28 12:24:45 +08001045 if (cpu_has_vmx_invept_context())
1046 __invept(VMX_EPT_EXTENT_CONTEXT, eptp, 0);
1047 else
1048 ept_sync_global();
1049 }
1050}
1051
1052static inline void ept_sync_individual_addr(u64 eptp, gpa_t gpa)
1053{
Avi Kivity089d0342009-03-23 18:26:32 +02001054 if (enable_ept) {
Sheng Yang14394422008-04-28 12:24:45 +08001055 if (cpu_has_vmx_invept_individual_addr())
1056 __invept(VMX_EPT_EXTENT_INDIVIDUAL_ADDR,
1057 eptp, gpa);
1058 else
1059 ept_sync_context(eptp);
1060 }
1061}
1062
Avi Kivity96304212011-05-15 10:13:13 -04001063static __always_inline unsigned long vmcs_readl(unsigned long field)
Avi Kivity6aa8b732006-12-10 02:21:36 -08001064{
Avi Kivity5e520e62011-05-15 10:13:12 -04001065 unsigned long value;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001066
Avi Kivity5e520e62011-05-15 10:13:12 -04001067 asm volatile (__ex_clear(ASM_VMX_VMREAD_RDX_RAX, "%0")
1068 : "=a"(value) : "d"(field) : "cc");
Avi Kivity6aa8b732006-12-10 02:21:36 -08001069 return value;
1070}
1071
Avi Kivity96304212011-05-15 10:13:13 -04001072static __always_inline u16 vmcs_read16(unsigned long field)
Avi Kivity6aa8b732006-12-10 02:21:36 -08001073{
1074 return vmcs_readl(field);
1075}
1076
Avi Kivity96304212011-05-15 10:13:13 -04001077static __always_inline u32 vmcs_read32(unsigned long field)
Avi Kivity6aa8b732006-12-10 02:21:36 -08001078{
1079 return vmcs_readl(field);
1080}
1081
Avi Kivity96304212011-05-15 10:13:13 -04001082static __always_inline u64 vmcs_read64(unsigned long field)
Avi Kivity6aa8b732006-12-10 02:21:36 -08001083{
Avi Kivity05b3e0c2006-12-13 00:33:45 -08001084#ifdef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08001085 return vmcs_readl(field);
1086#else
1087 return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
1088#endif
1089}
1090
Avi Kivitye52de1b2007-01-05 16:36:56 -08001091static noinline void vmwrite_error(unsigned long field, unsigned long value)
1092{
1093 printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
1094 field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
1095 dump_stack();
1096}
1097
Avi Kivity6aa8b732006-12-10 02:21:36 -08001098static void vmcs_writel(unsigned long field, unsigned long value)
1099{
1100 u8 error;
1101
Avi Kivity4ecac3f2008-05-13 13:23:38 +03001102 asm volatile (__ex(ASM_VMX_VMWRITE_RAX_RDX) "; setna %0"
Mike Dayd77c26f2007-10-08 09:02:08 -04001103 : "=q"(error) : "a"(value), "d"(field) : "cc");
Avi Kivitye52de1b2007-01-05 16:36:56 -08001104 if (unlikely(error))
1105 vmwrite_error(field, value);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001106}
1107
1108static void vmcs_write16(unsigned long field, u16 value)
1109{
1110 vmcs_writel(field, value);
1111}
1112
1113static void vmcs_write32(unsigned long field, u32 value)
1114{
1115 vmcs_writel(field, value);
1116}
1117
1118static void vmcs_write64(unsigned long field, u64 value)
1119{
Avi Kivity6aa8b732006-12-10 02:21:36 -08001120 vmcs_writel(field, value);
Avi Kivity7682f2d2008-05-12 19:25:43 +03001121#ifndef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08001122 asm volatile ("");
1123 vmcs_writel(field+1, value >> 32);
1124#endif
1125}
1126
Anthony Liguori2ab455c2007-04-27 09:29:49 +03001127static void vmcs_clear_bits(unsigned long field, u32 mask)
1128{
1129 vmcs_writel(field, vmcs_readl(field) & ~mask);
1130}
1131
1132static void vmcs_set_bits(unsigned long field, u32 mask)
1133{
1134 vmcs_writel(field, vmcs_readl(field) | mask);
1135}
1136
Avi Kivity2fb92db2011-04-27 19:42:18 +03001137static void vmx_segment_cache_clear(struct vcpu_vmx *vmx)
1138{
1139 vmx->segment_cache.bitmask = 0;
1140}
1141
1142static bool vmx_segment_cache_test_set(struct vcpu_vmx *vmx, unsigned seg,
1143 unsigned field)
1144{
1145 bool ret;
1146 u32 mask = 1 << (seg * SEG_FIELD_NR + field);
1147
1148 if (!(vmx->vcpu.arch.regs_avail & (1 << VCPU_EXREG_SEGMENTS))) {
1149 vmx->vcpu.arch.regs_avail |= (1 << VCPU_EXREG_SEGMENTS);
1150 vmx->segment_cache.bitmask = 0;
1151 }
1152 ret = vmx->segment_cache.bitmask & mask;
1153 vmx->segment_cache.bitmask |= mask;
1154 return ret;
1155}
1156
1157static u16 vmx_read_guest_seg_selector(struct vcpu_vmx *vmx, unsigned seg)
1158{
1159 u16 *p = &vmx->segment_cache.seg[seg].selector;
1160
1161 if (!vmx_segment_cache_test_set(vmx, seg, SEG_FIELD_SEL))
1162 *p = vmcs_read16(kvm_vmx_segment_fields[seg].selector);
1163 return *p;
1164}
1165
1166static ulong vmx_read_guest_seg_base(struct vcpu_vmx *vmx, unsigned seg)
1167{
1168 ulong *p = &vmx->segment_cache.seg[seg].base;
1169
1170 if (!vmx_segment_cache_test_set(vmx, seg, SEG_FIELD_BASE))
1171 *p = vmcs_readl(kvm_vmx_segment_fields[seg].base);
1172 return *p;
1173}
1174
1175static u32 vmx_read_guest_seg_limit(struct vcpu_vmx *vmx, unsigned seg)
1176{
1177 u32 *p = &vmx->segment_cache.seg[seg].limit;
1178
1179 if (!vmx_segment_cache_test_set(vmx, seg, SEG_FIELD_LIMIT))
1180 *p = vmcs_read32(kvm_vmx_segment_fields[seg].limit);
1181 return *p;
1182}
1183
1184static u32 vmx_read_guest_seg_ar(struct vcpu_vmx *vmx, unsigned seg)
1185{
1186 u32 *p = &vmx->segment_cache.seg[seg].ar;
1187
1188 if (!vmx_segment_cache_test_set(vmx, seg, SEG_FIELD_AR))
1189 *p = vmcs_read32(kvm_vmx_segment_fields[seg].ar_bytes);
1190 return *p;
1191}
1192
Avi Kivityabd3f2d2007-05-02 17:57:40 +03001193static void update_exception_bitmap(struct kvm_vcpu *vcpu)
1194{
1195 u32 eb;
1196
Jan Kiszkafd7373c2010-01-20 18:20:20 +01001197 eb = (1u << PF_VECTOR) | (1u << UD_VECTOR) | (1u << MC_VECTOR) |
1198 (1u << NM_VECTOR) | (1u << DB_VECTOR);
1199 if ((vcpu->guest_debug &
1200 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP)) ==
1201 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP))
1202 eb |= 1u << BP_VECTOR;
Avi Kivity7ffd92c2009-06-09 14:10:45 +03001203 if (to_vmx(vcpu)->rmode.vm86_active)
Avi Kivityabd3f2d2007-05-02 17:57:40 +03001204 eb = ~0;
Avi Kivity089d0342009-03-23 18:26:32 +02001205 if (enable_ept)
Sheng Yang14394422008-04-28 12:24:45 +08001206 eb &= ~(1u << PF_VECTOR); /* bypass_guest_pf = 0 */
Avi Kivity02daab22009-12-30 12:40:26 +02001207 if (vcpu->fpu_active)
1208 eb &= ~(1u << NM_VECTOR);
Nadav Har'El36cf24e2011-05-25 23:15:08 +03001209
1210 /* When we are running a nested L2 guest and L1 specified for it a
1211 * certain exception bitmap, we must trap the same exceptions and pass
1212 * them to L1. When running L2, we will only handle the exceptions
1213 * specified above if L1 did not want them.
1214 */
1215 if (is_guest_mode(vcpu))
1216 eb |= get_vmcs12(vcpu)->exception_bitmap;
1217
Avi Kivityabd3f2d2007-05-02 17:57:40 +03001218 vmcs_write32(EXCEPTION_BITMAP, eb);
1219}
1220
Gleb Natapov8bf00a52011-10-05 14:01:22 +02001221static void clear_atomic_switch_msr_special(unsigned long entry,
1222 unsigned long exit)
1223{
1224 vmcs_clear_bits(VM_ENTRY_CONTROLS, entry);
1225 vmcs_clear_bits(VM_EXIT_CONTROLS, exit);
1226}
1227
Avi Kivity61d2ef22010-04-28 16:40:38 +03001228static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr)
1229{
1230 unsigned i;
1231 struct msr_autoload *m = &vmx->msr_autoload;
1232
Gleb Natapov8bf00a52011-10-05 14:01:22 +02001233 switch (msr) {
1234 case MSR_EFER:
1235 if (cpu_has_load_ia32_efer) {
1236 clear_atomic_switch_msr_special(VM_ENTRY_LOAD_IA32_EFER,
1237 VM_EXIT_LOAD_IA32_EFER);
1238 return;
1239 }
1240 break;
1241 case MSR_CORE_PERF_GLOBAL_CTRL:
1242 if (cpu_has_load_perf_global_ctrl) {
1243 clear_atomic_switch_msr_special(
1244 VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL,
1245 VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
1246 return;
1247 }
1248 break;
Avi Kivity110312c2010-12-21 12:54:20 +02001249 }
1250
Avi Kivity61d2ef22010-04-28 16:40:38 +03001251 for (i = 0; i < m->nr; ++i)
1252 if (m->guest[i].index == msr)
1253 break;
1254
1255 if (i == m->nr)
1256 return;
1257 --m->nr;
1258 m->guest[i] = m->guest[m->nr];
1259 m->host[i] = m->host[m->nr];
1260 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->nr);
1261 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr);
1262}
1263
Gleb Natapov8bf00a52011-10-05 14:01:22 +02001264static void add_atomic_switch_msr_special(unsigned long entry,
1265 unsigned long exit, unsigned long guest_val_vmcs,
1266 unsigned long host_val_vmcs, u64 guest_val, u64 host_val)
1267{
1268 vmcs_write64(guest_val_vmcs, guest_val);
1269 vmcs_write64(host_val_vmcs, host_val);
1270 vmcs_set_bits(VM_ENTRY_CONTROLS, entry);
1271 vmcs_set_bits(VM_EXIT_CONTROLS, exit);
1272}
1273
Avi Kivity61d2ef22010-04-28 16:40:38 +03001274static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr,
1275 u64 guest_val, u64 host_val)
1276{
1277 unsigned i;
1278 struct msr_autoload *m = &vmx->msr_autoload;
1279
Gleb Natapov8bf00a52011-10-05 14:01:22 +02001280 switch (msr) {
1281 case MSR_EFER:
1282 if (cpu_has_load_ia32_efer) {
1283 add_atomic_switch_msr_special(VM_ENTRY_LOAD_IA32_EFER,
1284 VM_EXIT_LOAD_IA32_EFER,
1285 GUEST_IA32_EFER,
1286 HOST_IA32_EFER,
1287 guest_val, host_val);
1288 return;
1289 }
1290 break;
1291 case MSR_CORE_PERF_GLOBAL_CTRL:
1292 if (cpu_has_load_perf_global_ctrl) {
1293 add_atomic_switch_msr_special(
1294 VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL,
1295 VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL,
1296 GUEST_IA32_PERF_GLOBAL_CTRL,
1297 HOST_IA32_PERF_GLOBAL_CTRL,
1298 guest_val, host_val);
1299 return;
1300 }
1301 break;
Avi Kivity110312c2010-12-21 12:54:20 +02001302 }
1303
Avi Kivity61d2ef22010-04-28 16:40:38 +03001304 for (i = 0; i < m->nr; ++i)
1305 if (m->guest[i].index == msr)
1306 break;
1307
Gleb Natapove7fc6f93b2011-10-05 14:01:24 +02001308 if (i == NR_AUTOLOAD_MSRS) {
1309 printk_once(KERN_WARNING"Not enough mst switch entries. "
1310 "Can't add msr %x\n", msr);
1311 return;
1312 } else if (i == m->nr) {
Avi Kivity61d2ef22010-04-28 16:40:38 +03001313 ++m->nr;
1314 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->nr);
1315 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr);
1316 }
1317
1318 m->guest[i].index = msr;
1319 m->guest[i].value = guest_val;
1320 m->host[i].index = msr;
1321 m->host[i].value = host_val;
1322}
1323
Avi Kivity33ed6322007-05-02 16:54:03 +03001324static void reload_tss(void)
1325{
Avi Kivity33ed6322007-05-02 16:54:03 +03001326 /*
1327 * VT restores TR but not its size. Useless.
1328 */
Avi Kivityd3591922010-07-26 18:32:39 +03001329 struct desc_ptr *gdt = &__get_cpu_var(host_gdt);
Avi Kivitya5f61302008-02-20 17:57:21 +02001330 struct desc_struct *descs;
Avi Kivity33ed6322007-05-02 16:54:03 +03001331
Avi Kivityd3591922010-07-26 18:32:39 +03001332 descs = (void *)gdt->address;
Avi Kivity33ed6322007-05-02 16:54:03 +03001333 descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
1334 load_TR_desc();
Avi Kivity33ed6322007-05-02 16:54:03 +03001335}
1336
Avi Kivity92c0d902009-10-29 11:00:16 +02001337static bool update_transition_efer(struct vcpu_vmx *vmx, int efer_offset)
Eddie Dong2cc51562007-05-21 07:28:09 +03001338{
Roel Kluin3a34a882009-08-04 02:08:45 -07001339 u64 guest_efer;
Avi Kivity51c6cf62007-08-29 03:48:05 +03001340 u64 ignore_bits;
Eddie Dong2cc51562007-05-21 07:28:09 +03001341
Avi Kivityf6801df2010-01-21 15:31:50 +02001342 guest_efer = vmx->vcpu.arch.efer;
Roel Kluin3a34a882009-08-04 02:08:45 -07001343
Avi Kivity51c6cf62007-08-29 03:48:05 +03001344 /*
Guo Chao0fa06072012-06-28 15:16:19 +08001345 * NX is emulated; LMA and LME handled by hardware; SCE meaningless
Avi Kivity51c6cf62007-08-29 03:48:05 +03001346 * outside long mode
1347 */
1348 ignore_bits = EFER_NX | EFER_SCE;
1349#ifdef CONFIG_X86_64
1350 ignore_bits |= EFER_LMA | EFER_LME;
1351 /* SCE is meaningful only in long mode on Intel */
1352 if (guest_efer & EFER_LMA)
1353 ignore_bits &= ~(u64)EFER_SCE;
1354#endif
Avi Kivity51c6cf62007-08-29 03:48:05 +03001355 guest_efer &= ~ignore_bits;
1356 guest_efer |= host_efer & ignore_bits;
Avi Kivity26bb0982009-09-07 11:14:12 +03001357 vmx->guest_msrs[efer_offset].data = guest_efer;
Avi Kivityd5696722009-12-02 12:28:47 +02001358 vmx->guest_msrs[efer_offset].mask = ~ignore_bits;
Avi Kivity84ad33e2010-04-28 16:42:29 +03001359
1360 clear_atomic_switch_msr(vmx, MSR_EFER);
1361 /* On ept, can't emulate nx, and must switch nx atomically */
1362 if (enable_ept && ((vmx->vcpu.arch.efer ^ host_efer) & EFER_NX)) {
1363 guest_efer = vmx->vcpu.arch.efer;
1364 if (!(guest_efer & EFER_LMA))
1365 guest_efer &= ~EFER_LME;
1366 add_atomic_switch_msr(vmx, MSR_EFER, guest_efer, host_efer);
1367 return false;
1368 }
1369
Avi Kivity26bb0982009-09-07 11:14:12 +03001370 return true;
Avi Kivity51c6cf62007-08-29 03:48:05 +03001371}
1372
Gleb Natapov2d49ec72010-02-25 12:43:09 +02001373static unsigned long segment_base(u16 selector)
1374{
Avi Kivityd3591922010-07-26 18:32:39 +03001375 struct desc_ptr *gdt = &__get_cpu_var(host_gdt);
Gleb Natapov2d49ec72010-02-25 12:43:09 +02001376 struct desc_struct *d;
1377 unsigned long table_base;
1378 unsigned long v;
1379
1380 if (!(selector & ~3))
1381 return 0;
1382
Avi Kivityd3591922010-07-26 18:32:39 +03001383 table_base = gdt->address;
Gleb Natapov2d49ec72010-02-25 12:43:09 +02001384
1385 if (selector & 4) { /* from ldt */
1386 u16 ldt_selector = kvm_read_ldt();
1387
1388 if (!(ldt_selector & ~3))
1389 return 0;
1390
1391 table_base = segment_base(ldt_selector);
1392 }
1393 d = (struct desc_struct *)(table_base + (selector & ~7));
1394 v = get_desc_base(d);
1395#ifdef CONFIG_X86_64
1396 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
1397 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
1398#endif
1399 return v;
1400}
1401
1402static inline unsigned long kvm_read_tr_base(void)
1403{
1404 u16 tr;
1405 asm("str %0" : "=g"(tr));
1406 return segment_base(tr);
1407}
1408
Avi Kivity04d2cc72007-09-10 18:10:54 +03001409static void vmx_save_host_state(struct kvm_vcpu *vcpu)
Avi Kivity33ed6322007-05-02 16:54:03 +03001410{
Avi Kivity04d2cc72007-09-10 18:10:54 +03001411 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity26bb0982009-09-07 11:14:12 +03001412 int i;
Avi Kivity04d2cc72007-09-10 18:10:54 +03001413
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001414 if (vmx->host_state.loaded)
Avi Kivity33ed6322007-05-02 16:54:03 +03001415 return;
1416
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001417 vmx->host_state.loaded = 1;
Avi Kivity33ed6322007-05-02 16:54:03 +03001418 /*
1419 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
1420 * allow segment selectors with cpl > 0 or ti == 1.
1421 */
Avi Kivityd6e88ae2008-07-10 16:53:33 +03001422 vmx->host_state.ldt_sel = kvm_read_ldt();
Laurent Vivier152d3f22007-08-23 16:33:11 +02001423 vmx->host_state.gs_ldt_reload_needed = vmx->host_state.ldt_sel;
Avi Kivity9581d442010-10-19 16:46:55 +02001424 savesegment(fs, vmx->host_state.fs_sel);
Laurent Vivier152d3f22007-08-23 16:33:11 +02001425 if (!(vmx->host_state.fs_sel & 7)) {
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001426 vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
Laurent Vivier152d3f22007-08-23 16:33:11 +02001427 vmx->host_state.fs_reload_needed = 0;
1428 } else {
Avi Kivity33ed6322007-05-02 16:54:03 +03001429 vmcs_write16(HOST_FS_SELECTOR, 0);
Laurent Vivier152d3f22007-08-23 16:33:11 +02001430 vmx->host_state.fs_reload_needed = 1;
Avi Kivity33ed6322007-05-02 16:54:03 +03001431 }
Avi Kivity9581d442010-10-19 16:46:55 +02001432 savesegment(gs, vmx->host_state.gs_sel);
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001433 if (!(vmx->host_state.gs_sel & 7))
1434 vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel);
Avi Kivity33ed6322007-05-02 16:54:03 +03001435 else {
1436 vmcs_write16(HOST_GS_SELECTOR, 0);
Laurent Vivier152d3f22007-08-23 16:33:11 +02001437 vmx->host_state.gs_ldt_reload_needed = 1;
Avi Kivity33ed6322007-05-02 16:54:03 +03001438 }
1439
1440#ifdef CONFIG_X86_64
Avi Kivityb2da15a2012-05-13 19:53:24 +03001441 savesegment(ds, vmx->host_state.ds_sel);
1442 savesegment(es, vmx->host_state.es_sel);
1443#endif
1444
1445#ifdef CONFIG_X86_64
Avi Kivity33ed6322007-05-02 16:54:03 +03001446 vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1447 vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1448#else
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001449 vmcs_writel(HOST_FS_BASE, segment_base(vmx->host_state.fs_sel));
1450 vmcs_writel(HOST_GS_BASE, segment_base(vmx->host_state.gs_sel));
Avi Kivity33ed6322007-05-02 16:54:03 +03001451#endif
Avi Kivity707c0872007-05-02 17:33:43 +03001452
1453#ifdef CONFIG_X86_64
Avi Kivityc8770e72010-11-11 12:37:26 +02001454 rdmsrl(MSR_KERNEL_GS_BASE, vmx->msr_host_kernel_gs_base);
1455 if (is_long_mode(&vmx->vcpu))
Avi Kivity44ea2b12009-09-06 15:55:37 +03001456 wrmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base);
Avi Kivity707c0872007-05-02 17:33:43 +03001457#endif
Avi Kivity26bb0982009-09-07 11:14:12 +03001458 for (i = 0; i < vmx->save_nmsrs; ++i)
1459 kvm_set_shared_msr(vmx->guest_msrs[i].index,
Avi Kivityd5696722009-12-02 12:28:47 +02001460 vmx->guest_msrs[i].data,
1461 vmx->guest_msrs[i].mask);
Avi Kivity33ed6322007-05-02 16:54:03 +03001462}
1463
Avi Kivitya9b21b62008-06-24 11:48:49 +03001464static void __vmx_load_host_state(struct vcpu_vmx *vmx)
Avi Kivity33ed6322007-05-02 16:54:03 +03001465{
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001466 if (!vmx->host_state.loaded)
Avi Kivity33ed6322007-05-02 16:54:03 +03001467 return;
1468
Avi Kivitye1beb1d2007-11-18 13:50:24 +02001469 ++vmx->vcpu.stat.host_state_reload;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001470 vmx->host_state.loaded = 0;
Avi Kivityc8770e72010-11-11 12:37:26 +02001471#ifdef CONFIG_X86_64
1472 if (is_long_mode(&vmx->vcpu))
1473 rdmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base);
1474#endif
Laurent Vivier152d3f22007-08-23 16:33:11 +02001475 if (vmx->host_state.gs_ldt_reload_needed) {
Avi Kivityd6e88ae2008-07-10 16:53:33 +03001476 kvm_load_ldt(vmx->host_state.ldt_sel);
Avi Kivity33ed6322007-05-02 16:54:03 +03001477#ifdef CONFIG_X86_64
Avi Kivity9581d442010-10-19 16:46:55 +02001478 load_gs_index(vmx->host_state.gs_sel);
Avi Kivity9581d442010-10-19 16:46:55 +02001479#else
1480 loadsegment(gs, vmx->host_state.gs_sel);
Avi Kivity33ed6322007-05-02 16:54:03 +03001481#endif
Avi Kivity33ed6322007-05-02 16:54:03 +03001482 }
Avi Kivity0a77fe42010-10-19 18:48:35 +02001483 if (vmx->host_state.fs_reload_needed)
1484 loadsegment(fs, vmx->host_state.fs_sel);
Avi Kivityb2da15a2012-05-13 19:53:24 +03001485#ifdef CONFIG_X86_64
1486 if (unlikely(vmx->host_state.ds_sel | vmx->host_state.es_sel)) {
1487 loadsegment(ds, vmx->host_state.ds_sel);
1488 loadsegment(es, vmx->host_state.es_sel);
1489 }
Avi Kivityb2da15a2012-05-13 19:53:24 +03001490#endif
Laurent Vivier152d3f22007-08-23 16:33:11 +02001491 reload_tss();
Avi Kivity44ea2b12009-09-06 15:55:37 +03001492#ifdef CONFIG_X86_64
Avi Kivityc8770e72010-11-11 12:37:26 +02001493 wrmsrl(MSR_KERNEL_GS_BASE, vmx->msr_host_kernel_gs_base);
Avi Kivity44ea2b12009-09-06 15:55:37 +03001494#endif
Linus Torvalds1361b832012-02-21 13:19:22 -08001495 if (user_has_fpu())
Avi Kivity1c11e712010-05-03 16:05:44 +03001496 clts();
Avi Kivity3444d7d2010-07-26 18:32:38 +03001497 load_gdt(&__get_cpu_var(host_gdt));
Avi Kivity33ed6322007-05-02 16:54:03 +03001498}
1499
Avi Kivitya9b21b62008-06-24 11:48:49 +03001500static void vmx_load_host_state(struct vcpu_vmx *vmx)
1501{
1502 preempt_disable();
1503 __vmx_load_host_state(vmx);
1504 preempt_enable();
1505}
1506
Avi Kivity6aa8b732006-12-10 02:21:36 -08001507/*
1508 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
1509 * vcpu mutex is already taken.
1510 */
Avi Kivity15ad7142007-07-11 18:17:21 +03001511static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08001512{
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001513 struct vcpu_vmx *vmx = to_vmx(vcpu);
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08001514 u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
Avi Kivity6aa8b732006-12-10 02:21:36 -08001515
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08001516 if (!vmm_exclusive)
1517 kvm_cpu_vmxon(phys_addr);
Nadav Har'Eld462b812011-05-24 15:26:10 +03001518 else if (vmx->loaded_vmcs->cpu != cpu)
1519 loaded_vmcs_clear(vmx->loaded_vmcs);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001520
Nadav Har'Eld462b812011-05-24 15:26:10 +03001521 if (per_cpu(current_vmcs, cpu) != vmx->loaded_vmcs->vmcs) {
1522 per_cpu(current_vmcs, cpu) = vmx->loaded_vmcs->vmcs;
1523 vmcs_load(vmx->loaded_vmcs->vmcs);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001524 }
1525
Nadav Har'Eld462b812011-05-24 15:26:10 +03001526 if (vmx->loaded_vmcs->cpu != cpu) {
Avi Kivityd3591922010-07-26 18:32:39 +03001527 struct desc_ptr *gdt = &__get_cpu_var(host_gdt);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001528 unsigned long sysenter_esp;
1529
Avi Kivitya8eeb042010-05-10 12:34:53 +03001530 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
Dongxiao Xu92fe13b2010-05-11 18:29:42 +08001531 local_irq_disable();
Nadav Har'Eld462b812011-05-24 15:26:10 +03001532 list_add(&vmx->loaded_vmcs->loaded_vmcss_on_cpu_link,
1533 &per_cpu(loaded_vmcss_on_cpu, cpu));
Dongxiao Xu92fe13b2010-05-11 18:29:42 +08001534 local_irq_enable();
1535
Avi Kivity6aa8b732006-12-10 02:21:36 -08001536 /*
1537 * Linux uses per-cpu TSS and GDT, so set these when switching
1538 * processors.
1539 */
Avi Kivityd6e88ae2008-07-10 16:53:33 +03001540 vmcs_writel(HOST_TR_BASE, kvm_read_tr_base()); /* 22.2.4 */
Avi Kivityd3591922010-07-26 18:32:39 +03001541 vmcs_writel(HOST_GDTR_BASE, gdt->address); /* 22.2.4 */
Avi Kivity6aa8b732006-12-10 02:21:36 -08001542
1543 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
1544 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
Nadav Har'Eld462b812011-05-24 15:26:10 +03001545 vmx->loaded_vmcs->cpu = cpu;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001546 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08001547}
1548
1549static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
1550{
Avi Kivitya9b21b62008-06-24 11:48:49 +03001551 __vmx_load_host_state(to_vmx(vcpu));
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08001552 if (!vmm_exclusive) {
Nadav Har'Eld462b812011-05-24 15:26:10 +03001553 __loaded_vmcs_clear(to_vmx(vcpu)->loaded_vmcs);
1554 vcpu->cpu = -1;
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08001555 kvm_cpu_vmxoff();
1556 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08001557}
1558
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001559static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
1560{
Avi Kivity81231c62010-01-24 16:26:40 +02001561 ulong cr0;
1562
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001563 if (vcpu->fpu_active)
1564 return;
1565 vcpu->fpu_active = 1;
Avi Kivity81231c62010-01-24 16:26:40 +02001566 cr0 = vmcs_readl(GUEST_CR0);
1567 cr0 &= ~(X86_CR0_TS | X86_CR0_MP);
1568 cr0 |= kvm_read_cr0_bits(vcpu, X86_CR0_TS | X86_CR0_MP);
1569 vmcs_writel(GUEST_CR0, cr0);
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001570 update_exception_bitmap(vcpu);
Avi Kivityedcafe32009-12-30 18:07:40 +02001571 vcpu->arch.cr0_guest_owned_bits = X86_CR0_TS;
Nadav Har'El36cf24e2011-05-25 23:15:08 +03001572 if (is_guest_mode(vcpu))
1573 vcpu->arch.cr0_guest_owned_bits &=
1574 ~get_vmcs12(vcpu)->cr0_guest_host_mask;
Avi Kivityedcafe32009-12-30 18:07:40 +02001575 vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001576}
1577
Avi Kivityedcafe32009-12-30 18:07:40 +02001578static void vmx_decache_cr0_guest_bits(struct kvm_vcpu *vcpu);
1579
Nadav Har'Elfe3ef052011-05-25 23:10:02 +03001580/*
1581 * Return the cr0 value that a nested guest would read. This is a combination
1582 * of the real cr0 used to run the guest (guest_cr0), and the bits shadowed by
1583 * its hypervisor (cr0_read_shadow).
1584 */
1585static inline unsigned long nested_read_cr0(struct vmcs12 *fields)
1586{
1587 return (fields->guest_cr0 & ~fields->cr0_guest_host_mask) |
1588 (fields->cr0_read_shadow & fields->cr0_guest_host_mask);
1589}
1590static inline unsigned long nested_read_cr4(struct vmcs12 *fields)
1591{
1592 return (fields->guest_cr4 & ~fields->cr4_guest_host_mask) |
1593 (fields->cr4_read_shadow & fields->cr4_guest_host_mask);
1594}
1595
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001596static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
1597{
Nadav Har'El36cf24e2011-05-25 23:15:08 +03001598 /* Note that there is no vcpu->fpu_active = 0 here. The caller must
1599 * set this *before* calling this function.
1600 */
Avi Kivityedcafe32009-12-30 18:07:40 +02001601 vmx_decache_cr0_guest_bits(vcpu);
Avi Kivity81231c62010-01-24 16:26:40 +02001602 vmcs_set_bits(GUEST_CR0, X86_CR0_TS | X86_CR0_MP);
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001603 update_exception_bitmap(vcpu);
Avi Kivityedcafe32009-12-30 18:07:40 +02001604 vcpu->arch.cr0_guest_owned_bits = 0;
1605 vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
Nadav Har'El36cf24e2011-05-25 23:15:08 +03001606 if (is_guest_mode(vcpu)) {
1607 /*
1608 * L1's specified read shadow might not contain the TS bit,
1609 * so now that we turned on shadowing of this bit, we need to
1610 * set this bit of the shadow. Like in nested_vmx_run we need
1611 * nested_read_cr0(vmcs12), but vmcs12->guest_cr0 is not yet
1612 * up-to-date here because we just decached cr0.TS (and we'll
1613 * only update vmcs12->guest_cr0 on nested exit).
1614 */
1615 struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
1616 vmcs12->guest_cr0 = (vmcs12->guest_cr0 & ~X86_CR0_TS) |
1617 (vcpu->arch.cr0 & X86_CR0_TS);
1618 vmcs_writel(CR0_READ_SHADOW, nested_read_cr0(vmcs12));
1619 } else
1620 vmcs_writel(CR0_READ_SHADOW, vcpu->arch.cr0);
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001621}
1622
Avi Kivity6aa8b732006-12-10 02:21:36 -08001623static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
1624{
Avi Kivity78ac8b42010-04-08 18:19:35 +03001625 unsigned long rflags, save_rflags;
Avi Kivity345dcaa2009-08-12 15:29:37 +03001626
Avi Kivity6de12732011-03-07 12:51:22 +02001627 if (!test_bit(VCPU_EXREG_RFLAGS, (ulong *)&vcpu->arch.regs_avail)) {
1628 __set_bit(VCPU_EXREG_RFLAGS, (ulong *)&vcpu->arch.regs_avail);
1629 rflags = vmcs_readl(GUEST_RFLAGS);
1630 if (to_vmx(vcpu)->rmode.vm86_active) {
1631 rflags &= RMODE_GUEST_OWNED_EFLAGS_BITS;
1632 save_rflags = to_vmx(vcpu)->rmode.save_rflags;
1633 rflags |= save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS;
1634 }
1635 to_vmx(vcpu)->rflags = rflags;
Avi Kivity78ac8b42010-04-08 18:19:35 +03001636 }
Avi Kivity6de12732011-03-07 12:51:22 +02001637 return to_vmx(vcpu)->rflags;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001638}
1639
1640static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
1641{
Avi Kivity6de12732011-03-07 12:51:22 +02001642 __set_bit(VCPU_EXREG_RFLAGS, (ulong *)&vcpu->arch.regs_avail);
Avi Kivity69c73022011-03-07 15:26:44 +02001643 __clear_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail);
Avi Kivity6de12732011-03-07 12:51:22 +02001644 to_vmx(vcpu)->rflags = rflags;
Avi Kivity78ac8b42010-04-08 18:19:35 +03001645 if (to_vmx(vcpu)->rmode.vm86_active) {
1646 to_vmx(vcpu)->rmode.save_rflags = rflags;
Glauber de Oliveira Costa053de042008-01-30 13:31:27 +01001647 rflags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
Avi Kivity78ac8b42010-04-08 18:19:35 +03001648 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08001649 vmcs_writel(GUEST_RFLAGS, rflags);
1650}
1651
Glauber Costa2809f5d2009-05-12 16:21:05 -04001652static u32 vmx_get_interrupt_shadow(struct kvm_vcpu *vcpu, int mask)
1653{
1654 u32 interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
1655 int ret = 0;
1656
1657 if (interruptibility & GUEST_INTR_STATE_STI)
Jan Kiszka48005f62010-02-19 19:38:07 +01001658 ret |= KVM_X86_SHADOW_INT_STI;
Glauber Costa2809f5d2009-05-12 16:21:05 -04001659 if (interruptibility & GUEST_INTR_STATE_MOV_SS)
Jan Kiszka48005f62010-02-19 19:38:07 +01001660 ret |= KVM_X86_SHADOW_INT_MOV_SS;
Glauber Costa2809f5d2009-05-12 16:21:05 -04001661
1662 return ret & mask;
1663}
1664
1665static void vmx_set_interrupt_shadow(struct kvm_vcpu *vcpu, int mask)
1666{
1667 u32 interruptibility_old = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
1668 u32 interruptibility = interruptibility_old;
1669
1670 interruptibility &= ~(GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS);
1671
Jan Kiszka48005f62010-02-19 19:38:07 +01001672 if (mask & KVM_X86_SHADOW_INT_MOV_SS)
Glauber Costa2809f5d2009-05-12 16:21:05 -04001673 interruptibility |= GUEST_INTR_STATE_MOV_SS;
Jan Kiszka48005f62010-02-19 19:38:07 +01001674 else if (mask & KVM_X86_SHADOW_INT_STI)
Glauber Costa2809f5d2009-05-12 16:21:05 -04001675 interruptibility |= GUEST_INTR_STATE_STI;
1676
1677 if ((interruptibility != interruptibility_old))
1678 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, interruptibility);
1679}
1680
Avi Kivity6aa8b732006-12-10 02:21:36 -08001681static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
1682{
1683 unsigned long rip;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001684
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03001685 rip = kvm_rip_read(vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001686 rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03001687 kvm_rip_write(vcpu, rip);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001688
Glauber Costa2809f5d2009-05-12 16:21:05 -04001689 /* skipping an emulated instruction also counts */
1690 vmx_set_interrupt_shadow(vcpu, 0);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001691}
1692
Nadav Har'El0b6ac342011-05-25 23:13:36 +03001693/*
1694 * KVM wants to inject page-faults which it got to the guest. This function
1695 * checks whether in a nested guest, we need to inject them to L1 or L2.
1696 * This function assumes it is called with the exit reason in vmcs02 being
1697 * a #PF exception (this is the only case in which KVM injects a #PF when L2
1698 * is running).
1699 */
1700static int nested_pf_handled(struct kvm_vcpu *vcpu)
1701{
1702 struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
1703
1704 /* TODO: also check PFEC_MATCH/MASK, not just EB.PF. */
Nadav Har'El95871902012-03-06 16:39:22 +02001705 if (!(vmcs12->exception_bitmap & (1u << PF_VECTOR)))
Nadav Har'El0b6ac342011-05-25 23:13:36 +03001706 return 0;
1707
1708 nested_vmx_vmexit(vcpu);
1709 return 1;
1710}
1711
Avi Kivity298101d2007-11-25 13:41:11 +02001712static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
Joerg Roedelce7ddec2010-04-22 12:33:13 +02001713 bool has_error_code, u32 error_code,
1714 bool reinject)
Avi Kivity298101d2007-11-25 13:41:11 +02001715{
Jan Kiszka77ab6db2008-07-14 12:28:51 +02001716 struct vcpu_vmx *vmx = to_vmx(vcpu);
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +01001717 u32 intr_info = nr | INTR_INFO_VALID_MASK;
Jan Kiszka77ab6db2008-07-14 12:28:51 +02001718
Nadav Har'El0b6ac342011-05-25 23:13:36 +03001719 if (nr == PF_VECTOR && is_guest_mode(vcpu) &&
1720 nested_pf_handled(vcpu))
1721 return;
1722
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +01001723 if (has_error_code) {
Jan Kiszka77ab6db2008-07-14 12:28:51 +02001724 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +01001725 intr_info |= INTR_INFO_DELIVER_CODE_MASK;
1726 }
Jan Kiszka77ab6db2008-07-14 12:28:51 +02001727
Avi Kivity7ffd92c2009-06-09 14:10:45 +03001728 if (vmx->rmode.vm86_active) {
Serge E. Hallyn71f98332011-04-13 09:12:54 -05001729 int inc_eip = 0;
1730 if (kvm_exception_is_soft(nr))
1731 inc_eip = vcpu->arch.event_exit_inst_len;
1732 if (kvm_inject_realmode_interrupt(vcpu, nr, inc_eip) != EMULATE_DONE)
Mohammed Gamala92601b2010-09-19 14:34:07 +02001733 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
Jan Kiszka77ab6db2008-07-14 12:28:51 +02001734 return;
1735 }
1736
Gleb Natapov66fd3f72009-05-11 13:35:50 +03001737 if (kvm_exception_is_soft(nr)) {
1738 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
1739 vmx->vcpu.arch.event_exit_inst_len);
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +01001740 intr_info |= INTR_TYPE_SOFT_EXCEPTION;
1741 } else
1742 intr_info |= INTR_TYPE_HARD_EXCEPTION;
1743
1744 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info);
Avi Kivity298101d2007-11-25 13:41:11 +02001745}
1746
Sheng Yang4e47c7a2009-12-18 16:48:47 +08001747static bool vmx_rdtscp_supported(void)
1748{
1749 return cpu_has_vmx_rdtscp();
1750}
1751
Mao, Junjiead756a12012-07-02 01:18:48 +00001752static bool vmx_invpcid_supported(void)
1753{
1754 return cpu_has_vmx_invpcid() && enable_ept;
1755}
1756
Avi Kivity6aa8b732006-12-10 02:21:36 -08001757/*
Eddie Donga75beee2007-05-17 18:55:15 +03001758 * Swap MSR entry in host/guest MSR entry array.
1759 */
Rusty Russell8b9cf982007-07-30 16:31:43 +10001760static void move_msr_up(struct vcpu_vmx *vmx, int from, int to)
Eddie Donga75beee2007-05-17 18:55:15 +03001761{
Avi Kivity26bb0982009-09-07 11:14:12 +03001762 struct shared_msr_entry tmp;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001763
1764 tmp = vmx->guest_msrs[to];
1765 vmx->guest_msrs[to] = vmx->guest_msrs[from];
1766 vmx->guest_msrs[from] = tmp;
Eddie Donga75beee2007-05-17 18:55:15 +03001767}
1768
1769/*
Avi Kivitye38aea32007-04-19 13:22:48 +03001770 * Set up the vmcs to automatically save and restore system
1771 * msrs. Don't touch the 64-bit msrs if the guest is in legacy
1772 * mode, as fiddling with msrs is very expensive.
1773 */
Rusty Russell8b9cf982007-07-30 16:31:43 +10001774static void setup_msrs(struct vcpu_vmx *vmx)
Avi Kivitye38aea32007-04-19 13:22:48 +03001775{
Avi Kivity26bb0982009-09-07 11:14:12 +03001776 int save_nmsrs, index;
Avi Kivity58972972009-02-24 22:26:47 +02001777 unsigned long *msr_bitmap;
Avi Kivitye38aea32007-04-19 13:22:48 +03001778
Eddie Donga75beee2007-05-17 18:55:15 +03001779 save_nmsrs = 0;
Avi Kivity4d56c8a2007-04-19 14:28:44 +03001780#ifdef CONFIG_X86_64
Rusty Russell8b9cf982007-07-30 16:31:43 +10001781 if (is_long_mode(&vmx->vcpu)) {
Rusty Russell8b9cf982007-07-30 16:31:43 +10001782 index = __find_msr_index(vmx, MSR_SYSCALL_MASK);
Eddie Donga75beee2007-05-17 18:55:15 +03001783 if (index >= 0)
Rusty Russell8b9cf982007-07-30 16:31:43 +10001784 move_msr_up(vmx, index, save_nmsrs++);
1785 index = __find_msr_index(vmx, MSR_LSTAR);
Eddie Donga75beee2007-05-17 18:55:15 +03001786 if (index >= 0)
Rusty Russell8b9cf982007-07-30 16:31:43 +10001787 move_msr_up(vmx, index, save_nmsrs++);
1788 index = __find_msr_index(vmx, MSR_CSTAR);
Eddie Donga75beee2007-05-17 18:55:15 +03001789 if (index >= 0)
Rusty Russell8b9cf982007-07-30 16:31:43 +10001790 move_msr_up(vmx, index, save_nmsrs++);
Sheng Yang4e47c7a2009-12-18 16:48:47 +08001791 index = __find_msr_index(vmx, MSR_TSC_AUX);
1792 if (index >= 0 && vmx->rdtscp_enabled)
1793 move_msr_up(vmx, index, save_nmsrs++);
Eddie Donga75beee2007-05-17 18:55:15 +03001794 /*
Brian Gerst8c065852010-07-17 09:03:26 -04001795 * MSR_STAR is only needed on long mode guests, and only
Eddie Donga75beee2007-05-17 18:55:15 +03001796 * if efer.sce is enabled.
1797 */
Brian Gerst8c065852010-07-17 09:03:26 -04001798 index = __find_msr_index(vmx, MSR_STAR);
Avi Kivityf6801df2010-01-21 15:31:50 +02001799 if ((index >= 0) && (vmx->vcpu.arch.efer & EFER_SCE))
Rusty Russell8b9cf982007-07-30 16:31:43 +10001800 move_msr_up(vmx, index, save_nmsrs++);
Avi Kivity4d56c8a2007-04-19 14:28:44 +03001801 }
Eddie Donga75beee2007-05-17 18:55:15 +03001802#endif
Avi Kivity92c0d902009-10-29 11:00:16 +02001803 index = __find_msr_index(vmx, MSR_EFER);
1804 if (index >= 0 && update_transition_efer(vmx, index))
Avi Kivity26bb0982009-09-07 11:14:12 +03001805 move_msr_up(vmx, index, save_nmsrs++);
Avi Kivity4d56c8a2007-04-19 14:28:44 +03001806
Avi Kivity26bb0982009-09-07 11:14:12 +03001807 vmx->save_nmsrs = save_nmsrs;
Avi Kivity58972972009-02-24 22:26:47 +02001808
1809 if (cpu_has_vmx_msr_bitmap()) {
1810 if (is_long_mode(&vmx->vcpu))
1811 msr_bitmap = vmx_msr_bitmap_longmode;
1812 else
1813 msr_bitmap = vmx_msr_bitmap_legacy;
1814
1815 vmcs_write64(MSR_BITMAP, __pa(msr_bitmap));
1816 }
Avi Kivitye38aea32007-04-19 13:22:48 +03001817}
1818
1819/*
Avi Kivity6aa8b732006-12-10 02:21:36 -08001820 * reads and returns guest's timestamp counter "register"
1821 * guest_tsc = host_tsc + tsc_offset -- 21.3
1822 */
1823static u64 guest_read_tsc(void)
1824{
1825 u64 host_tsc, tsc_offset;
1826
1827 rdtscll(host_tsc);
1828 tsc_offset = vmcs_read64(TSC_OFFSET);
1829 return host_tsc + tsc_offset;
1830}
1831
1832/*
Nadav Har'Eld5c17852011-08-02 15:54:20 +03001833 * Like guest_read_tsc, but always returns L1's notion of the timestamp
1834 * counter, even if a nested guest (L2) is currently running.
1835 */
1836u64 vmx_read_l1_tsc(struct kvm_vcpu *vcpu)
1837{
1838 u64 host_tsc, tsc_offset;
1839
1840 rdtscll(host_tsc);
1841 tsc_offset = is_guest_mode(vcpu) ?
1842 to_vmx(vcpu)->nested.vmcs01_tsc_offset :
1843 vmcs_read64(TSC_OFFSET);
1844 return host_tsc + tsc_offset;
1845}
1846
1847/*
Zachary Amsdencc578282012-02-03 15:43:50 -02001848 * Engage any workarounds for mis-matched TSC rates. Currently limited to
1849 * software catchup for faster rates on slower CPUs.
Joerg Roedel4051b182011-03-25 09:44:49 +01001850 */
Zachary Amsdencc578282012-02-03 15:43:50 -02001851static void vmx_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
Joerg Roedel4051b182011-03-25 09:44:49 +01001852{
Zachary Amsdencc578282012-02-03 15:43:50 -02001853 if (!scale)
1854 return;
1855
1856 if (user_tsc_khz > tsc_khz) {
1857 vcpu->arch.tsc_catchup = 1;
1858 vcpu->arch.tsc_always_catchup = 1;
1859 } else
1860 WARN(1, "user requested TSC rate below hardware speed\n");
Joerg Roedel4051b182011-03-25 09:44:49 +01001861}
1862
1863/*
Zachary Amsden99e3e302010-08-19 22:07:17 -10001864 * writes 'offset' into guest's timestamp counter offset register
Avi Kivity6aa8b732006-12-10 02:21:36 -08001865 */
Zachary Amsden99e3e302010-08-19 22:07:17 -10001866static void vmx_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
Avi Kivity6aa8b732006-12-10 02:21:36 -08001867{
Nadav Har'El27fc51b2011-08-02 15:54:52 +03001868 if (is_guest_mode(vcpu)) {
Nadav Har'El79918252011-05-25 23:15:39 +03001869 /*
Nadav Har'El27fc51b2011-08-02 15:54:52 +03001870 * We're here if L1 chose not to trap WRMSR to TSC. According
1871 * to the spec, this should set L1's TSC; The offset that L1
1872 * set for L2 remains unchanged, and still needs to be added
1873 * to the newly set TSC to get L2's TSC.
Nadav Har'El79918252011-05-25 23:15:39 +03001874 */
Nadav Har'El27fc51b2011-08-02 15:54:52 +03001875 struct vmcs12 *vmcs12;
1876 to_vmx(vcpu)->nested.vmcs01_tsc_offset = offset;
1877 /* recalculate vmcs02.TSC_OFFSET: */
1878 vmcs12 = get_vmcs12(vcpu);
1879 vmcs_write64(TSC_OFFSET, offset +
1880 (nested_cpu_has(vmcs12, CPU_BASED_USE_TSC_OFFSETING) ?
1881 vmcs12->tsc_offset : 0));
1882 } else {
1883 vmcs_write64(TSC_OFFSET, offset);
1884 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08001885}
1886
Marcelo Tosattif1e2b262012-02-03 15:43:55 -02001887static void vmx_adjust_tsc_offset(struct kvm_vcpu *vcpu, s64 adjustment, bool host)
Zachary Amsdene48672f2010-08-19 22:07:23 -10001888{
1889 u64 offset = vmcs_read64(TSC_OFFSET);
1890 vmcs_write64(TSC_OFFSET, offset + adjustment);
Nadav Har'El79918252011-05-25 23:15:39 +03001891 if (is_guest_mode(vcpu)) {
1892 /* Even when running L2, the adjustment needs to apply to L1 */
1893 to_vmx(vcpu)->nested.vmcs01_tsc_offset += adjustment;
1894 }
Zachary Amsdene48672f2010-08-19 22:07:23 -10001895}
1896
Joerg Roedel857e4092011-03-25 09:44:50 +01001897static u64 vmx_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1898{
1899 return target_tsc - native_read_tsc();
1900}
1901
Nadav Har'El801d3422011-05-25 23:02:23 +03001902static bool guest_cpuid_has_vmx(struct kvm_vcpu *vcpu)
1903{
1904 struct kvm_cpuid_entry2 *best = kvm_find_cpuid_entry(vcpu, 1, 0);
1905 return best && (best->ecx & (1 << (X86_FEATURE_VMX & 31)));
1906}
1907
1908/*
1909 * nested_vmx_allowed() checks whether a guest should be allowed to use VMX
1910 * instructions and MSRs (i.e., nested VMX). Nested VMX is disabled for
1911 * all guests if the "nested" module option is off, and can also be disabled
1912 * for a single guest by disabling its VMX cpuid bit.
1913 */
1914static inline bool nested_vmx_allowed(struct kvm_vcpu *vcpu)
1915{
1916 return nested && guest_cpuid_has_vmx(vcpu);
1917}
1918
Avi Kivity6aa8b732006-12-10 02:21:36 -08001919/*
Nadav Har'Elb87a51a2011-05-25 23:04:25 +03001920 * nested_vmx_setup_ctls_msrs() sets up variables containing the values to be
1921 * returned for the various VMX controls MSRs when nested VMX is enabled.
1922 * The same values should also be used to verify that vmcs12 control fields are
1923 * valid during nested entry from L1 to L2.
1924 * Each of these control msrs has a low and high 32-bit half: A low bit is on
1925 * if the corresponding bit in the (32-bit) control field *must* be on, and a
1926 * bit in the high half is on if the corresponding bit in the control field
1927 * may be on. See also vmx_control_verify().
1928 * TODO: allow these variables to be modified (downgraded) by module options
1929 * or other means.
1930 */
1931static u32 nested_vmx_procbased_ctls_low, nested_vmx_procbased_ctls_high;
1932static u32 nested_vmx_secondary_ctls_low, nested_vmx_secondary_ctls_high;
1933static u32 nested_vmx_pinbased_ctls_low, nested_vmx_pinbased_ctls_high;
1934static u32 nested_vmx_exit_ctls_low, nested_vmx_exit_ctls_high;
1935static u32 nested_vmx_entry_ctls_low, nested_vmx_entry_ctls_high;
1936static __init void nested_vmx_setup_ctls_msrs(void)
1937{
1938 /*
1939 * Note that as a general rule, the high half of the MSRs (bits in
1940 * the control fields which may be 1) should be initialized by the
1941 * intersection of the underlying hardware's MSR (i.e., features which
1942 * can be supported) and the list of features we want to expose -
1943 * because they are known to be properly supported in our code.
1944 * Also, usually, the low half of the MSRs (bits which must be 1) can
1945 * be set to 0, meaning that L1 may turn off any of these bits. The
1946 * reason is that if one of these bits is necessary, it will appear
1947 * in vmcs01 and prepare_vmcs02, when it bitwise-or's the control
1948 * fields of vmcs01 and vmcs02, will turn these bits off - and
1949 * nested_vmx_exit_handled() will not pass related exits to L1.
1950 * These rules have exceptions below.
1951 */
1952
1953 /* pin-based controls */
1954 /*
1955 * According to the Intel spec, if bit 55 of VMX_BASIC is off (as it is
1956 * in our case), bits 1, 2 and 4 (i.e., 0x16) must be 1 in this MSR.
1957 */
1958 nested_vmx_pinbased_ctls_low = 0x16 ;
1959 nested_vmx_pinbased_ctls_high = 0x16 |
1960 PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING |
1961 PIN_BASED_VIRTUAL_NMIS;
1962
1963 /* exit controls */
1964 nested_vmx_exit_ctls_low = 0;
Nadav Har'Elb6f12502011-05-25 23:13:06 +03001965 /* Note that guest use of VM_EXIT_ACK_INTR_ON_EXIT is not supported. */
Nadav Har'Elb87a51a2011-05-25 23:04:25 +03001966#ifdef CONFIG_X86_64
1967 nested_vmx_exit_ctls_high = VM_EXIT_HOST_ADDR_SPACE_SIZE;
1968#else
1969 nested_vmx_exit_ctls_high = 0;
1970#endif
1971
1972 /* entry controls */
1973 rdmsr(MSR_IA32_VMX_ENTRY_CTLS,
1974 nested_vmx_entry_ctls_low, nested_vmx_entry_ctls_high);
1975 nested_vmx_entry_ctls_low = 0;
1976 nested_vmx_entry_ctls_high &=
1977 VM_ENTRY_LOAD_IA32_PAT | VM_ENTRY_IA32E_MODE;
1978
1979 /* cpu-based controls */
1980 rdmsr(MSR_IA32_VMX_PROCBASED_CTLS,
1981 nested_vmx_procbased_ctls_low, nested_vmx_procbased_ctls_high);
1982 nested_vmx_procbased_ctls_low = 0;
1983 nested_vmx_procbased_ctls_high &=
1984 CPU_BASED_VIRTUAL_INTR_PENDING | CPU_BASED_USE_TSC_OFFSETING |
1985 CPU_BASED_HLT_EXITING | CPU_BASED_INVLPG_EXITING |
1986 CPU_BASED_MWAIT_EXITING | CPU_BASED_CR3_LOAD_EXITING |
1987 CPU_BASED_CR3_STORE_EXITING |
1988#ifdef CONFIG_X86_64
1989 CPU_BASED_CR8_LOAD_EXITING | CPU_BASED_CR8_STORE_EXITING |
1990#endif
1991 CPU_BASED_MOV_DR_EXITING | CPU_BASED_UNCOND_IO_EXITING |
1992 CPU_BASED_USE_IO_BITMAPS | CPU_BASED_MONITOR_EXITING |
Avi Kivitydbcb4e72012-08-13 15:38:22 +03001993 CPU_BASED_RDPMC_EXITING | CPU_BASED_RDTSC_EXITING |
Nadav Har'Elb87a51a2011-05-25 23:04:25 +03001994 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
1995 /*
1996 * We can allow some features even when not supported by the
1997 * hardware. For example, L1 can specify an MSR bitmap - and we
1998 * can use it to avoid exits to L1 - even when L0 runs L2
1999 * without MSR bitmaps.
2000 */
2001 nested_vmx_procbased_ctls_high |= CPU_BASED_USE_MSR_BITMAPS;
2002
2003 /* secondary cpu-based controls */
2004 rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
2005 nested_vmx_secondary_ctls_low, nested_vmx_secondary_ctls_high);
2006 nested_vmx_secondary_ctls_low = 0;
2007 nested_vmx_secondary_ctls_high &=
2008 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
2009}
2010
2011static inline bool vmx_control_verify(u32 control, u32 low, u32 high)
2012{
2013 /*
2014 * Bits 0 in high must be 0, and bits 1 in low must be 1.
2015 */
2016 return ((control & high) | low) == control;
2017}
2018
2019static inline u64 vmx_control_msr(u32 low, u32 high)
2020{
2021 return low | ((u64)high << 32);
2022}
2023
2024/*
2025 * If we allow our guest to use VMX instructions (i.e., nested VMX), we should
2026 * also let it use VMX-specific MSRs.
2027 * vmx_get_vmx_msr() and vmx_set_vmx_msr() return 1 when we handled a
2028 * VMX-specific MSR, or 0 when we haven't (and the caller should handle it
2029 * like all other MSRs).
2030 */
2031static int vmx_get_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2032{
2033 if (!nested_vmx_allowed(vcpu) && msr_index >= MSR_IA32_VMX_BASIC &&
2034 msr_index <= MSR_IA32_VMX_TRUE_ENTRY_CTLS) {
2035 /*
2036 * According to the spec, processors which do not support VMX
2037 * should throw a #GP(0) when VMX capability MSRs are read.
2038 */
2039 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
2040 return 1;
2041 }
2042
2043 switch (msr_index) {
2044 case MSR_IA32_FEATURE_CONTROL:
2045 *pdata = 0;
2046 break;
2047 case MSR_IA32_VMX_BASIC:
2048 /*
2049 * This MSR reports some information about VMX support. We
2050 * should return information about the VMX we emulate for the
2051 * guest, and the VMCS structure we give it - not about the
2052 * VMX support of the underlying hardware.
2053 */
2054 *pdata = VMCS12_REVISION |
2055 ((u64)VMCS12_SIZE << VMX_BASIC_VMCS_SIZE_SHIFT) |
2056 (VMX_BASIC_MEM_TYPE_WB << VMX_BASIC_MEM_TYPE_SHIFT);
2057 break;
2058 case MSR_IA32_VMX_TRUE_PINBASED_CTLS:
2059 case MSR_IA32_VMX_PINBASED_CTLS:
2060 *pdata = vmx_control_msr(nested_vmx_pinbased_ctls_low,
2061 nested_vmx_pinbased_ctls_high);
2062 break;
2063 case MSR_IA32_VMX_TRUE_PROCBASED_CTLS:
2064 case MSR_IA32_VMX_PROCBASED_CTLS:
2065 *pdata = vmx_control_msr(nested_vmx_procbased_ctls_low,
2066 nested_vmx_procbased_ctls_high);
2067 break;
2068 case MSR_IA32_VMX_TRUE_EXIT_CTLS:
2069 case MSR_IA32_VMX_EXIT_CTLS:
2070 *pdata = vmx_control_msr(nested_vmx_exit_ctls_low,
2071 nested_vmx_exit_ctls_high);
2072 break;
2073 case MSR_IA32_VMX_TRUE_ENTRY_CTLS:
2074 case MSR_IA32_VMX_ENTRY_CTLS:
2075 *pdata = vmx_control_msr(nested_vmx_entry_ctls_low,
2076 nested_vmx_entry_ctls_high);
2077 break;
2078 case MSR_IA32_VMX_MISC:
2079 *pdata = 0;
2080 break;
2081 /*
2082 * These MSRs specify bits which the guest must keep fixed (on or off)
2083 * while L1 is in VMXON mode (in L1's root mode, or running an L2).
2084 * We picked the standard core2 setting.
2085 */
2086#define VMXON_CR0_ALWAYSON (X86_CR0_PE | X86_CR0_PG | X86_CR0_NE)
2087#define VMXON_CR4_ALWAYSON X86_CR4_VMXE
2088 case MSR_IA32_VMX_CR0_FIXED0:
2089 *pdata = VMXON_CR0_ALWAYSON;
2090 break;
2091 case MSR_IA32_VMX_CR0_FIXED1:
2092 *pdata = -1ULL;
2093 break;
2094 case MSR_IA32_VMX_CR4_FIXED0:
2095 *pdata = VMXON_CR4_ALWAYSON;
2096 break;
2097 case MSR_IA32_VMX_CR4_FIXED1:
2098 *pdata = -1ULL;
2099 break;
2100 case MSR_IA32_VMX_VMCS_ENUM:
2101 *pdata = 0x1f;
2102 break;
2103 case MSR_IA32_VMX_PROCBASED_CTLS2:
2104 *pdata = vmx_control_msr(nested_vmx_secondary_ctls_low,
2105 nested_vmx_secondary_ctls_high);
2106 break;
2107 case MSR_IA32_VMX_EPT_VPID_CAP:
2108 /* Currently, no nested ept or nested vpid */
2109 *pdata = 0;
2110 break;
2111 default:
2112 return 0;
2113 }
2114
2115 return 1;
2116}
2117
2118static int vmx_set_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
2119{
2120 if (!nested_vmx_allowed(vcpu))
2121 return 0;
2122
2123 if (msr_index == MSR_IA32_FEATURE_CONTROL)
2124 /* TODO: the right thing. */
2125 return 1;
2126 /*
2127 * No need to treat VMX capability MSRs specially: If we don't handle
2128 * them, handle_wrmsr will #GP(0), which is correct (they are readonly)
2129 */
2130 return 0;
2131}
2132
2133/*
Avi Kivity6aa8b732006-12-10 02:21:36 -08002134 * Reads an msr value (of 'msr_index') into 'pdata'.
2135 * Returns 0 on success, non-0 otherwise.
2136 * Assumes vcpu_load() was already called.
2137 */
2138static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2139{
2140 u64 data;
Avi Kivity26bb0982009-09-07 11:14:12 +03002141 struct shared_msr_entry *msr;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002142
2143 if (!pdata) {
2144 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
2145 return -EINVAL;
2146 }
2147
2148 switch (msr_index) {
Avi Kivity05b3e0c2006-12-13 00:33:45 -08002149#ifdef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08002150 case MSR_FS_BASE:
2151 data = vmcs_readl(GUEST_FS_BASE);
2152 break;
2153 case MSR_GS_BASE:
2154 data = vmcs_readl(GUEST_GS_BASE);
2155 break;
Avi Kivity44ea2b12009-09-06 15:55:37 +03002156 case MSR_KERNEL_GS_BASE:
2157 vmx_load_host_state(to_vmx(vcpu));
2158 data = to_vmx(vcpu)->msr_guest_kernel_gs_base;
2159 break;
Avi Kivity26bb0982009-09-07 11:14:12 +03002160#endif
Avi Kivity6aa8b732006-12-10 02:21:36 -08002161 case MSR_EFER:
Avi Kivity3bab1f52006-12-29 16:49:48 -08002162 return kvm_get_msr_common(vcpu, msr_index, pdata);
Jaswinder Singh Rajputaf24a4e2009-05-15 18:42:05 +05302163 case MSR_IA32_TSC:
Avi Kivity6aa8b732006-12-10 02:21:36 -08002164 data = guest_read_tsc();
2165 break;
2166 case MSR_IA32_SYSENTER_CS:
2167 data = vmcs_read32(GUEST_SYSENTER_CS);
2168 break;
2169 case MSR_IA32_SYSENTER_EIP:
Avi Kivityf5b42c32007-03-06 12:05:53 +02002170 data = vmcs_readl(GUEST_SYSENTER_EIP);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002171 break;
2172 case MSR_IA32_SYSENTER_ESP:
Avi Kivityf5b42c32007-03-06 12:05:53 +02002173 data = vmcs_readl(GUEST_SYSENTER_ESP);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002174 break;
Sheng Yang4e47c7a2009-12-18 16:48:47 +08002175 case MSR_TSC_AUX:
2176 if (!to_vmx(vcpu)->rdtscp_enabled)
2177 return 1;
2178 /* Otherwise falls through */
Avi Kivity6aa8b732006-12-10 02:21:36 -08002179 default:
Nadav Har'Elb87a51a2011-05-25 23:04:25 +03002180 if (vmx_get_vmx_msr(vcpu, msr_index, pdata))
2181 return 0;
Rusty Russell8b9cf982007-07-30 16:31:43 +10002182 msr = find_msr_entry(to_vmx(vcpu), msr_index);
Avi Kivity3bab1f52006-12-29 16:49:48 -08002183 if (msr) {
2184 data = msr->data;
2185 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002186 }
Avi Kivity3bab1f52006-12-29 16:49:48 -08002187 return kvm_get_msr_common(vcpu, msr_index, pdata);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002188 }
2189
2190 *pdata = data;
2191 return 0;
2192}
2193
2194/*
2195 * Writes msr value into into the appropriate "register".
2196 * Returns 0 on success, non-0 otherwise.
2197 * Assumes vcpu_load() was already called.
2198 */
2199static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
2200{
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04002201 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity26bb0982009-09-07 11:14:12 +03002202 struct shared_msr_entry *msr;
Eddie Dong2cc51562007-05-21 07:28:09 +03002203 int ret = 0;
2204
Avi Kivity6aa8b732006-12-10 02:21:36 -08002205 switch (msr_index) {
Avi Kivity3bab1f52006-12-29 16:49:48 -08002206 case MSR_EFER:
Eddie Dong2cc51562007-05-21 07:28:09 +03002207 ret = kvm_set_msr_common(vcpu, msr_index, data);
Eddie Dong2cc51562007-05-21 07:28:09 +03002208 break;
Avi Kivity16175a72009-03-23 22:13:44 +02002209#ifdef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08002210 case MSR_FS_BASE:
Avi Kivity2fb92db2011-04-27 19:42:18 +03002211 vmx_segment_cache_clear(vmx);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002212 vmcs_writel(GUEST_FS_BASE, data);
2213 break;
2214 case MSR_GS_BASE:
Avi Kivity2fb92db2011-04-27 19:42:18 +03002215 vmx_segment_cache_clear(vmx);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002216 vmcs_writel(GUEST_GS_BASE, data);
2217 break;
Avi Kivity44ea2b12009-09-06 15:55:37 +03002218 case MSR_KERNEL_GS_BASE:
2219 vmx_load_host_state(vmx);
2220 vmx->msr_guest_kernel_gs_base = data;
2221 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002222#endif
2223 case MSR_IA32_SYSENTER_CS:
2224 vmcs_write32(GUEST_SYSENTER_CS, data);
2225 break;
2226 case MSR_IA32_SYSENTER_EIP:
Avi Kivityf5b42c32007-03-06 12:05:53 +02002227 vmcs_writel(GUEST_SYSENTER_EIP, data);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002228 break;
2229 case MSR_IA32_SYSENTER_ESP:
Avi Kivityf5b42c32007-03-06 12:05:53 +02002230 vmcs_writel(GUEST_SYSENTER_ESP, data);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002231 break;
Jaswinder Singh Rajputaf24a4e2009-05-15 18:42:05 +05302232 case MSR_IA32_TSC:
Zachary Amsden99e3e302010-08-19 22:07:17 -10002233 kvm_write_tsc(vcpu, data);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002234 break;
Sheng Yang468d4722008-10-09 16:01:55 +08002235 case MSR_IA32_CR_PAT:
2236 if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) {
2237 vmcs_write64(GUEST_IA32_PAT, data);
2238 vcpu->arch.pat = data;
2239 break;
2240 }
Sheng Yang4e47c7a2009-12-18 16:48:47 +08002241 ret = kvm_set_msr_common(vcpu, msr_index, data);
2242 break;
2243 case MSR_TSC_AUX:
2244 if (!vmx->rdtscp_enabled)
2245 return 1;
2246 /* Check reserved bit, higher 32 bits should be zero */
2247 if ((data >> 32) != 0)
2248 return 1;
2249 /* Otherwise falls through */
Avi Kivity6aa8b732006-12-10 02:21:36 -08002250 default:
Nadav Har'Elb87a51a2011-05-25 23:04:25 +03002251 if (vmx_set_vmx_msr(vcpu, msr_index, data))
2252 break;
Rusty Russell8b9cf982007-07-30 16:31:43 +10002253 msr = find_msr_entry(vmx, msr_index);
Avi Kivity3bab1f52006-12-29 16:49:48 -08002254 if (msr) {
2255 msr->data = data;
Avi Kivity2225fd52012-04-18 15:03:04 +03002256 if (msr - vmx->guest_msrs < vmx->save_nmsrs) {
2257 preempt_disable();
Avi Kivity9ee73972012-03-06 14:16:33 +02002258 kvm_set_shared_msr(msr->index, msr->data,
2259 msr->mask);
Avi Kivity2225fd52012-04-18 15:03:04 +03002260 preempt_enable();
2261 }
Avi Kivity3bab1f52006-12-29 16:49:48 -08002262 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002263 }
Eddie Dong2cc51562007-05-21 07:28:09 +03002264 ret = kvm_set_msr_common(vcpu, msr_index, data);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002265 }
2266
Eddie Dong2cc51562007-05-21 07:28:09 +03002267 return ret;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002268}
2269
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03002270static void vmx_cache_reg(struct kvm_vcpu *vcpu, enum kvm_reg reg)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002271{
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03002272 __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail);
2273 switch (reg) {
2274 case VCPU_REGS_RSP:
2275 vcpu->arch.regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
2276 break;
2277 case VCPU_REGS_RIP:
2278 vcpu->arch.regs[VCPU_REGS_RIP] = vmcs_readl(GUEST_RIP);
2279 break;
Avi Kivity6de4f3a2009-05-31 22:58:47 +03002280 case VCPU_EXREG_PDPTR:
2281 if (enable_ept)
2282 ept_save_pdptrs(vcpu);
2283 break;
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03002284 default:
2285 break;
2286 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08002287}
2288
Jan Kiszka355be0b2009-10-03 00:31:21 +02002289static void set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002290{
Jan Kiszkaae675ef2008-12-15 13:52:10 +01002291 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
2292 vmcs_writel(GUEST_DR7, dbg->arch.debugreg[7]);
2293 else
2294 vmcs_writel(GUEST_DR7, vcpu->arch.dr7);
2295
Avi Kivityabd3f2d2007-05-02 17:57:40 +03002296 update_exception_bitmap(vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002297}
2298
2299static __init int cpu_has_kvm_support(void)
2300{
Eduardo Habkost6210e372008-11-17 19:03:16 -02002301 return cpu_has_vmx();
Avi Kivity6aa8b732006-12-10 02:21:36 -08002302}
2303
2304static __init int vmx_disabled_by_bios(void)
2305{
2306 u64 msr;
2307
2308 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
Shane Wangcafd6652010-04-29 12:09:01 -04002309 if (msr & FEATURE_CONTROL_LOCKED) {
Joseph Cihula23f3e992011-02-08 11:45:56 -08002310 /* launched w/ TXT and VMX disabled */
Shane Wangcafd6652010-04-29 12:09:01 -04002311 if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX)
2312 && tboot_enabled())
2313 return 1;
Joseph Cihula23f3e992011-02-08 11:45:56 -08002314 /* launched w/o TXT and VMX only enabled w/ TXT */
Shane Wangcafd6652010-04-29 12:09:01 -04002315 if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX)
Joseph Cihula23f3e992011-02-08 11:45:56 -08002316 && (msr & FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX)
Shane Wangf9335af2010-11-17 11:40:17 +08002317 && !tboot_enabled()) {
2318 printk(KERN_WARNING "kvm: disable TXT in the BIOS or "
Joseph Cihula23f3e992011-02-08 11:45:56 -08002319 "activate TXT before enabling KVM\n");
Shane Wangcafd6652010-04-29 12:09:01 -04002320 return 1;
Shane Wangf9335af2010-11-17 11:40:17 +08002321 }
Joseph Cihula23f3e992011-02-08 11:45:56 -08002322 /* launched w/o TXT and VMX disabled */
2323 if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX)
2324 && !tboot_enabled())
2325 return 1;
Shane Wangcafd6652010-04-29 12:09:01 -04002326 }
2327
2328 return 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002329}
2330
Dongxiao Xu7725b892010-05-11 18:29:38 +08002331static void kvm_cpu_vmxon(u64 addr)
2332{
2333 asm volatile (ASM_VMX_VMXON_RAX
2334 : : "a"(&addr), "m"(addr)
2335 : "memory", "cc");
2336}
2337
Alexander Graf10474ae2009-09-15 11:37:46 +02002338static int hardware_enable(void *garbage)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002339{
2340 int cpu = raw_smp_processor_id();
2341 u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
Shane Wangcafd6652010-04-29 12:09:01 -04002342 u64 old, test_bits;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002343
Alexander Graf10474ae2009-09-15 11:37:46 +02002344 if (read_cr4() & X86_CR4_VMXE)
2345 return -EBUSY;
2346
Nadav Har'Eld462b812011-05-24 15:26:10 +03002347 INIT_LIST_HEAD(&per_cpu(loaded_vmcss_on_cpu, cpu));
Avi Kivity6aa8b732006-12-10 02:21:36 -08002348 rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
Shane Wangcafd6652010-04-29 12:09:01 -04002349
2350 test_bits = FEATURE_CONTROL_LOCKED;
2351 test_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
2352 if (tboot_enabled())
2353 test_bits |= FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX;
2354
2355 if ((old & test_bits) != test_bits) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08002356 /* enable and lock */
Shane Wangcafd6652010-04-29 12:09:01 -04002357 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | test_bits);
2358 }
Rusty Russell66aee912007-07-17 23:34:16 +10002359 write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
Alexander Graf10474ae2009-09-15 11:37:46 +02002360
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08002361 if (vmm_exclusive) {
2362 kvm_cpu_vmxon(phys_addr);
2363 ept_sync_global();
2364 }
Alexander Graf10474ae2009-09-15 11:37:46 +02002365
Avi Kivity3444d7d2010-07-26 18:32:38 +03002366 store_gdt(&__get_cpu_var(host_gdt));
2367
Alexander Graf10474ae2009-09-15 11:37:46 +02002368 return 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002369}
2370
Nadav Har'Eld462b812011-05-24 15:26:10 +03002371static void vmclear_local_loaded_vmcss(void)
Avi Kivity543e4242008-05-13 16:22:47 +03002372{
2373 int cpu = raw_smp_processor_id();
Nadav Har'Eld462b812011-05-24 15:26:10 +03002374 struct loaded_vmcs *v, *n;
Avi Kivity543e4242008-05-13 16:22:47 +03002375
Nadav Har'Eld462b812011-05-24 15:26:10 +03002376 list_for_each_entry_safe(v, n, &per_cpu(loaded_vmcss_on_cpu, cpu),
2377 loaded_vmcss_on_cpu_link)
2378 __loaded_vmcs_clear(v);
Avi Kivity543e4242008-05-13 16:22:47 +03002379}
2380
Eduardo Habkost710ff4a2008-11-17 19:03:18 -02002381
2382/* Just like cpu_vmxoff(), but with the __kvm_handle_fault_on_reboot()
2383 * tricks.
2384 */
2385static void kvm_cpu_vmxoff(void)
2386{
2387 asm volatile (__ex(ASM_VMX_VMXOFF) : : : "cc");
Eduardo Habkost710ff4a2008-11-17 19:03:18 -02002388}
2389
Avi Kivity6aa8b732006-12-10 02:21:36 -08002390static void hardware_disable(void *garbage)
2391{
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08002392 if (vmm_exclusive) {
Nadav Har'Eld462b812011-05-24 15:26:10 +03002393 vmclear_local_loaded_vmcss();
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08002394 kvm_cpu_vmxoff();
2395 }
Dongxiao Xu7725b892010-05-11 18:29:38 +08002396 write_cr4(read_cr4() & ~X86_CR4_VMXE);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002397}
2398
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002399static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,
Mike Dayd77c26f2007-10-08 09:02:08 -04002400 u32 msr, u32 *result)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002401{
2402 u32 vmx_msr_low, vmx_msr_high;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002403 u32 ctl = ctl_min | ctl_opt;
2404
2405 rdmsr(msr, vmx_msr_low, vmx_msr_high);
2406
2407 ctl &= vmx_msr_high; /* bit == 0 in high word ==> must be zero */
2408 ctl |= vmx_msr_low; /* bit == 1 in low word ==> must be one */
2409
2410 /* Ensure minimum (required) set of control bits are supported. */
2411 if (ctl_min & ~ctl)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002412 return -EIO;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002413
2414 *result = ctl;
2415 return 0;
2416}
2417
Avi Kivity110312c2010-12-21 12:54:20 +02002418static __init bool allow_1_setting(u32 msr, u32 ctl)
2419{
2420 u32 vmx_msr_low, vmx_msr_high;
2421
2422 rdmsr(msr, vmx_msr_low, vmx_msr_high);
2423 return vmx_msr_high & ctl;
2424}
2425
Yang, Sheng002c7f72007-07-31 14:23:01 +03002426static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002427{
2428 u32 vmx_msr_low, vmx_msr_high;
Sheng Yangd56f5462008-04-25 10:13:16 +08002429 u32 min, opt, min2, opt2;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002430 u32 _pin_based_exec_control = 0;
2431 u32 _cpu_based_exec_control = 0;
Sheng Yangf78e0e22007-10-29 09:40:42 +08002432 u32 _cpu_based_2nd_exec_control = 0;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002433 u32 _vmexit_control = 0;
2434 u32 _vmentry_control = 0;
2435
2436 min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
Sheng Yangf08864b2008-05-15 18:23:25 +08002437 opt = PIN_BASED_VIRTUAL_NMIS;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002438 if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PINBASED_CTLS,
2439 &_pin_based_exec_control) < 0)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002440 return -EIO;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002441
Raghavendra K T10166742012-02-07 23:19:20 +05302442 min = CPU_BASED_HLT_EXITING |
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002443#ifdef CONFIG_X86_64
2444 CPU_BASED_CR8_LOAD_EXITING |
2445 CPU_BASED_CR8_STORE_EXITING |
2446#endif
Sheng Yangd56f5462008-04-25 10:13:16 +08002447 CPU_BASED_CR3_LOAD_EXITING |
2448 CPU_BASED_CR3_STORE_EXITING |
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002449 CPU_BASED_USE_IO_BITMAPS |
2450 CPU_BASED_MOV_DR_EXITING |
Marcelo Tosattia7052892008-09-23 13:18:35 -03002451 CPU_BASED_USE_TSC_OFFSETING |
Sheng Yang59708672009-12-15 13:29:54 +08002452 CPU_BASED_MWAIT_EXITING |
2453 CPU_BASED_MONITOR_EXITING |
Avi Kivityfee84b02011-11-10 14:57:25 +02002454 CPU_BASED_INVLPG_EXITING |
2455 CPU_BASED_RDPMC_EXITING;
Anthony Liguori443381a2010-12-06 10:53:38 -06002456
Sheng Yangf78e0e22007-10-29 09:40:42 +08002457 opt = CPU_BASED_TPR_SHADOW |
Sheng Yang25c5f222008-03-28 13:18:56 +08002458 CPU_BASED_USE_MSR_BITMAPS |
Sheng Yangf78e0e22007-10-29 09:40:42 +08002459 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002460 if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS,
2461 &_cpu_based_exec_control) < 0)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002462 return -EIO;
Yang, Sheng6e5d8652007-09-12 18:03:11 +08002463#ifdef CONFIG_X86_64
2464 if ((_cpu_based_exec_control & CPU_BASED_TPR_SHADOW))
2465 _cpu_based_exec_control &= ~CPU_BASED_CR8_LOAD_EXITING &
2466 ~CPU_BASED_CR8_STORE_EXITING;
2467#endif
Sheng Yangf78e0e22007-10-29 09:40:42 +08002468 if (_cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) {
Sheng Yangd56f5462008-04-25 10:13:16 +08002469 min2 = 0;
2470 opt2 = SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES |
Sheng Yang2384d2b2008-01-17 15:14:33 +08002471 SECONDARY_EXEC_WBINVD_EXITING |
Sheng Yangd56f5462008-04-25 10:13:16 +08002472 SECONDARY_EXEC_ENABLE_VPID |
Nitin A Kamble3a624e22009-06-08 11:34:16 -07002473 SECONDARY_EXEC_ENABLE_EPT |
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08002474 SECONDARY_EXEC_UNRESTRICTED_GUEST |
Sheng Yang4e47c7a2009-12-18 16:48:47 +08002475 SECONDARY_EXEC_PAUSE_LOOP_EXITING |
Mao, Junjiead756a12012-07-02 01:18:48 +00002476 SECONDARY_EXEC_RDTSCP |
2477 SECONDARY_EXEC_ENABLE_INVPCID;
Sheng Yangd56f5462008-04-25 10:13:16 +08002478 if (adjust_vmx_controls(min2, opt2,
2479 MSR_IA32_VMX_PROCBASED_CTLS2,
Sheng Yangf78e0e22007-10-29 09:40:42 +08002480 &_cpu_based_2nd_exec_control) < 0)
2481 return -EIO;
2482 }
2483#ifndef CONFIG_X86_64
2484 if (!(_cpu_based_2nd_exec_control &
2485 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES))
2486 _cpu_based_exec_control &= ~CPU_BASED_TPR_SHADOW;
2487#endif
Sheng Yangd56f5462008-04-25 10:13:16 +08002488 if (_cpu_based_2nd_exec_control & SECONDARY_EXEC_ENABLE_EPT) {
Marcelo Tosattia7052892008-09-23 13:18:35 -03002489 /* CR3 accesses and invlpg don't need to cause VM Exits when EPT
2490 enabled */
Gleb Natapov5fff7d22009-08-27 18:41:30 +03002491 _cpu_based_exec_control &= ~(CPU_BASED_CR3_LOAD_EXITING |
2492 CPU_BASED_CR3_STORE_EXITING |
2493 CPU_BASED_INVLPG_EXITING);
Sheng Yangd56f5462008-04-25 10:13:16 +08002494 rdmsr(MSR_IA32_VMX_EPT_VPID_CAP,
2495 vmx_capability.ept, vmx_capability.vpid);
2496 }
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002497
2498 min = 0;
2499#ifdef CONFIG_X86_64
2500 min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
2501#endif
Sheng Yang468d4722008-10-09 16:01:55 +08002502 opt = VM_EXIT_SAVE_IA32_PAT | VM_EXIT_LOAD_IA32_PAT;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002503 if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
2504 &_vmexit_control) < 0)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002505 return -EIO;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002506
Sheng Yang468d4722008-10-09 16:01:55 +08002507 min = 0;
2508 opt = VM_ENTRY_LOAD_IA32_PAT;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002509 if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
2510 &_vmentry_control) < 0)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002511 return -EIO;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002512
Nguyen Anh Quynhc68876f2006-12-29 16:49:54 -08002513 rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002514
2515 /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
2516 if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002517 return -EIO;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002518
2519#ifdef CONFIG_X86_64
2520 /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
2521 if (vmx_msr_high & (1u<<16))
Yang, Sheng002c7f72007-07-31 14:23:01 +03002522 return -EIO;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002523#endif
2524
2525 /* Require Write-Back (WB) memory type for VMCS accesses. */
2526 if (((vmx_msr_high >> 18) & 15) != 6)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002527 return -EIO;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002528
Yang, Sheng002c7f72007-07-31 14:23:01 +03002529 vmcs_conf->size = vmx_msr_high & 0x1fff;
2530 vmcs_conf->order = get_order(vmcs_config.size);
2531 vmcs_conf->revision_id = vmx_msr_low;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002532
Yang, Sheng002c7f72007-07-31 14:23:01 +03002533 vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
2534 vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
Sheng Yangf78e0e22007-10-29 09:40:42 +08002535 vmcs_conf->cpu_based_2nd_exec_ctrl = _cpu_based_2nd_exec_control;
Yang, Sheng002c7f72007-07-31 14:23:01 +03002536 vmcs_conf->vmexit_ctrl = _vmexit_control;
2537 vmcs_conf->vmentry_ctrl = _vmentry_control;
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002538
Avi Kivity110312c2010-12-21 12:54:20 +02002539 cpu_has_load_ia32_efer =
2540 allow_1_setting(MSR_IA32_VMX_ENTRY_CTLS,
2541 VM_ENTRY_LOAD_IA32_EFER)
2542 && allow_1_setting(MSR_IA32_VMX_EXIT_CTLS,
2543 VM_EXIT_LOAD_IA32_EFER);
2544
Gleb Natapov8bf00a52011-10-05 14:01:22 +02002545 cpu_has_load_perf_global_ctrl =
2546 allow_1_setting(MSR_IA32_VMX_ENTRY_CTLS,
2547 VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL)
2548 && allow_1_setting(MSR_IA32_VMX_EXIT_CTLS,
2549 VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
2550
2551 /*
2552 * Some cpus support VM_ENTRY_(LOAD|SAVE)_IA32_PERF_GLOBAL_CTRL
2553 * but due to arrata below it can't be used. Workaround is to use
2554 * msr load mechanism to switch IA32_PERF_GLOBAL_CTRL.
2555 *
2556 * VM Exit May Incorrectly Clear IA32_PERF_GLOBAL_CTRL [34:32]
2557 *
2558 * AAK155 (model 26)
2559 * AAP115 (model 30)
2560 * AAT100 (model 37)
2561 * BC86,AAY89,BD102 (model 44)
2562 * BA97 (model 46)
2563 *
2564 */
2565 if (cpu_has_load_perf_global_ctrl && boot_cpu_data.x86 == 0x6) {
2566 switch (boot_cpu_data.x86_model) {
2567 case 26:
2568 case 30:
2569 case 37:
2570 case 44:
2571 case 46:
2572 cpu_has_load_perf_global_ctrl = false;
2573 printk_once(KERN_WARNING"kvm: VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL "
2574 "does not work properly. Using workaround\n");
2575 break;
2576 default:
2577 break;
2578 }
2579 }
2580
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002581 return 0;
Nguyen Anh Quynhc68876f2006-12-29 16:49:54 -08002582}
Avi Kivity6aa8b732006-12-10 02:21:36 -08002583
2584static struct vmcs *alloc_vmcs_cpu(int cpu)
2585{
2586 int node = cpu_to_node(cpu);
2587 struct page *pages;
2588 struct vmcs *vmcs;
2589
Mel Gorman6484eb32009-06-16 15:31:54 -07002590 pages = alloc_pages_exact_node(node, GFP_KERNEL, vmcs_config.order);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002591 if (!pages)
2592 return NULL;
2593 vmcs = page_address(pages);
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002594 memset(vmcs, 0, vmcs_config.size);
2595 vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
Avi Kivity6aa8b732006-12-10 02:21:36 -08002596 return vmcs;
2597}
2598
2599static struct vmcs *alloc_vmcs(void)
2600{
Ingo Molnard3b2c332007-01-05 16:36:23 -08002601 return alloc_vmcs_cpu(raw_smp_processor_id());
Avi Kivity6aa8b732006-12-10 02:21:36 -08002602}
2603
2604static void free_vmcs(struct vmcs *vmcs)
2605{
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03002606 free_pages((unsigned long)vmcs, vmcs_config.order);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002607}
2608
Nadav Har'Eld462b812011-05-24 15:26:10 +03002609/*
2610 * Free a VMCS, but before that VMCLEAR it on the CPU where it was last loaded
2611 */
2612static void free_loaded_vmcs(struct loaded_vmcs *loaded_vmcs)
2613{
2614 if (!loaded_vmcs->vmcs)
2615 return;
2616 loaded_vmcs_clear(loaded_vmcs);
2617 free_vmcs(loaded_vmcs->vmcs);
2618 loaded_vmcs->vmcs = NULL;
2619}
2620
Sam Ravnborg39959582007-06-01 00:47:13 -07002621static void free_kvm_area(void)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002622{
2623 int cpu;
2624
Zachary Amsden3230bb42009-09-29 11:38:37 -10002625 for_each_possible_cpu(cpu) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08002626 free_vmcs(per_cpu(vmxarea, cpu));
Zachary Amsden3230bb42009-09-29 11:38:37 -10002627 per_cpu(vmxarea, cpu) = NULL;
2628 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08002629}
2630
Avi Kivity6aa8b732006-12-10 02:21:36 -08002631static __init int alloc_kvm_area(void)
2632{
2633 int cpu;
2634
Zachary Amsden3230bb42009-09-29 11:38:37 -10002635 for_each_possible_cpu(cpu) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08002636 struct vmcs *vmcs;
2637
2638 vmcs = alloc_vmcs_cpu(cpu);
2639 if (!vmcs) {
2640 free_kvm_area();
2641 return -ENOMEM;
2642 }
2643
2644 per_cpu(vmxarea, cpu) = vmcs;
2645 }
2646 return 0;
2647}
2648
2649static __init int hardware_setup(void)
2650{
Yang, Sheng002c7f72007-07-31 14:23:01 +03002651 if (setup_vmcs_config(&vmcs_config) < 0)
2652 return -EIO;
Joerg Roedel50a37eb2008-01-31 14:57:38 +01002653
2654 if (boot_cpu_has(X86_FEATURE_NX))
2655 kvm_enable_efer_bits(EFER_NX);
2656
Sheng Yang93ba03c2009-04-01 15:52:32 +08002657 if (!cpu_has_vmx_vpid())
2658 enable_vpid = 0;
2659
Sheng Yang4bc9b982010-06-02 14:05:24 +08002660 if (!cpu_has_vmx_ept() ||
2661 !cpu_has_vmx_ept_4levels()) {
Sheng Yang93ba03c2009-04-01 15:52:32 +08002662 enable_ept = 0;
Nitin A Kamble3a624e22009-06-08 11:34:16 -07002663 enable_unrestricted_guest = 0;
Xudong Hao83c3a332012-05-28 19:33:35 +08002664 enable_ept_ad_bits = 0;
Nitin A Kamble3a624e22009-06-08 11:34:16 -07002665 }
2666
Xudong Hao83c3a332012-05-28 19:33:35 +08002667 if (!cpu_has_vmx_ept_ad_bits())
2668 enable_ept_ad_bits = 0;
2669
Nitin A Kamble3a624e22009-06-08 11:34:16 -07002670 if (!cpu_has_vmx_unrestricted_guest())
2671 enable_unrestricted_guest = 0;
Sheng Yang93ba03c2009-04-01 15:52:32 +08002672
2673 if (!cpu_has_vmx_flexpriority())
2674 flexpriority_enabled = 0;
2675
Gleb Natapov95ba8273132009-04-21 17:45:08 +03002676 if (!cpu_has_vmx_tpr_shadow())
2677 kvm_x86_ops->update_cr8_intercept = NULL;
2678
Marcelo Tosatti54dee992009-06-11 12:07:44 -03002679 if (enable_ept && !cpu_has_vmx_ept_2m_page())
2680 kvm_disable_largepages();
2681
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08002682 if (!cpu_has_vmx_ple())
2683 ple_gap = 0;
2684
Nadav Har'Elb87a51a2011-05-25 23:04:25 +03002685 if (nested)
2686 nested_vmx_setup_ctls_msrs();
2687
Avi Kivity6aa8b732006-12-10 02:21:36 -08002688 return alloc_kvm_area();
2689}
2690
2691static __exit void hardware_unsetup(void)
2692{
2693 free_kvm_area();
2694}
2695
Avi Kivity6aa8b732006-12-10 02:21:36 -08002696static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
2697{
2698 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
2699
Avi Kivity6af11b92007-03-19 13:18:10 +02002700 if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08002701 vmcs_write16(sf->selector, save->selector);
2702 vmcs_writel(sf->base, save->base);
2703 vmcs_write32(sf->limit, save->limit);
2704 vmcs_write32(sf->ar_bytes, save->ar);
2705 } else {
2706 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
2707 << AR_DPL_SHIFT;
2708 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
2709 }
2710}
2711
2712static void enter_pmode(struct kvm_vcpu *vcpu)
2713{
2714 unsigned long flags;
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002715 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002716
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002717 vmx->emulation_required = 1;
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002718 vmx->rmode.vm86_active = 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002719
Avi Kivity2fb92db2011-04-27 19:42:18 +03002720 vmx_segment_cache_clear(vmx);
2721
Avi Kivityd0ba64f2011-01-03 14:28:51 +02002722 vmcs_write16(GUEST_TR_SELECTOR, vmx->rmode.tr.selector);
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002723 vmcs_writel(GUEST_TR_BASE, vmx->rmode.tr.base);
2724 vmcs_write32(GUEST_TR_LIMIT, vmx->rmode.tr.limit);
2725 vmcs_write32(GUEST_TR_AR_BYTES, vmx->rmode.tr.ar);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002726
2727 flags = vmcs_readl(GUEST_RFLAGS);
Avi Kivity78ac8b42010-04-08 18:19:35 +03002728 flags &= RMODE_GUEST_OWNED_EFLAGS_BITS;
2729 flags |= vmx->rmode.save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002730 vmcs_writel(GUEST_RFLAGS, flags);
2731
Rusty Russell66aee912007-07-17 23:34:16 +10002732 vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
2733 (vmcs_readl(CR4_READ_SHADOW) & X86_CR4_VME));
Avi Kivity6aa8b732006-12-10 02:21:36 -08002734
2735 update_exception_bitmap(vcpu);
2736
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002737 if (emulate_invalid_guest_state)
2738 return;
2739
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002740 fix_pmode_dataseg(VCPU_SREG_ES, &vmx->rmode.es);
2741 fix_pmode_dataseg(VCPU_SREG_DS, &vmx->rmode.ds);
2742 fix_pmode_dataseg(VCPU_SREG_GS, &vmx->rmode.gs);
2743 fix_pmode_dataseg(VCPU_SREG_FS, &vmx->rmode.fs);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002744
Avi Kivity2fb92db2011-04-27 19:42:18 +03002745 vmx_segment_cache_clear(vmx);
2746
Avi Kivity6aa8b732006-12-10 02:21:36 -08002747 vmcs_write16(GUEST_SS_SELECTOR, 0);
2748 vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
2749
2750 vmcs_write16(GUEST_CS_SELECTOR,
2751 vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
2752 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
2753}
2754
Mike Dayd77c26f2007-10-08 09:02:08 -04002755static gva_t rmode_tss_base(struct kvm *kvm)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002756{
Zhang Xiantaobfc6d222007-12-14 10:20:16 +08002757 if (!kvm->arch.tss_addr) {
Marcelo Tosattibc6678a2009-12-23 14:35:21 -02002758 struct kvm_memslots *slots;
Xiao Guangrong28a37542011-11-24 19:04:35 +08002759 struct kvm_memory_slot *slot;
Marcelo Tosattibc6678a2009-12-23 14:35:21 -02002760 gfn_t base_gfn;
2761
Lai Jiangshan90d83dc2010-04-19 17:41:23 +08002762 slots = kvm_memslots(kvm);
Xiao Guangrong28a37542011-11-24 19:04:35 +08002763 slot = id_to_memslot(slots, 0);
2764 base_gfn = slot->base_gfn + slot->npages - 3;
2765
Izik Eiduscbc94022007-10-25 00:29:55 +02002766 return base_gfn << PAGE_SHIFT;
2767 }
Zhang Xiantaobfc6d222007-12-14 10:20:16 +08002768 return kvm->arch.tss_addr;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002769}
2770
Avi Kivitybaa7e812012-08-21 17:06:58 +03002771static void save_rmode_seg(int seg, struct kvm_save_segment *save)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002772{
2773 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
2774
2775 save->selector = vmcs_read16(sf->selector);
2776 save->base = vmcs_readl(sf->base);
2777 save->limit = vmcs_read32(sf->limit);
2778 save->ar = vmcs_read32(sf->ar_bytes);
Avi Kivitybaa7e812012-08-21 17:06:58 +03002779}
2780
2781static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
2782{
2783 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
2784
Jan Kiszka15b00f32007-11-19 10:21:45 +01002785 vmcs_write16(sf->selector, save->base >> 4);
Gleb Natapov444e8632010-12-27 17:25:04 +02002786 vmcs_write32(sf->base, save->base & 0xffff0);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002787 vmcs_write32(sf->limit, 0xffff);
2788 vmcs_write32(sf->ar_bytes, 0xf3);
Gleb Natapov444e8632010-12-27 17:25:04 +02002789 if (save->base & 0xf)
2790 printk_once(KERN_WARNING "kvm: segment base is not paragraph"
2791 " aligned when entering protected mode (seg=%d)",
2792 seg);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002793}
2794
2795static void enter_rmode(struct kvm_vcpu *vcpu)
2796{
2797 unsigned long flags;
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002798 struct vcpu_vmx *vmx = to_vmx(vcpu);
Orit Wassermanb246dd52012-05-31 14:49:22 +03002799 struct kvm_segment var;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002800
Nitin A Kamble3a624e22009-06-08 11:34:16 -07002801 if (enable_unrestricted_guest)
2802 return;
2803
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002804 vmx->emulation_required = 1;
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002805 vmx->rmode.vm86_active = 1;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002806
Avi Kivitybaa7e812012-08-21 17:06:58 +03002807 save_rmode_seg(VCPU_SREG_TR, &vmx->rmode.tr);
2808 save_rmode_seg(VCPU_SREG_ES, &vmx->rmode.es);
2809 save_rmode_seg(VCPU_SREG_DS, &vmx->rmode.ds);
2810 save_rmode_seg(VCPU_SREG_FS, &vmx->rmode.fs);
2811 save_rmode_seg(VCPU_SREG_GS, &vmx->rmode.gs);
2812
Gleb Natapov776e58e2011-03-13 12:34:27 +02002813 /*
2814 * Very old userspace does not call KVM_SET_TSS_ADDR before entering
2815 * vcpu. Call it here with phys address pointing 16M below 4G.
2816 */
2817 if (!vcpu->kvm->arch.tss_addr) {
2818 printk_once(KERN_WARNING "kvm: KVM_SET_TSS_ADDR need to be "
2819 "called before entering vcpu\n");
2820 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
2821 vmx_set_tss_addr(vcpu->kvm, 0xfeffd000);
2822 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
2823 }
2824
Avi Kivity2fb92db2011-04-27 19:42:18 +03002825 vmx_segment_cache_clear(vmx);
2826
Avi Kivity6aa8b732006-12-10 02:21:36 -08002827 vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
Avi Kivity6aa8b732006-12-10 02:21:36 -08002828 vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002829 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
2830
2831 flags = vmcs_readl(GUEST_RFLAGS);
Avi Kivity78ac8b42010-04-08 18:19:35 +03002832 vmx->rmode.save_rflags = flags;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002833
Glauber de Oliveira Costa053de042008-01-30 13:31:27 +01002834 flags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002835
2836 vmcs_writel(GUEST_RFLAGS, flags);
Rusty Russell66aee912007-07-17 23:34:16 +10002837 vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002838 update_exception_bitmap(vcpu);
2839
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002840 if (emulate_invalid_guest_state)
2841 goto continue_rmode;
2842
Orit Wassermanb246dd52012-05-31 14:49:22 +03002843 vmx_get_segment(vcpu, &var, VCPU_SREG_SS);
2844 vmx_set_segment(vcpu, &var, VCPU_SREG_SS);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002845
Orit Wassermanb246dd52012-05-31 14:49:22 +03002846 vmx_get_segment(vcpu, &var, VCPU_SREG_CS);
2847 vmx_set_segment(vcpu, &var, VCPU_SREG_CS);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002848
Orit Wassermanb246dd52012-05-31 14:49:22 +03002849 vmx_get_segment(vcpu, &var, VCPU_SREG_ES);
2850 vmx_set_segment(vcpu, &var, VCPU_SREG_ES);
2851
2852 vmx_get_segment(vcpu, &var, VCPU_SREG_DS);
2853 vmx_set_segment(vcpu, &var, VCPU_SREG_DS);
2854
2855 vmx_get_segment(vcpu, &var, VCPU_SREG_GS);
2856 vmx_set_segment(vcpu, &var, VCPU_SREG_GS);
2857
2858 vmx_get_segment(vcpu, &var, VCPU_SREG_FS);
2859 vmx_set_segment(vcpu, &var, VCPU_SREG_FS);
Avi Kivity75880a02007-06-20 11:20:04 +03002860
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002861continue_rmode:
Eddie Dong8668a3c2007-10-10 14:26:45 +08002862 kvm_mmu_reset_context(vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002863}
2864
Amit Shah401d10d2009-02-20 22:53:37 +05302865static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
2866{
2867 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity26bb0982009-09-07 11:14:12 +03002868 struct shared_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
2869
2870 if (!msr)
2871 return;
Amit Shah401d10d2009-02-20 22:53:37 +05302872
Avi Kivity44ea2b12009-09-06 15:55:37 +03002873 /*
2874 * Force kernel_gs_base reloading before EFER changes, as control
2875 * of this msr depends on is_long_mode().
2876 */
2877 vmx_load_host_state(to_vmx(vcpu));
Avi Kivityf6801df2010-01-21 15:31:50 +02002878 vcpu->arch.efer = efer;
Amit Shah401d10d2009-02-20 22:53:37 +05302879 if (efer & EFER_LMA) {
2880 vmcs_write32(VM_ENTRY_CONTROLS,
2881 vmcs_read32(VM_ENTRY_CONTROLS) |
2882 VM_ENTRY_IA32E_MODE);
2883 msr->data = efer;
2884 } else {
2885 vmcs_write32(VM_ENTRY_CONTROLS,
2886 vmcs_read32(VM_ENTRY_CONTROLS) &
2887 ~VM_ENTRY_IA32E_MODE);
2888
2889 msr->data = efer & ~EFER_LME;
2890 }
2891 setup_msrs(vmx);
2892}
2893
Avi Kivity05b3e0c2006-12-13 00:33:45 -08002894#ifdef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08002895
2896static void enter_lmode(struct kvm_vcpu *vcpu)
2897{
2898 u32 guest_tr_ar;
2899
Avi Kivity2fb92db2011-04-27 19:42:18 +03002900 vmx_segment_cache_clear(to_vmx(vcpu));
2901
Avi Kivity6aa8b732006-12-10 02:21:36 -08002902 guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
2903 if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
Jan Kiszkabd801582011-09-12 11:26:22 +02002904 pr_debug_ratelimited("%s: tss fixup for long mode. \n",
2905 __func__);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002906 vmcs_write32(GUEST_TR_AR_BYTES,
2907 (guest_tr_ar & ~AR_TYPE_MASK)
2908 | AR_TYPE_BUSY_64_TSS);
2909 }
Avi Kivityda38f432010-07-06 11:30:49 +03002910 vmx_set_efer(vcpu, vcpu->arch.efer | EFER_LMA);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002911}
2912
2913static void exit_lmode(struct kvm_vcpu *vcpu)
2914{
Avi Kivity6aa8b732006-12-10 02:21:36 -08002915 vmcs_write32(VM_ENTRY_CONTROLS,
2916 vmcs_read32(VM_ENTRY_CONTROLS)
Li, Xin B1e4e6e02007-08-01 21:49:10 +03002917 & ~VM_ENTRY_IA32E_MODE);
Avi Kivityda38f432010-07-06 11:30:49 +03002918 vmx_set_efer(vcpu, vcpu->arch.efer & ~EFER_LMA);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002919}
2920
2921#endif
2922
Sheng Yang2384d2b2008-01-17 15:14:33 +08002923static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2924{
Gui Jianfengb9d762f2010-06-07 10:32:29 +08002925 vpid_sync_context(to_vmx(vcpu));
Xiao Guangrongdd180b32010-07-03 16:02:42 +08002926 if (enable_ept) {
2927 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2928 return;
Sheng Yang4e1096d2008-07-06 19:16:51 +08002929 ept_sync_context(construct_eptp(vcpu->arch.mmu.root_hpa));
Xiao Guangrongdd180b32010-07-03 16:02:42 +08002930 }
Sheng Yang2384d2b2008-01-17 15:14:33 +08002931}
2932
Avi Kivitye8467fd2009-12-29 18:43:06 +02002933static void vmx_decache_cr0_guest_bits(struct kvm_vcpu *vcpu)
2934{
2935 ulong cr0_guest_owned_bits = vcpu->arch.cr0_guest_owned_bits;
2936
2937 vcpu->arch.cr0 &= ~cr0_guest_owned_bits;
2938 vcpu->arch.cr0 |= vmcs_readl(GUEST_CR0) & cr0_guest_owned_bits;
2939}
2940
Avi Kivityaff48ba2010-12-05 18:56:11 +02002941static void vmx_decache_cr3(struct kvm_vcpu *vcpu)
2942{
2943 if (enable_ept && is_paging(vcpu))
2944 vcpu->arch.cr3 = vmcs_readl(GUEST_CR3);
2945 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
2946}
2947
Anthony Liguori25c4c272007-04-27 09:29:21 +03002948static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
Avi Kivity399badf2007-01-05 16:36:38 -08002949{
Avi Kivityfc78f512009-12-07 12:16:48 +02002950 ulong cr4_guest_owned_bits = vcpu->arch.cr4_guest_owned_bits;
2951
2952 vcpu->arch.cr4 &= ~cr4_guest_owned_bits;
2953 vcpu->arch.cr4 |= vmcs_readl(GUEST_CR4) & cr4_guest_owned_bits;
Avi Kivity399badf2007-01-05 16:36:38 -08002954}
2955
Sheng Yang14394422008-04-28 12:24:45 +08002956static void ept_load_pdptrs(struct kvm_vcpu *vcpu)
2957{
Avi Kivity6de4f3a2009-05-31 22:58:47 +03002958 if (!test_bit(VCPU_EXREG_PDPTR,
2959 (unsigned long *)&vcpu->arch.regs_dirty))
2960 return;
2961
Sheng Yang14394422008-04-28 12:24:45 +08002962 if (is_paging(vcpu) && is_pae(vcpu) && !is_long_mode(vcpu)) {
Joerg Roedelff03a072010-09-10 17:30:57 +02002963 vmcs_write64(GUEST_PDPTR0, vcpu->arch.mmu.pdptrs[0]);
2964 vmcs_write64(GUEST_PDPTR1, vcpu->arch.mmu.pdptrs[1]);
2965 vmcs_write64(GUEST_PDPTR2, vcpu->arch.mmu.pdptrs[2]);
2966 vmcs_write64(GUEST_PDPTR3, vcpu->arch.mmu.pdptrs[3]);
Sheng Yang14394422008-04-28 12:24:45 +08002967 }
2968}
2969
Avi Kivity8f5d5492009-05-31 18:41:29 +03002970static void ept_save_pdptrs(struct kvm_vcpu *vcpu)
2971{
2972 if (is_paging(vcpu) && is_pae(vcpu) && !is_long_mode(vcpu)) {
Joerg Roedelff03a072010-09-10 17:30:57 +02002973 vcpu->arch.mmu.pdptrs[0] = vmcs_read64(GUEST_PDPTR0);
2974 vcpu->arch.mmu.pdptrs[1] = vmcs_read64(GUEST_PDPTR1);
2975 vcpu->arch.mmu.pdptrs[2] = vmcs_read64(GUEST_PDPTR2);
2976 vcpu->arch.mmu.pdptrs[3] = vmcs_read64(GUEST_PDPTR3);
Avi Kivity8f5d5492009-05-31 18:41:29 +03002977 }
Avi Kivity6de4f3a2009-05-31 22:58:47 +03002978
2979 __set_bit(VCPU_EXREG_PDPTR,
2980 (unsigned long *)&vcpu->arch.regs_avail);
2981 __set_bit(VCPU_EXREG_PDPTR,
2982 (unsigned long *)&vcpu->arch.regs_dirty);
Avi Kivity8f5d5492009-05-31 18:41:29 +03002983}
2984
Nadav Har'El5e1746d2011-05-25 23:03:24 +03002985static int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
Sheng Yang14394422008-04-28 12:24:45 +08002986
2987static void ept_update_paging_mode_cr0(unsigned long *hw_cr0,
2988 unsigned long cr0,
2989 struct kvm_vcpu *vcpu)
2990{
Marcelo Tosatti5233dd52011-06-06 14:27:47 -03002991 if (!test_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail))
2992 vmx_decache_cr3(vcpu);
Sheng Yang14394422008-04-28 12:24:45 +08002993 if (!(cr0 & X86_CR0_PG)) {
2994 /* From paging/starting to nonpaging */
2995 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
Sheng Yang65267ea2008-06-18 14:43:38 +08002996 vmcs_read32(CPU_BASED_VM_EXEC_CONTROL) |
Sheng Yang14394422008-04-28 12:24:45 +08002997 (CPU_BASED_CR3_LOAD_EXITING |
2998 CPU_BASED_CR3_STORE_EXITING));
2999 vcpu->arch.cr0 = cr0;
Avi Kivityfc78f512009-12-07 12:16:48 +02003000 vmx_set_cr4(vcpu, kvm_read_cr4(vcpu));
Sheng Yang14394422008-04-28 12:24:45 +08003001 } else if (!is_paging(vcpu)) {
3002 /* From nonpaging to paging */
3003 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
Sheng Yang65267ea2008-06-18 14:43:38 +08003004 vmcs_read32(CPU_BASED_VM_EXEC_CONTROL) &
Sheng Yang14394422008-04-28 12:24:45 +08003005 ~(CPU_BASED_CR3_LOAD_EXITING |
3006 CPU_BASED_CR3_STORE_EXITING));
3007 vcpu->arch.cr0 = cr0;
Avi Kivityfc78f512009-12-07 12:16:48 +02003008 vmx_set_cr4(vcpu, kvm_read_cr4(vcpu));
Sheng Yang14394422008-04-28 12:24:45 +08003009 }
Sheng Yang95eb84a2009-08-19 09:52:18 +08003010
3011 if (!(cr0 & X86_CR0_WP))
3012 *hw_cr0 &= ~X86_CR0_WP;
Sheng Yang14394422008-04-28 12:24:45 +08003013}
3014
Avi Kivity6aa8b732006-12-10 02:21:36 -08003015static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
3016{
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003017 struct vcpu_vmx *vmx = to_vmx(vcpu);
Nitin A Kamble3a624e22009-06-08 11:34:16 -07003018 unsigned long hw_cr0;
3019
3020 if (enable_unrestricted_guest)
3021 hw_cr0 = (cr0 & ~KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST)
3022 | KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST;
3023 else
3024 hw_cr0 = (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON;
Sheng Yang14394422008-04-28 12:24:45 +08003025
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003026 if (vmx->rmode.vm86_active && (cr0 & X86_CR0_PE))
Avi Kivity6aa8b732006-12-10 02:21:36 -08003027 enter_pmode(vcpu);
3028
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003029 if (!vmx->rmode.vm86_active && !(cr0 & X86_CR0_PE))
Avi Kivity6aa8b732006-12-10 02:21:36 -08003030 enter_rmode(vcpu);
3031
Avi Kivity05b3e0c2006-12-13 00:33:45 -08003032#ifdef CONFIG_X86_64
Avi Kivityf6801df2010-01-21 15:31:50 +02003033 if (vcpu->arch.efer & EFER_LME) {
Rusty Russell707d92fa2007-07-17 23:19:08 +10003034 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG))
Avi Kivity6aa8b732006-12-10 02:21:36 -08003035 enter_lmode(vcpu);
Rusty Russell707d92fa2007-07-17 23:19:08 +10003036 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG))
Avi Kivity6aa8b732006-12-10 02:21:36 -08003037 exit_lmode(vcpu);
3038 }
3039#endif
3040
Avi Kivity089d0342009-03-23 18:26:32 +02003041 if (enable_ept)
Sheng Yang14394422008-04-28 12:24:45 +08003042 ept_update_paging_mode_cr0(&hw_cr0, cr0, vcpu);
3043
Avi Kivity02daab22009-12-30 12:40:26 +02003044 if (!vcpu->fpu_active)
Avi Kivity81231c62010-01-24 16:26:40 +02003045 hw_cr0 |= X86_CR0_TS | X86_CR0_MP;
Avi Kivity02daab22009-12-30 12:40:26 +02003046
Avi Kivity6aa8b732006-12-10 02:21:36 -08003047 vmcs_writel(CR0_READ_SHADOW, cr0);
Sheng Yang14394422008-04-28 12:24:45 +08003048 vmcs_writel(GUEST_CR0, hw_cr0);
Zhang Xiantaoad312c72007-12-13 23:50:52 +08003049 vcpu->arch.cr0 = cr0;
Avi Kivity69c73022011-03-07 15:26:44 +02003050 __clear_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003051}
3052
Sheng Yang14394422008-04-28 12:24:45 +08003053static u64 construct_eptp(unsigned long root_hpa)
3054{
3055 u64 eptp;
3056
3057 /* TODO write the value reading from MSR */
3058 eptp = VMX_EPT_DEFAULT_MT |
3059 VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
Xudong Haob38f9932012-05-28 19:33:36 +08003060 if (enable_ept_ad_bits)
3061 eptp |= VMX_EPT_AD_ENABLE_BIT;
Sheng Yang14394422008-04-28 12:24:45 +08003062 eptp |= (root_hpa & PAGE_MASK);
3063
3064 return eptp;
3065}
3066
Avi Kivity6aa8b732006-12-10 02:21:36 -08003067static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
3068{
Sheng Yang14394422008-04-28 12:24:45 +08003069 unsigned long guest_cr3;
3070 u64 eptp;
3071
3072 guest_cr3 = cr3;
Avi Kivity089d0342009-03-23 18:26:32 +02003073 if (enable_ept) {
Sheng Yang14394422008-04-28 12:24:45 +08003074 eptp = construct_eptp(cr3);
3075 vmcs_write64(EPT_POINTER, eptp);
Avi Kivity9f8fe502010-12-05 17:30:00 +02003076 guest_cr3 = is_paging(vcpu) ? kvm_read_cr3(vcpu) :
Sheng Yangb927a3c2009-07-21 10:42:48 +08003077 vcpu->kvm->arch.ept_identity_map_addr;
Marcelo Tosatti7c93be42009-10-26 16:48:33 -02003078 ept_load_pdptrs(vcpu);
Sheng Yang14394422008-04-28 12:24:45 +08003079 }
3080
Sheng Yang2384d2b2008-01-17 15:14:33 +08003081 vmx_flush_tlb(vcpu);
Sheng Yang14394422008-04-28 12:24:45 +08003082 vmcs_writel(GUEST_CR3, guest_cr3);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003083}
3084
Nadav Har'El5e1746d2011-05-25 23:03:24 +03003085static int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003086{
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003087 unsigned long hw_cr4 = cr4 | (to_vmx(vcpu)->rmode.vm86_active ?
Sheng Yang14394422008-04-28 12:24:45 +08003088 KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON);
3089
Nadav Har'El5e1746d2011-05-25 23:03:24 +03003090 if (cr4 & X86_CR4_VMXE) {
3091 /*
3092 * To use VMXON (and later other VMX instructions), a guest
3093 * must first be able to turn on cr4.VMXE (see handle_vmon()).
3094 * So basically the check on whether to allow nested VMX
3095 * is here.
3096 */
3097 if (!nested_vmx_allowed(vcpu))
3098 return 1;
3099 } else if (to_vmx(vcpu)->nested.vmxon)
3100 return 1;
3101
Zhang Xiantaoad312c72007-12-13 23:50:52 +08003102 vcpu->arch.cr4 = cr4;
Avi Kivitybc230082009-12-08 12:14:42 +02003103 if (enable_ept) {
3104 if (!is_paging(vcpu)) {
3105 hw_cr4 &= ~X86_CR4_PAE;
3106 hw_cr4 |= X86_CR4_PSE;
3107 } else if (!(cr4 & X86_CR4_PAE)) {
3108 hw_cr4 &= ~X86_CR4_PAE;
3109 }
3110 }
Sheng Yang14394422008-04-28 12:24:45 +08003111
3112 vmcs_writel(CR4_READ_SHADOW, cr4);
3113 vmcs_writel(GUEST_CR4, hw_cr4);
Nadav Har'El5e1746d2011-05-25 23:03:24 +03003114 return 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003115}
3116
Avi Kivity6aa8b732006-12-10 02:21:36 -08003117static void vmx_get_segment(struct kvm_vcpu *vcpu,
3118 struct kvm_segment *var, int seg)
3119{
Avi Kivitya9179492011-01-03 14:28:52 +02003120 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivitya9179492011-01-03 14:28:52 +02003121 struct kvm_save_segment *save;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003122 u32 ar;
3123
Avi Kivitya9179492011-01-03 14:28:52 +02003124 if (vmx->rmode.vm86_active
3125 && (seg == VCPU_SREG_TR || seg == VCPU_SREG_ES
3126 || seg == VCPU_SREG_DS || seg == VCPU_SREG_FS
3127 || seg == VCPU_SREG_GS)
3128 && !emulate_invalid_guest_state) {
3129 switch (seg) {
3130 case VCPU_SREG_TR: save = &vmx->rmode.tr; break;
3131 case VCPU_SREG_ES: save = &vmx->rmode.es; break;
3132 case VCPU_SREG_DS: save = &vmx->rmode.ds; break;
3133 case VCPU_SREG_FS: save = &vmx->rmode.fs; break;
3134 case VCPU_SREG_GS: save = &vmx->rmode.gs; break;
3135 default: BUG();
3136 }
3137 var->selector = save->selector;
3138 var->base = save->base;
3139 var->limit = save->limit;
3140 ar = save->ar;
3141 if (seg == VCPU_SREG_TR
Avi Kivity2fb92db2011-04-27 19:42:18 +03003142 || var->selector == vmx_read_guest_seg_selector(vmx, seg))
Avi Kivitya9179492011-01-03 14:28:52 +02003143 goto use_saved_rmode_seg;
3144 }
Avi Kivity2fb92db2011-04-27 19:42:18 +03003145 var->base = vmx_read_guest_seg_base(vmx, seg);
3146 var->limit = vmx_read_guest_seg_limit(vmx, seg);
3147 var->selector = vmx_read_guest_seg_selector(vmx, seg);
3148 ar = vmx_read_guest_seg_ar(vmx, seg);
Avi Kivitya9179492011-01-03 14:28:52 +02003149use_saved_rmode_seg:
Avi Kivity9fd4a3b2009-01-04 23:43:42 +02003150 if ((ar & AR_UNUSABLE_MASK) && !emulate_invalid_guest_state)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003151 ar = 0;
3152 var->type = ar & 15;
3153 var->s = (ar >> 4) & 1;
3154 var->dpl = (ar >> 5) & 3;
3155 var->present = (ar >> 7) & 1;
3156 var->avl = (ar >> 12) & 1;
3157 var->l = (ar >> 13) & 1;
3158 var->db = (ar >> 14) & 1;
3159 var->g = (ar >> 15) & 1;
3160 var->unusable = (ar >> 16) & 1;
3161}
3162
Avi Kivitya9179492011-01-03 14:28:52 +02003163static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
3164{
Avi Kivitya9179492011-01-03 14:28:52 +02003165 struct kvm_segment s;
3166
3167 if (to_vmx(vcpu)->rmode.vm86_active) {
3168 vmx_get_segment(vcpu, &s, seg);
3169 return s.base;
3170 }
Avi Kivity2fb92db2011-04-27 19:42:18 +03003171 return vmx_read_guest_seg_base(to_vmx(vcpu), seg);
Avi Kivitya9179492011-01-03 14:28:52 +02003172}
3173
Avi Kivity69c73022011-03-07 15:26:44 +02003174static int __vmx_get_cpl(struct kvm_vcpu *vcpu)
Izik Eidus2e4d2652008-03-24 19:38:34 +02003175{
Avi Kivity3eeb3282010-01-21 15:31:48 +02003176 if (!is_protmode(vcpu))
Izik Eidus2e4d2652008-03-24 19:38:34 +02003177 return 0;
3178
Avi Kivityf4c63e52011-03-07 14:54:28 +02003179 if (!is_long_mode(vcpu)
3180 && (kvm_get_rflags(vcpu) & X86_EFLAGS_VM)) /* if virtual 8086 */
Izik Eidus2e4d2652008-03-24 19:38:34 +02003181 return 3;
3182
Avi Kivity2fb92db2011-04-27 19:42:18 +03003183 return vmx_read_guest_seg_selector(to_vmx(vcpu), VCPU_SREG_CS) & 3;
Izik Eidus2e4d2652008-03-24 19:38:34 +02003184}
3185
Avi Kivity69c73022011-03-07 15:26:44 +02003186static int vmx_get_cpl(struct kvm_vcpu *vcpu)
3187{
Avi Kivityd881e6f2012-06-06 18:36:48 +03003188 struct vcpu_vmx *vmx = to_vmx(vcpu);
3189
3190 /*
3191 * If we enter real mode with cs.sel & 3 != 0, the normal CPL calculations
3192 * fail; use the cache instead.
3193 */
3194 if (unlikely(vmx->emulation_required && emulate_invalid_guest_state)) {
3195 return vmx->cpl;
3196 }
3197
Avi Kivity69c73022011-03-07 15:26:44 +02003198 if (!test_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail)) {
3199 __set_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail);
Avi Kivityd881e6f2012-06-06 18:36:48 +03003200 vmx->cpl = __vmx_get_cpl(vcpu);
Avi Kivity69c73022011-03-07 15:26:44 +02003201 }
Avi Kivityd881e6f2012-06-06 18:36:48 +03003202
3203 return vmx->cpl;
Avi Kivity69c73022011-03-07 15:26:44 +02003204}
3205
3206
Avi Kivity653e3102007-05-07 10:55:37 +03003207static u32 vmx_segment_access_rights(struct kvm_segment *var)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003208{
Avi Kivity6aa8b732006-12-10 02:21:36 -08003209 u32 ar;
3210
Avi Kivityf0495f92012-06-07 17:06:10 +03003211 if (var->unusable || !var->present)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003212 ar = 1 << 16;
3213 else {
3214 ar = var->type & 15;
3215 ar |= (var->s & 1) << 4;
3216 ar |= (var->dpl & 3) << 5;
3217 ar |= (var->present & 1) << 7;
3218 ar |= (var->avl & 1) << 12;
3219 ar |= (var->l & 1) << 13;
3220 ar |= (var->db & 1) << 14;
3221 ar |= (var->g & 1) << 15;
3222 }
Avi Kivity653e3102007-05-07 10:55:37 +03003223
3224 return ar;
3225}
3226
3227static void vmx_set_segment(struct kvm_vcpu *vcpu,
3228 struct kvm_segment *var, int seg)
3229{
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003230 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity653e3102007-05-07 10:55:37 +03003231 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
3232 u32 ar;
3233
Avi Kivity2fb92db2011-04-27 19:42:18 +03003234 vmx_segment_cache_clear(vmx);
3235
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003236 if (vmx->rmode.vm86_active && seg == VCPU_SREG_TR) {
Gleb Natapova8ba6c22011-02-21 12:07:58 +02003237 vmcs_write16(sf->selector, var->selector);
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003238 vmx->rmode.tr.selector = var->selector;
3239 vmx->rmode.tr.base = var->base;
3240 vmx->rmode.tr.limit = var->limit;
3241 vmx->rmode.tr.ar = vmx_segment_access_rights(var);
Avi Kivity653e3102007-05-07 10:55:37 +03003242 return;
3243 }
3244 vmcs_writel(sf->base, var->base);
3245 vmcs_write32(sf->limit, var->limit);
3246 vmcs_write16(sf->selector, var->selector);
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003247 if (vmx->rmode.vm86_active && var->s) {
Avi Kivity653e3102007-05-07 10:55:37 +03003248 /*
3249 * Hack real-mode segments into vm86 compatibility.
3250 */
3251 if (var->base == 0xffff0000 && var->selector == 0xf000)
3252 vmcs_writel(sf->base, 0xf0000);
3253 ar = 0xf3;
3254 } else
3255 ar = vmx_segment_access_rights(var);
Nitin A Kamble3a624e22009-06-08 11:34:16 -07003256
3257 /*
3258 * Fix the "Accessed" bit in AR field of segment registers for older
3259 * qemu binaries.
3260 * IA32 arch specifies that at the time of processor reset the
3261 * "Accessed" bit in the AR field of segment registers is 1. And qemu
Guo Chao0fa06072012-06-28 15:16:19 +08003262 * is setting it to 0 in the userland code. This causes invalid guest
Nitin A Kamble3a624e22009-06-08 11:34:16 -07003263 * state vmexit when "unrestricted guest" mode is turned on.
3264 * Fix for this setup issue in cpu_reset is being pushed in the qemu
3265 * tree. Newer qemu binaries with that qemu fix would not need this
3266 * kvm hack.
3267 */
3268 if (enable_unrestricted_guest && (seg != VCPU_SREG_LDTR))
3269 ar |= 0x1; /* Accessed */
3270
Avi Kivity6aa8b732006-12-10 02:21:36 -08003271 vmcs_write32(sf->ar_bytes, ar);
Avi Kivity69c73022011-03-07 15:26:44 +02003272 __clear_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail);
Orit Wassermanb246dd52012-05-31 14:49:22 +03003273
3274 /*
3275 * Fix segments for real mode guest in hosts that don't have
3276 * "unrestricted_mode" or it was disabled.
3277 * This is done to allow migration of the guests from hosts with
3278 * unrestricted guest like Westmere to older host that don't have
3279 * unrestricted guest like Nehelem.
3280 */
3281 if (!enable_unrestricted_guest && vmx->rmode.vm86_active) {
3282 switch (seg) {
3283 case VCPU_SREG_CS:
3284 vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
3285 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
3286 if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
3287 vmcs_writel(GUEST_CS_BASE, 0xf0000);
3288 vmcs_write16(GUEST_CS_SELECTOR,
3289 vmcs_readl(GUEST_CS_BASE) >> 4);
3290 break;
3291 case VCPU_SREG_ES:
3292 fix_rmode_seg(VCPU_SREG_ES, &vmx->rmode.es);
3293 break;
3294 case VCPU_SREG_DS:
3295 fix_rmode_seg(VCPU_SREG_DS, &vmx->rmode.ds);
3296 break;
3297 case VCPU_SREG_GS:
3298 fix_rmode_seg(VCPU_SREG_GS, &vmx->rmode.gs);
3299 break;
3300 case VCPU_SREG_FS:
3301 fix_rmode_seg(VCPU_SREG_FS, &vmx->rmode.fs);
3302 break;
3303 case VCPU_SREG_SS:
3304 vmcs_write16(GUEST_SS_SELECTOR,
3305 vmcs_readl(GUEST_SS_BASE) >> 4);
3306 vmcs_write32(GUEST_SS_LIMIT, 0xffff);
3307 vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
3308 break;
3309 }
3310 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08003311}
3312
Avi Kivity6aa8b732006-12-10 02:21:36 -08003313static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3314{
Avi Kivity2fb92db2011-04-27 19:42:18 +03003315 u32 ar = vmx_read_guest_seg_ar(to_vmx(vcpu), VCPU_SREG_CS);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003316
3317 *db = (ar >> 14) & 1;
3318 *l = (ar >> 13) & 1;
3319}
3320
Gleb Natapov89a27f42010-02-16 10:51:48 +02003321static void vmx_get_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003322{
Gleb Natapov89a27f42010-02-16 10:51:48 +02003323 dt->size = vmcs_read32(GUEST_IDTR_LIMIT);
3324 dt->address = vmcs_readl(GUEST_IDTR_BASE);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003325}
3326
Gleb Natapov89a27f42010-02-16 10:51:48 +02003327static void vmx_set_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003328{
Gleb Natapov89a27f42010-02-16 10:51:48 +02003329 vmcs_write32(GUEST_IDTR_LIMIT, dt->size);
3330 vmcs_writel(GUEST_IDTR_BASE, dt->address);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003331}
3332
Gleb Natapov89a27f42010-02-16 10:51:48 +02003333static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003334{
Gleb Natapov89a27f42010-02-16 10:51:48 +02003335 dt->size = vmcs_read32(GUEST_GDTR_LIMIT);
3336 dt->address = vmcs_readl(GUEST_GDTR_BASE);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003337}
3338
Gleb Natapov89a27f42010-02-16 10:51:48 +02003339static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003340{
Gleb Natapov89a27f42010-02-16 10:51:48 +02003341 vmcs_write32(GUEST_GDTR_LIMIT, dt->size);
3342 vmcs_writel(GUEST_GDTR_BASE, dt->address);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003343}
3344
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003345static bool rmode_segment_valid(struct kvm_vcpu *vcpu, int seg)
3346{
3347 struct kvm_segment var;
3348 u32 ar;
3349
3350 vmx_get_segment(vcpu, &var, seg);
3351 ar = vmx_segment_access_rights(&var);
3352
3353 if (var.base != (var.selector << 4))
3354 return false;
3355 if (var.limit != 0xffff)
3356 return false;
3357 if (ar != 0xf3)
3358 return false;
3359
3360 return true;
3361}
3362
3363static bool code_segment_valid(struct kvm_vcpu *vcpu)
3364{
3365 struct kvm_segment cs;
3366 unsigned int cs_rpl;
3367
3368 vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
3369 cs_rpl = cs.selector & SELECTOR_RPL_MASK;
3370
Avi Kivity1872a3f2009-01-04 23:26:52 +02003371 if (cs.unusable)
3372 return false;
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003373 if (~cs.type & (AR_TYPE_CODE_MASK|AR_TYPE_ACCESSES_MASK))
3374 return false;
3375 if (!cs.s)
3376 return false;
Avi Kivity1872a3f2009-01-04 23:26:52 +02003377 if (cs.type & AR_TYPE_WRITEABLE_MASK) {
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003378 if (cs.dpl > cs_rpl)
3379 return false;
Avi Kivity1872a3f2009-01-04 23:26:52 +02003380 } else {
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003381 if (cs.dpl != cs_rpl)
3382 return false;
3383 }
3384 if (!cs.present)
3385 return false;
3386
3387 /* TODO: Add Reserved field check, this'll require a new member in the kvm_segment_field structure */
3388 return true;
3389}
3390
3391static bool stack_segment_valid(struct kvm_vcpu *vcpu)
3392{
3393 struct kvm_segment ss;
3394 unsigned int ss_rpl;
3395
3396 vmx_get_segment(vcpu, &ss, VCPU_SREG_SS);
3397 ss_rpl = ss.selector & SELECTOR_RPL_MASK;
3398
Avi Kivity1872a3f2009-01-04 23:26:52 +02003399 if (ss.unusable)
3400 return true;
3401 if (ss.type != 3 && ss.type != 7)
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003402 return false;
3403 if (!ss.s)
3404 return false;
3405 if (ss.dpl != ss_rpl) /* DPL != RPL */
3406 return false;
3407 if (!ss.present)
3408 return false;
3409
3410 return true;
3411}
3412
3413static bool data_segment_valid(struct kvm_vcpu *vcpu, int seg)
3414{
3415 struct kvm_segment var;
3416 unsigned int rpl;
3417
3418 vmx_get_segment(vcpu, &var, seg);
3419 rpl = var.selector & SELECTOR_RPL_MASK;
3420
Avi Kivity1872a3f2009-01-04 23:26:52 +02003421 if (var.unusable)
3422 return true;
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003423 if (!var.s)
3424 return false;
3425 if (!var.present)
3426 return false;
3427 if (~var.type & (AR_TYPE_CODE_MASK|AR_TYPE_WRITEABLE_MASK)) {
3428 if (var.dpl < rpl) /* DPL < RPL */
3429 return false;
3430 }
3431
3432 /* TODO: Add other members to kvm_segment_field to allow checking for other access
3433 * rights flags
3434 */
3435 return true;
3436}
3437
3438static bool tr_valid(struct kvm_vcpu *vcpu)
3439{
3440 struct kvm_segment tr;
3441
3442 vmx_get_segment(vcpu, &tr, VCPU_SREG_TR);
3443
Avi Kivity1872a3f2009-01-04 23:26:52 +02003444 if (tr.unusable)
3445 return false;
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003446 if (tr.selector & SELECTOR_TI_MASK) /* TI = 1 */
3447 return false;
Avi Kivity1872a3f2009-01-04 23:26:52 +02003448 if (tr.type != 3 && tr.type != 11) /* TODO: Check if guest is in IA32e mode */
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003449 return false;
3450 if (!tr.present)
3451 return false;
3452
3453 return true;
3454}
3455
3456static bool ldtr_valid(struct kvm_vcpu *vcpu)
3457{
3458 struct kvm_segment ldtr;
3459
3460 vmx_get_segment(vcpu, &ldtr, VCPU_SREG_LDTR);
3461
Avi Kivity1872a3f2009-01-04 23:26:52 +02003462 if (ldtr.unusable)
3463 return true;
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003464 if (ldtr.selector & SELECTOR_TI_MASK) /* TI = 1 */
3465 return false;
3466 if (ldtr.type != 2)
3467 return false;
3468 if (!ldtr.present)
3469 return false;
3470
3471 return true;
3472}
3473
3474static bool cs_ss_rpl_check(struct kvm_vcpu *vcpu)
3475{
3476 struct kvm_segment cs, ss;
3477
3478 vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
3479 vmx_get_segment(vcpu, &ss, VCPU_SREG_SS);
3480
3481 return ((cs.selector & SELECTOR_RPL_MASK) ==
3482 (ss.selector & SELECTOR_RPL_MASK));
3483}
3484
3485/*
3486 * Check if guest state is valid. Returns true if valid, false if
3487 * not.
3488 * We assume that registers are always usable
3489 */
3490static bool guest_state_valid(struct kvm_vcpu *vcpu)
3491{
3492 /* real mode guest state checks */
Avi Kivity3eeb3282010-01-21 15:31:48 +02003493 if (!is_protmode(vcpu)) {
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003494 if (!rmode_segment_valid(vcpu, VCPU_SREG_CS))
3495 return false;
3496 if (!rmode_segment_valid(vcpu, VCPU_SREG_SS))
3497 return false;
3498 if (!rmode_segment_valid(vcpu, VCPU_SREG_DS))
3499 return false;
3500 if (!rmode_segment_valid(vcpu, VCPU_SREG_ES))
3501 return false;
3502 if (!rmode_segment_valid(vcpu, VCPU_SREG_FS))
3503 return false;
3504 if (!rmode_segment_valid(vcpu, VCPU_SREG_GS))
3505 return false;
3506 } else {
3507 /* protected mode guest state checks */
3508 if (!cs_ss_rpl_check(vcpu))
3509 return false;
3510 if (!code_segment_valid(vcpu))
3511 return false;
3512 if (!stack_segment_valid(vcpu))
3513 return false;
3514 if (!data_segment_valid(vcpu, VCPU_SREG_DS))
3515 return false;
3516 if (!data_segment_valid(vcpu, VCPU_SREG_ES))
3517 return false;
3518 if (!data_segment_valid(vcpu, VCPU_SREG_FS))
3519 return false;
3520 if (!data_segment_valid(vcpu, VCPU_SREG_GS))
3521 return false;
3522 if (!tr_valid(vcpu))
3523 return false;
3524 if (!ldtr_valid(vcpu))
3525 return false;
3526 }
3527 /* TODO:
3528 * - Add checks on RIP
3529 * - Add checks on RFLAGS
3530 */
3531
3532 return true;
3533}
3534
Mike Dayd77c26f2007-10-08 09:02:08 -04003535static int init_rmode_tss(struct kvm *kvm)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003536{
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003537 gfn_t fn;
Izik Eidus195aefd2007-10-01 22:14:18 +02003538 u16 data = 0;
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003539 int r, idx, ret = 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003540
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003541 idx = srcu_read_lock(&kvm->srcu);
3542 fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
Izik Eidus195aefd2007-10-01 22:14:18 +02003543 r = kvm_clear_guest_page(kvm, fn, 0, PAGE_SIZE);
3544 if (r < 0)
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003545 goto out;
Izik Eidus195aefd2007-10-01 22:14:18 +02003546 data = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
Sheng Yang464d17c2008-08-13 14:10:33 +08003547 r = kvm_write_guest_page(kvm, fn++, &data,
3548 TSS_IOPB_BASE_OFFSET, sizeof(u16));
Izik Eidus195aefd2007-10-01 22:14:18 +02003549 if (r < 0)
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003550 goto out;
Izik Eidus195aefd2007-10-01 22:14:18 +02003551 r = kvm_clear_guest_page(kvm, fn++, 0, PAGE_SIZE);
3552 if (r < 0)
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003553 goto out;
Izik Eidus195aefd2007-10-01 22:14:18 +02003554 r = kvm_clear_guest_page(kvm, fn, 0, PAGE_SIZE);
3555 if (r < 0)
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003556 goto out;
Izik Eidus195aefd2007-10-01 22:14:18 +02003557 data = ~0;
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003558 r = kvm_write_guest_page(kvm, fn, &data,
3559 RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1,
3560 sizeof(u8));
Izik Eidus195aefd2007-10-01 22:14:18 +02003561 if (r < 0)
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003562 goto out;
3563
3564 ret = 1;
3565out:
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003566 srcu_read_unlock(&kvm->srcu, idx);
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003567 return ret;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003568}
3569
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003570static int init_rmode_identity_map(struct kvm *kvm)
3571{
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003572 int i, idx, r, ret;
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003573 pfn_t identity_map_pfn;
3574 u32 tmp;
3575
Avi Kivity089d0342009-03-23 18:26:32 +02003576 if (!enable_ept)
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003577 return 1;
3578 if (unlikely(!kvm->arch.ept_identity_pagetable)) {
3579 printk(KERN_ERR "EPT: identity-mapping pagetable "
3580 "haven't been allocated!\n");
3581 return 0;
3582 }
3583 if (likely(kvm->arch.ept_identity_pagetable_done))
3584 return 1;
3585 ret = 0;
Sheng Yangb927a3c2009-07-21 10:42:48 +08003586 identity_map_pfn = kvm->arch.ept_identity_map_addr >> PAGE_SHIFT;
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003587 idx = srcu_read_lock(&kvm->srcu);
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003588 r = kvm_clear_guest_page(kvm, identity_map_pfn, 0, PAGE_SIZE);
3589 if (r < 0)
3590 goto out;
3591 /* Set up identity-mapping pagetable for EPT in real mode */
3592 for (i = 0; i < PT32_ENT_PER_PAGE; i++) {
3593 tmp = (i << 22) + (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER |
3594 _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_PSE);
3595 r = kvm_write_guest_page(kvm, identity_map_pfn,
3596 &tmp, i * sizeof(tmp), sizeof(tmp));
3597 if (r < 0)
3598 goto out;
3599 }
3600 kvm->arch.ept_identity_pagetable_done = true;
3601 ret = 1;
3602out:
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003603 srcu_read_unlock(&kvm->srcu, idx);
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003604 return ret;
3605}
3606
Avi Kivity6aa8b732006-12-10 02:21:36 -08003607static void seg_setup(int seg)
3608{
3609 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
Nitin A Kamble3a624e22009-06-08 11:34:16 -07003610 unsigned int ar;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003611
3612 vmcs_write16(sf->selector, 0);
3613 vmcs_writel(sf->base, 0);
3614 vmcs_write32(sf->limit, 0xffff);
Nitin A Kamble3a624e22009-06-08 11:34:16 -07003615 if (enable_unrestricted_guest) {
3616 ar = 0x93;
3617 if (seg == VCPU_SREG_CS)
3618 ar |= 0x08; /* code segment */
3619 } else
3620 ar = 0xf3;
3621
3622 vmcs_write32(sf->ar_bytes, ar);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003623}
3624
Sheng Yangf78e0e22007-10-29 09:40:42 +08003625static int alloc_apic_access_page(struct kvm *kvm)
3626{
3627 struct kvm_userspace_memory_region kvm_userspace_mem;
3628 int r = 0;
3629
Marcelo Tosatti79fac952009-12-23 14:35:26 -02003630 mutex_lock(&kvm->slots_lock);
Zhang Xiantaobfc6d222007-12-14 10:20:16 +08003631 if (kvm->arch.apic_access_page)
Sheng Yangf78e0e22007-10-29 09:40:42 +08003632 goto out;
3633 kvm_userspace_mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
3634 kvm_userspace_mem.flags = 0;
3635 kvm_userspace_mem.guest_phys_addr = 0xfee00000ULL;
3636 kvm_userspace_mem.memory_size = PAGE_SIZE;
3637 r = __kvm_set_memory_region(kvm, &kvm_userspace_mem, 0);
3638 if (r)
3639 goto out;
Izik Eidus72dc67a2008-02-10 18:04:15 +02003640
Zhang Xiantaobfc6d222007-12-14 10:20:16 +08003641 kvm->arch.apic_access_page = gfn_to_page(kvm, 0xfee00);
Sheng Yangf78e0e22007-10-29 09:40:42 +08003642out:
Marcelo Tosatti79fac952009-12-23 14:35:26 -02003643 mutex_unlock(&kvm->slots_lock);
Sheng Yangf78e0e22007-10-29 09:40:42 +08003644 return r;
3645}
3646
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003647static int alloc_identity_pagetable(struct kvm *kvm)
3648{
3649 struct kvm_userspace_memory_region kvm_userspace_mem;
3650 int r = 0;
3651
Marcelo Tosatti79fac952009-12-23 14:35:26 -02003652 mutex_lock(&kvm->slots_lock);
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003653 if (kvm->arch.ept_identity_pagetable)
3654 goto out;
3655 kvm_userspace_mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
3656 kvm_userspace_mem.flags = 0;
Sheng Yangb927a3c2009-07-21 10:42:48 +08003657 kvm_userspace_mem.guest_phys_addr =
3658 kvm->arch.ept_identity_map_addr;
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003659 kvm_userspace_mem.memory_size = PAGE_SIZE;
3660 r = __kvm_set_memory_region(kvm, &kvm_userspace_mem, 0);
3661 if (r)
3662 goto out;
3663
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003664 kvm->arch.ept_identity_pagetable = gfn_to_page(kvm,
Sheng Yangb927a3c2009-07-21 10:42:48 +08003665 kvm->arch.ept_identity_map_addr >> PAGE_SHIFT);
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003666out:
Marcelo Tosatti79fac952009-12-23 14:35:26 -02003667 mutex_unlock(&kvm->slots_lock);
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003668 return r;
3669}
3670
Sheng Yang2384d2b2008-01-17 15:14:33 +08003671static void allocate_vpid(struct vcpu_vmx *vmx)
3672{
3673 int vpid;
3674
3675 vmx->vpid = 0;
Avi Kivity919818a2009-03-23 18:01:29 +02003676 if (!enable_vpid)
Sheng Yang2384d2b2008-01-17 15:14:33 +08003677 return;
3678 spin_lock(&vmx_vpid_lock);
3679 vpid = find_first_zero_bit(vmx_vpid_bitmap, VMX_NR_VPIDS);
3680 if (vpid < VMX_NR_VPIDS) {
3681 vmx->vpid = vpid;
3682 __set_bit(vpid, vmx_vpid_bitmap);
3683 }
3684 spin_unlock(&vmx_vpid_lock);
3685}
3686
Lai Jiangshancdbecfc2010-04-17 16:41:47 +08003687static void free_vpid(struct vcpu_vmx *vmx)
3688{
3689 if (!enable_vpid)
3690 return;
3691 spin_lock(&vmx_vpid_lock);
3692 if (vmx->vpid != 0)
3693 __clear_bit(vmx->vpid, vmx_vpid_bitmap);
3694 spin_unlock(&vmx_vpid_lock);
3695}
3696
Avi Kivity58972972009-02-24 22:26:47 +02003697static void __vmx_disable_intercept_for_msr(unsigned long *msr_bitmap, u32 msr)
Sheng Yang25c5f222008-03-28 13:18:56 +08003698{
Avi Kivity3e7c73e2009-02-24 21:46:19 +02003699 int f = sizeof(unsigned long);
Sheng Yang25c5f222008-03-28 13:18:56 +08003700
3701 if (!cpu_has_vmx_msr_bitmap())
3702 return;
3703
3704 /*
3705 * See Intel PRM Vol. 3, 20.6.9 (MSR-Bitmap Address). Early manuals
3706 * have the write-low and read-high bitmap offsets the wrong way round.
3707 * We can control MSRs 0x00000000-0x00001fff and 0xc0000000-0xc0001fff.
3708 */
Sheng Yang25c5f222008-03-28 13:18:56 +08003709 if (msr <= 0x1fff) {
Avi Kivity3e7c73e2009-02-24 21:46:19 +02003710 __clear_bit(msr, msr_bitmap + 0x000 / f); /* read-low */
3711 __clear_bit(msr, msr_bitmap + 0x800 / f); /* write-low */
Sheng Yang25c5f222008-03-28 13:18:56 +08003712 } else if ((msr >= 0xc0000000) && (msr <= 0xc0001fff)) {
3713 msr &= 0x1fff;
Avi Kivity3e7c73e2009-02-24 21:46:19 +02003714 __clear_bit(msr, msr_bitmap + 0x400 / f); /* read-high */
3715 __clear_bit(msr, msr_bitmap + 0xc00 / f); /* write-high */
Sheng Yang25c5f222008-03-28 13:18:56 +08003716 }
Sheng Yang25c5f222008-03-28 13:18:56 +08003717}
3718
Avi Kivity58972972009-02-24 22:26:47 +02003719static void vmx_disable_intercept_for_msr(u32 msr, bool longmode_only)
3720{
3721 if (!longmode_only)
3722 __vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy, msr);
3723 __vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode, msr);
3724}
3725
Avi Kivity6aa8b732006-12-10 02:21:36 -08003726/*
Nadav Har'Ela3a8ff82011-05-25 23:09:01 +03003727 * Set up the vmcs's constant host-state fields, i.e., host-state fields that
3728 * will not change in the lifetime of the guest.
3729 * Note that host-state that does change is set elsewhere. E.g., host-state
3730 * that is set differently for each CPU is set in vmx_vcpu_load(), not here.
3731 */
3732static void vmx_set_constant_host_state(void)
3733{
3734 u32 low32, high32;
3735 unsigned long tmpl;
3736 struct desc_ptr dt;
3737
3738 vmcs_writel(HOST_CR0, read_cr0() | X86_CR0_TS); /* 22.2.3 */
3739 vmcs_writel(HOST_CR4, read_cr4()); /* 22.2.3, 22.2.5 */
3740 vmcs_writel(HOST_CR3, read_cr3()); /* 22.2.3 FIXME: shadow tables */
3741
3742 vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS); /* 22.2.4 */
Avi Kivityb2da15a2012-05-13 19:53:24 +03003743#ifdef CONFIG_X86_64
3744 /*
3745 * Load null selectors, so we can avoid reloading them in
3746 * __vmx_load_host_state(), in case userspace uses the null selectors
3747 * too (the expected case).
3748 */
3749 vmcs_write16(HOST_DS_SELECTOR, 0);
3750 vmcs_write16(HOST_ES_SELECTOR, 0);
3751#else
Nadav Har'Ela3a8ff82011-05-25 23:09:01 +03003752 vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
3753 vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS); /* 22.2.4 */
Avi Kivityb2da15a2012-05-13 19:53:24 +03003754#endif
Nadav Har'Ela3a8ff82011-05-25 23:09:01 +03003755 vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
3756 vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8); /* 22.2.4 */
3757
3758 native_store_idt(&dt);
3759 vmcs_writel(HOST_IDTR_BASE, dt.address); /* 22.2.4 */
3760
3761 asm("mov $.Lkvm_vmx_return, %0" : "=r"(tmpl));
3762 vmcs_writel(HOST_RIP, tmpl); /* 22.2.5 */
3763
3764 rdmsr(MSR_IA32_SYSENTER_CS, low32, high32);
3765 vmcs_write32(HOST_IA32_SYSENTER_CS, low32);
3766 rdmsrl(MSR_IA32_SYSENTER_EIP, tmpl);
3767 vmcs_writel(HOST_IA32_SYSENTER_EIP, tmpl); /* 22.2.3 */
3768
3769 if (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_PAT) {
3770 rdmsr(MSR_IA32_CR_PAT, low32, high32);
3771 vmcs_write64(HOST_IA32_PAT, low32 | ((u64) high32 << 32));
3772 }
3773}
3774
Nadav Har'Elbf8179a2011-05-25 23:09:31 +03003775static void set_cr4_guest_host_mask(struct vcpu_vmx *vmx)
3776{
3777 vmx->vcpu.arch.cr4_guest_owned_bits = KVM_CR4_GUEST_OWNED_BITS;
3778 if (enable_ept)
3779 vmx->vcpu.arch.cr4_guest_owned_bits |= X86_CR4_PGE;
Nadav Har'Elfe3ef052011-05-25 23:10:02 +03003780 if (is_guest_mode(&vmx->vcpu))
3781 vmx->vcpu.arch.cr4_guest_owned_bits &=
3782 ~get_vmcs12(&vmx->vcpu)->cr4_guest_host_mask;
Nadav Har'Elbf8179a2011-05-25 23:09:31 +03003783 vmcs_writel(CR4_GUEST_HOST_MASK, ~vmx->vcpu.arch.cr4_guest_owned_bits);
3784}
3785
3786static u32 vmx_exec_control(struct vcpu_vmx *vmx)
3787{
3788 u32 exec_control = vmcs_config.cpu_based_exec_ctrl;
3789 if (!vm_need_tpr_shadow(vmx->vcpu.kvm)) {
3790 exec_control &= ~CPU_BASED_TPR_SHADOW;
3791#ifdef CONFIG_X86_64
3792 exec_control |= CPU_BASED_CR8_STORE_EXITING |
3793 CPU_BASED_CR8_LOAD_EXITING;
3794#endif
3795 }
3796 if (!enable_ept)
3797 exec_control |= CPU_BASED_CR3_STORE_EXITING |
3798 CPU_BASED_CR3_LOAD_EXITING |
3799 CPU_BASED_INVLPG_EXITING;
3800 return exec_control;
3801}
3802
3803static u32 vmx_secondary_exec_control(struct vcpu_vmx *vmx)
3804{
3805 u32 exec_control = vmcs_config.cpu_based_2nd_exec_ctrl;
3806 if (!vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))
3807 exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
3808 if (vmx->vpid == 0)
3809 exec_control &= ~SECONDARY_EXEC_ENABLE_VPID;
3810 if (!enable_ept) {
3811 exec_control &= ~SECONDARY_EXEC_ENABLE_EPT;
3812 enable_unrestricted_guest = 0;
Mao, Junjiead756a12012-07-02 01:18:48 +00003813 /* Enable INVPCID for non-ept guests may cause performance regression. */
3814 exec_control &= ~SECONDARY_EXEC_ENABLE_INVPCID;
Nadav Har'Elbf8179a2011-05-25 23:09:31 +03003815 }
3816 if (!enable_unrestricted_guest)
3817 exec_control &= ~SECONDARY_EXEC_UNRESTRICTED_GUEST;
3818 if (!ple_gap)
3819 exec_control &= ~SECONDARY_EXEC_PAUSE_LOOP_EXITING;
3820 return exec_control;
3821}
3822
Xiao Guangrongce88dec2011-07-12 03:33:44 +08003823static void ept_set_mmio_spte_mask(void)
3824{
3825 /*
3826 * EPT Misconfigurations can be generated if the value of bits 2:0
3827 * of an EPT paging-structure entry is 110b (write/execute).
3828 * Also, magic bits (0xffull << 49) is set to quickly identify mmio
3829 * spte.
3830 */
3831 kvm_mmu_set_mmio_spte_mask(0xffull << 49 | 0x6ull);
3832}
3833
Nadav Har'Ela3a8ff82011-05-25 23:09:01 +03003834/*
Avi Kivity6aa8b732006-12-10 02:21:36 -08003835 * Sets up the vmcs for emulated real mode.
3836 */
Rusty Russell8b9cf982007-07-30 16:31:43 +10003837static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003838{
Jan Kiszka2e4ce7f2011-06-01 12:57:30 +02003839#ifdef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08003840 unsigned long a;
Jan Kiszka2e4ce7f2011-06-01 12:57:30 +02003841#endif
Avi Kivity6aa8b732006-12-10 02:21:36 -08003842 int i;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003843
Avi Kivity6aa8b732006-12-10 02:21:36 -08003844 /* I/O */
Avi Kivity3e7c73e2009-02-24 21:46:19 +02003845 vmcs_write64(IO_BITMAP_A, __pa(vmx_io_bitmap_a));
3846 vmcs_write64(IO_BITMAP_B, __pa(vmx_io_bitmap_b));
Avi Kivity6aa8b732006-12-10 02:21:36 -08003847
Sheng Yang25c5f222008-03-28 13:18:56 +08003848 if (cpu_has_vmx_msr_bitmap())
Avi Kivity58972972009-02-24 22:26:47 +02003849 vmcs_write64(MSR_BITMAP, __pa(vmx_msr_bitmap_legacy));
Sheng Yang25c5f222008-03-28 13:18:56 +08003850
Avi Kivity6aa8b732006-12-10 02:21:36 -08003851 vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
3852
Avi Kivity6aa8b732006-12-10 02:21:36 -08003853 /* Control */
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03003854 vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
3855 vmcs_config.pin_based_exec_ctrl);
Yang, Sheng6e5d8652007-09-12 18:03:11 +08003856
Nadav Har'Elbf8179a2011-05-25 23:09:31 +03003857 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, vmx_exec_control(vmx));
Avi Kivity6aa8b732006-12-10 02:21:36 -08003858
Sheng Yang83ff3b92007-11-21 14:33:25 +08003859 if (cpu_has_secondary_exec_ctrls()) {
Nadav Har'Elbf8179a2011-05-25 23:09:31 +03003860 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
3861 vmx_secondary_exec_control(vmx));
Sheng Yang83ff3b92007-11-21 14:33:25 +08003862 }
Sheng Yangf78e0e22007-10-29 09:40:42 +08003863
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08003864 if (ple_gap) {
3865 vmcs_write32(PLE_GAP, ple_gap);
3866 vmcs_write32(PLE_WINDOW, ple_window);
3867 }
3868
Xiao Guangrongc3707952011-07-12 03:28:04 +08003869 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
3870 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003871 vmcs_write32(CR3_TARGET_COUNT, 0); /* 22.2.1 */
3872
Avi Kivity9581d442010-10-19 16:46:55 +02003873 vmcs_write16(HOST_FS_SELECTOR, 0); /* 22.2.4 */
3874 vmcs_write16(HOST_GS_SELECTOR, 0); /* 22.2.4 */
Nadav Har'Ela3a8ff82011-05-25 23:09:01 +03003875 vmx_set_constant_host_state();
Avi Kivity05b3e0c2006-12-13 00:33:45 -08003876#ifdef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08003877 rdmsrl(MSR_FS_BASE, a);
3878 vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
3879 rdmsrl(MSR_GS_BASE, a);
3880 vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
3881#else
3882 vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
3883 vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
3884#endif
3885
Eddie Dong2cc51562007-05-21 07:28:09 +03003886 vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
3887 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
Avi Kivity61d2ef22010-04-28 16:40:38 +03003888 vmcs_write64(VM_EXIT_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.host));
Eddie Dong2cc51562007-05-21 07:28:09 +03003889 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
Avi Kivity61d2ef22010-04-28 16:40:38 +03003890 vmcs_write64(VM_ENTRY_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.guest));
Avi Kivity6aa8b732006-12-10 02:21:36 -08003891
Sheng Yang468d4722008-10-09 16:01:55 +08003892 if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) {
Nadav Har'Ela3a8ff82011-05-25 23:09:01 +03003893 u32 msr_low, msr_high;
3894 u64 host_pat;
Sheng Yang468d4722008-10-09 16:01:55 +08003895 rdmsr(MSR_IA32_CR_PAT, msr_low, msr_high);
3896 host_pat = msr_low | ((u64) msr_high << 32);
3897 /* Write the default value follow host pat */
3898 vmcs_write64(GUEST_IA32_PAT, host_pat);
3899 /* Keep arch.pat sync with GUEST_IA32_PAT */
3900 vmx->vcpu.arch.pat = host_pat;
3901 }
3902
Avi Kivity6aa8b732006-12-10 02:21:36 -08003903 for (i = 0; i < NR_VMX_MSR; ++i) {
3904 u32 index = vmx_msr_index[i];
3905 u32 data_low, data_high;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04003906 int j = vmx->nmsrs;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003907
3908 if (rdmsr_safe(index, &data_low, &data_high) < 0)
3909 continue;
Avi Kivity432bd6c2007-01-31 23:48:13 -08003910 if (wrmsr_safe(index, data_low, data_high) < 0)
3911 continue;
Avi Kivity26bb0982009-09-07 11:14:12 +03003912 vmx->guest_msrs[j].index = i;
3913 vmx->guest_msrs[j].data = 0;
Avi Kivityd5696722009-12-02 12:28:47 +02003914 vmx->guest_msrs[j].mask = -1ull;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04003915 ++vmx->nmsrs;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003916 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08003917
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03003918 vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003919
3920 /* 22.2.1, 20.8.1 */
Yang, Sheng1c3d14fe2007-07-29 11:07:42 +03003921 vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);
3922
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003923 vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
Nadav Har'Elbf8179a2011-05-25 23:09:31 +03003924 set_cr4_guest_host_mask(vmx);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003925
Zachary Amsden99e3e302010-08-19 22:07:17 -10003926 kvm_write_tsc(&vmx->vcpu, 0);
Sheng Yangf78e0e22007-10-29 09:40:42 +08003927
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003928 return 0;
3929}
3930
3931static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
3932{
3933 struct vcpu_vmx *vmx = to_vmx(vcpu);
3934 u64 msr;
Xiao Guangrong4b9d3a02010-06-08 10:15:51 +08003935 int ret;
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003936
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03003937 vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP));
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003938
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003939 vmx->rmode.vm86_active = 0;
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003940
Jan Kiszka3b86cd92008-09-26 09:30:57 +02003941 vmx->soft_vnmi_blocked = 0;
3942
Zhang Xiantaoad312c72007-12-13 23:50:52 +08003943 vmx->vcpu.arch.regs[VCPU_REGS_RDX] = get_rdx_init_val();
Avi Kivity2d3ad1f2008-02-24 11:20:43 +02003944 kvm_set_cr8(&vmx->vcpu, 0);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003945 msr = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
Gleb Natapovc5af89b2009-06-09 15:56:26 +03003946 if (kvm_vcpu_is_bsp(&vmx->vcpu))
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003947 msr |= MSR_IA32_APICBASE_BSP;
3948 kvm_set_apic_base(&vmx->vcpu, msr);
3949
Jan Kiszka10ab25c2010-05-25 16:01:50 +02003950 ret = fx_init(&vmx->vcpu);
3951 if (ret != 0)
3952 goto out;
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003953
Avi Kivity2fb92db2011-04-27 19:42:18 +03003954 vmx_segment_cache_clear(vmx);
3955
Avi Kivity5706be02008-08-20 15:07:31 +03003956 seg_setup(VCPU_SREG_CS);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003957 /*
3958 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
3959 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
3960 */
Gleb Natapovc5af89b2009-06-09 15:56:26 +03003961 if (kvm_vcpu_is_bsp(&vmx->vcpu)) {
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003962 vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
3963 vmcs_writel(GUEST_CS_BASE, 0x000f0000);
3964 } else {
Zhang Xiantaoad312c72007-12-13 23:50:52 +08003965 vmcs_write16(GUEST_CS_SELECTOR, vmx->vcpu.arch.sipi_vector << 8);
3966 vmcs_writel(GUEST_CS_BASE, vmx->vcpu.arch.sipi_vector << 12);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003967 }
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003968
3969 seg_setup(VCPU_SREG_DS);
3970 seg_setup(VCPU_SREG_ES);
3971 seg_setup(VCPU_SREG_FS);
3972 seg_setup(VCPU_SREG_GS);
3973 seg_setup(VCPU_SREG_SS);
3974
3975 vmcs_write16(GUEST_TR_SELECTOR, 0);
3976 vmcs_writel(GUEST_TR_BASE, 0);
3977 vmcs_write32(GUEST_TR_LIMIT, 0xffff);
3978 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
3979
3980 vmcs_write16(GUEST_LDTR_SELECTOR, 0);
3981 vmcs_writel(GUEST_LDTR_BASE, 0);
3982 vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
3983 vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
3984
3985 vmcs_write32(GUEST_SYSENTER_CS, 0);
3986 vmcs_writel(GUEST_SYSENTER_ESP, 0);
3987 vmcs_writel(GUEST_SYSENTER_EIP, 0);
3988
3989 vmcs_writel(GUEST_RFLAGS, 0x02);
Gleb Natapovc5af89b2009-06-09 15:56:26 +03003990 if (kvm_vcpu_is_bsp(&vmx->vcpu))
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03003991 kvm_rip_write(vcpu, 0xfff0);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003992 else
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03003993 kvm_rip_write(vcpu, 0);
3994 kvm_register_write(vcpu, VCPU_REGS_RSP, 0);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003995
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003996 vmcs_writel(GUEST_DR7, 0x400);
3997
3998 vmcs_writel(GUEST_GDTR_BASE, 0);
3999 vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
4000
4001 vmcs_writel(GUEST_IDTR_BASE, 0);
4002 vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
4003
Anthony Liguori443381a2010-12-06 10:53:38 -06004004 vmcs_write32(GUEST_ACTIVITY_STATE, GUEST_ACTIVITY_ACTIVE);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02004005 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
4006 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
4007
Avi Kivitye00c8cf2007-10-21 11:00:39 +02004008 /* Special registers */
4009 vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
4010
4011 setup_msrs(vmx);
4012
Avi Kivity6aa8b732006-12-10 02:21:36 -08004013 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0); /* 22.2.1 */
4014
Sheng Yangf78e0e22007-10-29 09:40:42 +08004015 if (cpu_has_vmx_tpr_shadow()) {
4016 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR, 0);
4017 if (vm_need_tpr_shadow(vmx->vcpu.kvm))
4018 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR,
Takuya Yoshikawaafc20182011-03-05 12:40:20 +09004019 __pa(vmx->vcpu.arch.apic->regs));
Sheng Yangf78e0e22007-10-29 09:40:42 +08004020 vmcs_write32(TPR_THRESHOLD, 0);
4021 }
4022
4023 if (vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))
4024 vmcs_write64(APIC_ACCESS_ADDR,
Zhang Xiantaobfc6d222007-12-14 10:20:16 +08004025 page_to_phys(vmx->vcpu.kvm->arch.apic_access_page));
Avi Kivity6aa8b732006-12-10 02:21:36 -08004026
Sheng Yang2384d2b2008-01-17 15:14:33 +08004027 if (vmx->vpid != 0)
4028 vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid);
4029
Eduardo Habkostfa400522009-10-24 02:49:58 -02004030 vmx->vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET;
Marcelo Tosatti7a4f5ad2012-03-27 19:47:26 -03004031 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
Avi Kivity4d4ec082009-12-29 18:07:30 +02004032 vmx_set_cr0(&vmx->vcpu, kvm_read_cr0(vcpu)); /* enter rmode */
Marcelo Tosatti7a4f5ad2012-03-27 19:47:26 -03004033 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
Rusty Russell8b9cf982007-07-30 16:31:43 +10004034 vmx_set_cr4(&vmx->vcpu, 0);
Rusty Russell8b9cf982007-07-30 16:31:43 +10004035 vmx_set_efer(&vmx->vcpu, 0);
Rusty Russell8b9cf982007-07-30 16:31:43 +10004036 vmx_fpu_activate(&vmx->vcpu);
4037 update_exception_bitmap(&vmx->vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004038
Gui Jianfengb9d762f2010-06-07 10:32:29 +08004039 vpid_sync_context(vmx);
Sheng Yang2384d2b2008-01-17 15:14:33 +08004040
Marcelo Tosatti3200f402008-03-29 20:17:59 -03004041 ret = 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004042
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03004043 /* HACK: Don't enable emulation on guest boot/reset */
4044 vmx->emulation_required = 0;
4045
Avi Kivity6aa8b732006-12-10 02:21:36 -08004046out:
4047 return ret;
4048}
4049
Nadav Har'Elb6f12502011-05-25 23:13:06 +03004050/*
4051 * In nested virtualization, check if L1 asked to exit on external interrupts.
4052 * For most existing hypervisors, this will always return true.
4053 */
4054static bool nested_exit_on_intr(struct kvm_vcpu *vcpu)
4055{
4056 return get_vmcs12(vcpu)->pin_based_vm_exec_control &
4057 PIN_BASED_EXT_INTR_MASK;
4058}
4059
Jan Kiszka3b86cd92008-09-26 09:30:57 +02004060static void enable_irq_window(struct kvm_vcpu *vcpu)
4061{
4062 u32 cpu_based_vm_exec_control;
Nadav Har'Eld6185f22011-09-22 13:52:56 +03004063 if (is_guest_mode(vcpu) && nested_exit_on_intr(vcpu)) {
4064 /*
4065 * We get here if vmx_interrupt_allowed() said we can't
4066 * inject to L1 now because L2 must run. Ask L2 to exit
4067 * right after entry, so we can inject to L1 more promptly.
Nadav Har'Elb6f12502011-05-25 23:13:06 +03004068 */
Nadav Har'Eld6185f22011-09-22 13:52:56 +03004069 kvm_make_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
Nadav Har'Elb6f12502011-05-25 23:13:06 +03004070 return;
Nadav Har'Eld6185f22011-09-22 13:52:56 +03004071 }
Jan Kiszka3b86cd92008-09-26 09:30:57 +02004072
4073 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
4074 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
4075 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
4076}
4077
4078static void enable_nmi_window(struct kvm_vcpu *vcpu)
4079{
4080 u32 cpu_based_vm_exec_control;
4081
4082 if (!cpu_has_virtual_nmis()) {
4083 enable_irq_window(vcpu);
4084 return;
4085 }
4086
Avi Kivity30bd0c42010-11-01 23:20:48 +02004087 if (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & GUEST_INTR_STATE_STI) {
4088 enable_irq_window(vcpu);
4089 return;
4090 }
Jan Kiszka3b86cd92008-09-26 09:30:57 +02004091 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
4092 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_NMI_PENDING;
4093 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
4094}
4095
Gleb Natapov66fd3f72009-05-11 13:35:50 +03004096static void vmx_inject_irq(struct kvm_vcpu *vcpu)
Eddie Dong85f455f2007-07-06 12:20:49 +03004097{
Avi Kivity9c8cba32007-11-22 11:42:59 +02004098 struct vcpu_vmx *vmx = to_vmx(vcpu);
Gleb Natapov66fd3f72009-05-11 13:35:50 +03004099 uint32_t intr;
4100 int irq = vcpu->arch.interrupt.nr;
Avi Kivity9c8cba32007-11-22 11:42:59 +02004101
Marcelo Tosatti229456f2009-06-17 09:22:14 -03004102 trace_kvm_inj_virq(irq);
Feng (Eric) Liu2714d1d2008-04-10 15:31:10 -04004103
Avi Kivityfa89a812008-09-01 15:57:51 +03004104 ++vcpu->stat.irq_injections;
Avi Kivity7ffd92c2009-06-09 14:10:45 +03004105 if (vmx->rmode.vm86_active) {
Serge E. Hallyn71f98332011-04-13 09:12:54 -05004106 int inc_eip = 0;
4107 if (vcpu->arch.interrupt.soft)
4108 inc_eip = vcpu->arch.event_exit_inst_len;
4109 if (kvm_inject_realmode_interrupt(vcpu, irq, inc_eip) != EMULATE_DONE)
Mohammed Gamala92601b2010-09-19 14:34:07 +02004110 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
Eddie Dong85f455f2007-07-06 12:20:49 +03004111 return;
4112 }
Gleb Natapov66fd3f72009-05-11 13:35:50 +03004113 intr = irq | INTR_INFO_VALID_MASK;
4114 if (vcpu->arch.interrupt.soft) {
4115 intr |= INTR_TYPE_SOFT_INTR;
4116 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
4117 vmx->vcpu.arch.event_exit_inst_len);
4118 } else
4119 intr |= INTR_TYPE_EXT_INTR;
4120 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr);
Eddie Dong85f455f2007-07-06 12:20:49 +03004121}
4122
Sheng Yangf08864b2008-05-15 18:23:25 +08004123static void vmx_inject_nmi(struct kvm_vcpu *vcpu)
4124{
Jan Kiszka66a5a342008-09-26 09:30:51 +02004125 struct vcpu_vmx *vmx = to_vmx(vcpu);
4126
Nadav Har'El0b6ac342011-05-25 23:13:36 +03004127 if (is_guest_mode(vcpu))
4128 return;
4129
Jan Kiszka3b86cd92008-09-26 09:30:57 +02004130 if (!cpu_has_virtual_nmis()) {
4131 /*
4132 * Tracking the NMI-blocked state in software is built upon
4133 * finding the next open IRQ window. This, in turn, depends on
4134 * well-behaving guests: They have to keep IRQs disabled at
4135 * least as long as the NMI handler runs. Otherwise we may
4136 * cause NMI nesting, maybe breaking the guest. But as this is
4137 * highly unlikely, we can live with the residual risk.
4138 */
4139 vmx->soft_vnmi_blocked = 1;
4140 vmx->vnmi_blocked_time = 0;
4141 }
4142
Jan Kiszka487b3912008-09-26 09:30:56 +02004143 ++vcpu->stat.nmi_injections;
Avi Kivity9d58b932011-03-07 16:52:07 +02004144 vmx->nmi_known_unmasked = false;
Avi Kivity7ffd92c2009-06-09 14:10:45 +03004145 if (vmx->rmode.vm86_active) {
Serge E. Hallyn71f98332011-04-13 09:12:54 -05004146 if (kvm_inject_realmode_interrupt(vcpu, NMI_VECTOR, 0) != EMULATE_DONE)
Mohammed Gamala92601b2010-09-19 14:34:07 +02004147 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
Jan Kiszka66a5a342008-09-26 09:30:51 +02004148 return;
4149 }
Sheng Yangf08864b2008-05-15 18:23:25 +08004150 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
4151 INTR_TYPE_NMI_INTR | INTR_INFO_VALID_MASK | NMI_VECTOR);
Sheng Yangf08864b2008-05-15 18:23:25 +08004152}
4153
Gleb Natapovc4282df2009-04-21 17:45:07 +03004154static int vmx_nmi_allowed(struct kvm_vcpu *vcpu)
Jan Kiszka33f089c2008-09-26 09:30:49 +02004155{
Jan Kiszka3b86cd92008-09-26 09:30:57 +02004156 if (!cpu_has_virtual_nmis() && to_vmx(vcpu)->soft_vnmi_blocked)
Gleb Natapovc4282df2009-04-21 17:45:07 +03004157 return 0;
Jan Kiszka33f089c2008-09-26 09:30:49 +02004158
Gleb Natapovc4282df2009-04-21 17:45:07 +03004159 return !(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
Avi Kivity30bd0c42010-11-01 23:20:48 +02004160 (GUEST_INTR_STATE_MOV_SS | GUEST_INTR_STATE_STI
4161 | GUEST_INTR_STATE_NMI));
Jan Kiszka33f089c2008-09-26 09:30:49 +02004162}
4163
Jan Kiszka3cfc3092009-11-12 01:04:25 +01004164static bool vmx_get_nmi_mask(struct kvm_vcpu *vcpu)
4165{
4166 if (!cpu_has_virtual_nmis())
4167 return to_vmx(vcpu)->soft_vnmi_blocked;
Avi Kivity9d58b932011-03-07 16:52:07 +02004168 if (to_vmx(vcpu)->nmi_known_unmasked)
4169 return false;
Avi Kivityc332c832010-05-04 12:24:12 +03004170 return vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & GUEST_INTR_STATE_NMI;
Jan Kiszka3cfc3092009-11-12 01:04:25 +01004171}
4172
4173static void vmx_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked)
4174{
4175 struct vcpu_vmx *vmx = to_vmx(vcpu);
4176
4177 if (!cpu_has_virtual_nmis()) {
4178 if (vmx->soft_vnmi_blocked != masked) {
4179 vmx->soft_vnmi_blocked = masked;
4180 vmx->vnmi_blocked_time = 0;
4181 }
4182 } else {
Avi Kivity9d58b932011-03-07 16:52:07 +02004183 vmx->nmi_known_unmasked = !masked;
Jan Kiszka3cfc3092009-11-12 01:04:25 +01004184 if (masked)
4185 vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO,
4186 GUEST_INTR_STATE_NMI);
4187 else
4188 vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO,
4189 GUEST_INTR_STATE_NMI);
4190 }
4191}
4192
Gleb Natapov78646122009-03-23 12:12:11 +02004193static int vmx_interrupt_allowed(struct kvm_vcpu *vcpu)
4194{
Nadav Har'Elb6f12502011-05-25 23:13:06 +03004195 if (is_guest_mode(vcpu) && nested_exit_on_intr(vcpu)) {
Nadav Har'El51cfe382011-09-22 13:53:26 +03004196 struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
4197 if (to_vmx(vcpu)->nested.nested_run_pending ||
4198 (vmcs12->idt_vectoring_info_field &
4199 VECTORING_INFO_VALID_MASK))
Nadav Har'Elb6f12502011-05-25 23:13:06 +03004200 return 0;
4201 nested_vmx_vmexit(vcpu);
Nadav Har'Elb6f12502011-05-25 23:13:06 +03004202 vmcs12->vm_exit_reason = EXIT_REASON_EXTERNAL_INTERRUPT;
4203 vmcs12->vm_exit_intr_info = 0;
4204 /* fall through to normal code, but now in L1, not L2 */
4205 }
4206
Gleb Natapovc4282df2009-04-21 17:45:07 +03004207 return (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
4208 !(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
4209 (GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS));
Gleb Natapov78646122009-03-23 12:12:11 +02004210}
4211
Izik Eiduscbc94022007-10-25 00:29:55 +02004212static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr)
4213{
4214 int ret;
4215 struct kvm_userspace_memory_region tss_mem = {
Sheng Yang6fe63972008-10-16 17:30:58 +08004216 .slot = TSS_PRIVATE_MEMSLOT,
Izik Eiduscbc94022007-10-25 00:29:55 +02004217 .guest_phys_addr = addr,
4218 .memory_size = PAGE_SIZE * 3,
4219 .flags = 0,
4220 };
4221
4222 ret = kvm_set_memory_region(kvm, &tss_mem, 0);
4223 if (ret)
4224 return ret;
Zhang Xiantaobfc6d222007-12-14 10:20:16 +08004225 kvm->arch.tss_addr = addr;
Gleb Natapov93ea5382011-02-21 12:07:59 +02004226 if (!init_rmode_tss(kvm))
4227 return -ENOMEM;
4228
Izik Eiduscbc94022007-10-25 00:29:55 +02004229 return 0;
4230}
4231
Avi Kivity6aa8b732006-12-10 02:21:36 -08004232static int handle_rmode_exception(struct kvm_vcpu *vcpu,
4233 int vec, u32 err_code)
4234{
Nitin A Kambleb3f37702007-05-17 15:50:34 +03004235 /*
4236 * Instruction with address size override prefix opcode 0x67
4237 * Cause the #SS fault with 0 error code in VM86 mode.
4238 */
4239 if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
Andre Przywara51d8b662010-12-21 11:12:02 +01004240 if (emulate_instruction(vcpu, 0) == EMULATE_DONE)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004241 return 1;
Jan Kiszka77ab6db2008-07-14 12:28:51 +02004242 /*
4243 * Forward all other exceptions that are valid in real mode.
4244 * FIXME: Breaks guest debugging in real mode, needs to be fixed with
4245 * the required debugging infrastructure rework.
4246 */
4247 switch (vec) {
Jan Kiszka77ab6db2008-07-14 12:28:51 +02004248 case DB_VECTOR:
Jan Kiszkad0bfb942008-12-15 13:52:10 +01004249 if (vcpu->guest_debug &
4250 (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))
4251 return 0;
4252 kvm_queue_exception(vcpu, vec);
4253 return 1;
Jan Kiszka77ab6db2008-07-14 12:28:51 +02004254 case BP_VECTOR:
Jan Kiszkac573cd22010-02-23 17:47:53 +01004255 /*
4256 * Update instruction length as we may reinject the exception
4257 * from user space while in guest debugging mode.
4258 */
4259 to_vmx(vcpu)->vcpu.arch.event_exit_inst_len =
4260 vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
Jan Kiszkad0bfb942008-12-15 13:52:10 +01004261 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
4262 return 0;
4263 /* fall through */
4264 case DE_VECTOR:
Jan Kiszka77ab6db2008-07-14 12:28:51 +02004265 case OF_VECTOR:
4266 case BR_VECTOR:
4267 case UD_VECTOR:
4268 case DF_VECTOR:
4269 case SS_VECTOR:
4270 case GP_VECTOR:
4271 case MF_VECTOR:
4272 kvm_queue_exception(vcpu, vec);
4273 return 1;
4274 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004275 return 0;
4276}
4277
Andi Kleena0861c02009-06-08 17:37:09 +08004278/*
4279 * Trigger machine check on the host. We assume all the MSRs are already set up
4280 * by the CPU and that we still run on the same CPU as the MCE occurred on.
4281 * We pass a fake environment to the machine check handler because we want
4282 * the guest to be always treated like user space, no matter what context
4283 * it used internally.
4284 */
4285static void kvm_machine_check(void)
4286{
4287#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_64)
4288 struct pt_regs regs = {
4289 .cs = 3, /* Fake ring 3 no matter what the guest ran on */
4290 .flags = X86_EFLAGS_IF,
4291 };
4292
4293 do_machine_check(&regs, 0);
4294#endif
4295}
4296
Avi Kivity851ba692009-08-24 11:10:17 +03004297static int handle_machine_check(struct kvm_vcpu *vcpu)
Andi Kleena0861c02009-06-08 17:37:09 +08004298{
4299 /* already handled by vcpu_run */
4300 return 1;
4301}
4302
Avi Kivity851ba692009-08-24 11:10:17 +03004303static int handle_exception(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004304{
Avi Kivity1155f762007-11-22 11:30:47 +02004305 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity851ba692009-08-24 11:10:17 +03004306 struct kvm_run *kvm_run = vcpu->run;
Jan Kiszkad0bfb942008-12-15 13:52:10 +01004307 u32 intr_info, ex_no, error_code;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004308 unsigned long cr2, rip, dr6;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004309 u32 vect_info;
4310 enum emulation_result er;
4311
Avi Kivity1155f762007-11-22 11:30:47 +02004312 vect_info = vmx->idt_vectoring_info;
Avi Kivity88786472011-03-07 17:39:45 +02004313 intr_info = vmx->exit_intr_info;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004314
Andi Kleena0861c02009-06-08 17:37:09 +08004315 if (is_machine_check(intr_info))
Avi Kivity851ba692009-08-24 11:10:17 +03004316 return handle_machine_check(vcpu);
Andi Kleena0861c02009-06-08 17:37:09 +08004317
Avi Kivity6aa8b732006-12-10 02:21:36 -08004318 if ((vect_info & VECTORING_INFO_VALID_MASK) &&
Avi Kivity65ac7262009-11-04 11:59:01 +02004319 !is_page_fault(intr_info)) {
4320 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4321 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_SIMUL_EX;
4322 vcpu->run->internal.ndata = 2;
4323 vcpu->run->internal.data[0] = vect_info;
4324 vcpu->run->internal.data[1] = intr_info;
4325 return 0;
4326 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004327
Jan Kiszkae4a41882008-09-26 09:30:46 +02004328 if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_NMI_INTR)
Avi Kivity1b6269d2007-10-09 12:12:19 +02004329 return 1; /* already handled by vmx_vcpu_run() */
Anthony Liguori2ab455c2007-04-27 09:29:49 +03004330
4331 if (is_no_device(intr_info)) {
Avi Kivity5fd86fc2007-05-02 20:40:00 +03004332 vmx_fpu_activate(vcpu);
Anthony Liguori2ab455c2007-04-27 09:29:49 +03004333 return 1;
4334 }
4335
Anthony Liguori7aa81cc2007-09-17 14:57:50 -05004336 if (is_invalid_opcode(intr_info)) {
Andre Przywara51d8b662010-12-21 11:12:02 +01004337 er = emulate_instruction(vcpu, EMULTYPE_TRAP_UD);
Anthony Liguori7aa81cc2007-09-17 14:57:50 -05004338 if (er != EMULATE_DONE)
Avi Kivity7ee5d9402007-11-25 15:22:50 +02004339 kvm_queue_exception(vcpu, UD_VECTOR);
Anthony Liguori7aa81cc2007-09-17 14:57:50 -05004340 return 1;
4341 }
4342
Avi Kivity6aa8b732006-12-10 02:21:36 -08004343 error_code = 0;
Ryan Harper2e113842008-02-11 10:26:38 -06004344 if (intr_info & INTR_INFO_DELIVER_CODE_MASK)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004345 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
4346 if (is_page_fault(intr_info)) {
Sheng Yang14394422008-04-28 12:24:45 +08004347 /* EPT won't cause page fault directly */
Julia Lawallcf3ace72011-08-02 12:34:57 +02004348 BUG_ON(enable_ept);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004349 cr2 = vmcs_readl(EXIT_QUALIFICATION);
Marcelo Tosatti229456f2009-06-17 09:22:14 -03004350 trace_kvm_page_fault(cr2, error_code);
4351
Gleb Natapov3298b752009-05-11 13:35:46 +03004352 if (kvm_event_needs_reinjection(vcpu))
Avi Kivity577bdc42008-07-19 08:57:05 +03004353 kvm_mmu_unprotect_page_virt(vcpu, cr2);
Andre Przywaradc25e892010-12-21 11:12:07 +01004354 return kvm_mmu_page_fault(vcpu, cr2, error_code, NULL, 0);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004355 }
4356
Avi Kivity7ffd92c2009-06-09 14:10:45 +03004357 if (vmx->rmode.vm86_active &&
Avi Kivity6aa8b732006-12-10 02:21:36 -08004358 handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
Avi Kivity72d6e5a2007-06-05 16:15:51 +03004359 error_code)) {
Zhang Xiantaoad312c72007-12-13 23:50:52 +08004360 if (vcpu->arch.halt_request) {
4361 vcpu->arch.halt_request = 0;
Avi Kivity72d6e5a2007-06-05 16:15:51 +03004362 return kvm_emulate_halt(vcpu);
4363 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004364 return 1;
Avi Kivity72d6e5a2007-06-05 16:15:51 +03004365 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004366
Jan Kiszkad0bfb942008-12-15 13:52:10 +01004367 ex_no = intr_info & INTR_INFO_VECTOR_MASK;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004368 switch (ex_no) {
4369 case DB_VECTOR:
4370 dr6 = vmcs_readl(EXIT_QUALIFICATION);
4371 if (!(vcpu->guest_debug &
4372 (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {
4373 vcpu->arch.dr6 = dr6 | DR6_FIXED_1;
4374 kvm_queue_exception(vcpu, DB_VECTOR);
4375 return 1;
4376 }
4377 kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1;
4378 kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7);
4379 /* fall through */
4380 case BP_VECTOR:
Jan Kiszkac573cd22010-02-23 17:47:53 +01004381 /*
4382 * Update instruction length as we may reinject #BP from
4383 * user space while in guest debugging mode. Reading it for
4384 * #DB as well causes no harm, it is not used in that case.
4385 */
4386 vmx->vcpu.arch.event_exit_inst_len =
4387 vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004388 kvm_run->exit_reason = KVM_EXIT_DEBUG;
Avi Kivity0a434bb2011-04-28 15:59:33 +03004389 rip = kvm_rip_read(vcpu);
Jan Kiszkad0bfb942008-12-15 13:52:10 +01004390 kvm_run->debug.arch.pc = vmcs_readl(GUEST_CS_BASE) + rip;
4391 kvm_run->debug.arch.exception = ex_no;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004392 break;
4393 default:
Jan Kiszkad0bfb942008-12-15 13:52:10 +01004394 kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
4395 kvm_run->ex.exception = ex_no;
4396 kvm_run->ex.error_code = error_code;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004397 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004398 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004399 return 0;
4400}
4401
Avi Kivity851ba692009-08-24 11:10:17 +03004402static int handle_external_interrupt(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004403{
Avi Kivity1165f5f2007-04-19 17:27:43 +03004404 ++vcpu->stat.irq_exits;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004405 return 1;
4406}
4407
Avi Kivity851ba692009-08-24 11:10:17 +03004408static int handle_triple_fault(struct kvm_vcpu *vcpu)
Avi Kivity988ad742007-02-12 00:54:36 -08004409{
Avi Kivity851ba692009-08-24 11:10:17 +03004410 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
Avi Kivity988ad742007-02-12 00:54:36 -08004411 return 0;
4412}
Avi Kivity6aa8b732006-12-10 02:21:36 -08004413
Avi Kivity851ba692009-08-24 11:10:17 +03004414static int handle_io(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004415{
He, Qingbfdaab02007-09-12 14:18:28 +08004416 unsigned long exit_qualification;
Jan Kiszka34c33d12009-02-08 13:28:15 +01004417 int size, in, string;
Avi Kivity039576c2007-03-20 12:46:50 +02004418 unsigned port;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004419
He, Qingbfdaab02007-09-12 14:18:28 +08004420 exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
Avi Kivity039576c2007-03-20 12:46:50 +02004421 string = (exit_qualification & 16) != 0;
Laurent Viviere70669a2007-08-05 10:36:40 +03004422 in = (exit_qualification & 8) != 0;
Laurent Viviere70669a2007-08-05 10:36:40 +03004423
Gleb Natapovcf8f70b2010-03-18 15:20:23 +02004424 ++vcpu->stat.io_exits;
4425
4426 if (string || in)
Andre Przywara51d8b662010-12-21 11:12:02 +01004427 return emulate_instruction(vcpu, 0) == EMULATE_DONE;
Gleb Natapovcf8f70b2010-03-18 15:20:23 +02004428
4429 port = exit_qualification >> 16;
4430 size = (exit_qualification & 7) + 1;
Guillaume Thouvenine93f36b2008-10-28 10:51:30 +01004431 skip_emulated_instruction(vcpu);
Gleb Natapovcf8f70b2010-03-18 15:20:23 +02004432
4433 return kvm_fast_pio_out(vcpu, size, port);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004434}
4435
Ingo Molnar102d8322007-02-19 14:37:47 +02004436static void
4437vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
4438{
4439 /*
4440 * Patch in the VMCALL instruction:
4441 */
4442 hypercall[0] = 0x0f;
4443 hypercall[1] = 0x01;
4444 hypercall[2] = 0xc1;
Ingo Molnar102d8322007-02-19 14:37:47 +02004445}
4446
Guo Chao0fa06072012-06-28 15:16:19 +08004447/* called to set cr0 as appropriate for a mov-to-cr0 exit. */
Nadav Har'Eleeadf9e2011-05-25 23:14:38 +03004448static int handle_set_cr0(struct kvm_vcpu *vcpu, unsigned long val)
4449{
4450 if (to_vmx(vcpu)->nested.vmxon &&
4451 ((val & VMXON_CR0_ALWAYSON) != VMXON_CR0_ALWAYSON))
4452 return 1;
4453
4454 if (is_guest_mode(vcpu)) {
4455 /*
4456 * We get here when L2 changed cr0 in a way that did not change
4457 * any of L1's shadowed bits (see nested_vmx_exit_handled_cr),
4458 * but did change L0 shadowed bits. This can currently happen
4459 * with the TS bit: L0 may want to leave TS on (for lazy fpu
4460 * loading) while pretending to allow the guest to change it.
4461 */
4462 if (kvm_set_cr0(vcpu, (val & vcpu->arch.cr0_guest_owned_bits) |
4463 (vcpu->arch.cr0 & ~vcpu->arch.cr0_guest_owned_bits)))
4464 return 1;
4465 vmcs_writel(CR0_READ_SHADOW, val);
4466 return 0;
4467 } else
4468 return kvm_set_cr0(vcpu, val);
4469}
4470
4471static int handle_set_cr4(struct kvm_vcpu *vcpu, unsigned long val)
4472{
4473 if (is_guest_mode(vcpu)) {
4474 if (kvm_set_cr4(vcpu, (val & vcpu->arch.cr4_guest_owned_bits) |
4475 (vcpu->arch.cr4 & ~vcpu->arch.cr4_guest_owned_bits)))
4476 return 1;
4477 vmcs_writel(CR4_READ_SHADOW, val);
4478 return 0;
4479 } else
4480 return kvm_set_cr4(vcpu, val);
4481}
4482
4483/* called to set cr0 as approriate for clts instruction exit. */
4484static void handle_clts(struct kvm_vcpu *vcpu)
4485{
4486 if (is_guest_mode(vcpu)) {
4487 /*
4488 * We get here when L2 did CLTS, and L1 didn't shadow CR0.TS
4489 * but we did (!fpu_active). We need to keep GUEST_CR0.TS on,
4490 * just pretend it's off (also in arch.cr0 for fpu_activate).
4491 */
4492 vmcs_writel(CR0_READ_SHADOW,
4493 vmcs_readl(CR0_READ_SHADOW) & ~X86_CR0_TS);
4494 vcpu->arch.cr0 &= ~X86_CR0_TS;
4495 } else
4496 vmx_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4497}
4498
Avi Kivity851ba692009-08-24 11:10:17 +03004499static int handle_cr(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004500{
Marcelo Tosatti229456f2009-06-17 09:22:14 -03004501 unsigned long exit_qualification, val;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004502 int cr;
4503 int reg;
Avi Kivity49a9b072010-06-10 17:02:14 +03004504 int err;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004505
He, Qingbfdaab02007-09-12 14:18:28 +08004506 exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004507 cr = exit_qualification & 15;
4508 reg = (exit_qualification >> 8) & 15;
4509 switch ((exit_qualification >> 4) & 3) {
4510 case 0: /* mov to cr */
Marcelo Tosatti229456f2009-06-17 09:22:14 -03004511 val = kvm_register_read(vcpu, reg);
4512 trace_kvm_cr_write(cr, val);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004513 switch (cr) {
4514 case 0:
Nadav Har'Eleeadf9e2011-05-25 23:14:38 +03004515 err = handle_set_cr0(vcpu, val);
Andre Przywaradb8fcef2010-12-21 11:12:01 +01004516 kvm_complete_insn_gp(vcpu, err);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004517 return 1;
4518 case 3:
Avi Kivity23902182010-06-10 17:02:16 +03004519 err = kvm_set_cr3(vcpu, val);
Andre Przywaradb8fcef2010-12-21 11:12:01 +01004520 kvm_complete_insn_gp(vcpu, err);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004521 return 1;
4522 case 4:
Nadav Har'Eleeadf9e2011-05-25 23:14:38 +03004523 err = handle_set_cr4(vcpu, val);
Andre Przywaradb8fcef2010-12-21 11:12:01 +01004524 kvm_complete_insn_gp(vcpu, err);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004525 return 1;
Gleb Natapov0a5fff192009-04-21 17:45:06 +03004526 case 8: {
4527 u8 cr8_prev = kvm_get_cr8(vcpu);
4528 u8 cr8 = kvm_register_read(vcpu, reg);
Andre Przywaraeea1cff2010-12-21 11:12:00 +01004529 err = kvm_set_cr8(vcpu, cr8);
Andre Przywaradb8fcef2010-12-21 11:12:01 +01004530 kvm_complete_insn_gp(vcpu, err);
Gleb Natapov0a5fff192009-04-21 17:45:06 +03004531 if (irqchip_in_kernel(vcpu->kvm))
4532 return 1;
4533 if (cr8_prev <= cr8)
4534 return 1;
Avi Kivity851ba692009-08-24 11:10:17 +03004535 vcpu->run->exit_reason = KVM_EXIT_SET_TPR;
Gleb Natapov0a5fff192009-04-21 17:45:06 +03004536 return 0;
4537 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004538 };
4539 break;
Anthony Liguori25c4c272007-04-27 09:29:21 +03004540 case 2: /* clts */
Nadav Har'Eleeadf9e2011-05-25 23:14:38 +03004541 handle_clts(vcpu);
Avi Kivity4d4ec082009-12-29 18:07:30 +02004542 trace_kvm_cr_write(0, kvm_read_cr0(vcpu));
Anthony Liguori25c4c272007-04-27 09:29:21 +03004543 skip_emulated_instruction(vcpu);
Avi Kivity6b52d182010-01-21 15:31:47 +02004544 vmx_fpu_activate(vcpu);
Anthony Liguori25c4c272007-04-27 09:29:21 +03004545 return 1;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004546 case 1: /*mov from cr*/
4547 switch (cr) {
4548 case 3:
Avi Kivity9f8fe502010-12-05 17:30:00 +02004549 val = kvm_read_cr3(vcpu);
4550 kvm_register_write(vcpu, reg, val);
4551 trace_kvm_cr_read(cr, val);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004552 skip_emulated_instruction(vcpu);
4553 return 1;
4554 case 8:
Marcelo Tosatti229456f2009-06-17 09:22:14 -03004555 val = kvm_get_cr8(vcpu);
4556 kvm_register_write(vcpu, reg, val);
4557 trace_kvm_cr_read(cr, val);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004558 skip_emulated_instruction(vcpu);
4559 return 1;
4560 }
4561 break;
4562 case 3: /* lmsw */
Avi Kivitya1f83a72009-12-29 17:33:58 +02004563 val = (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f;
Avi Kivity4d4ec082009-12-29 18:07:30 +02004564 trace_kvm_cr_write(0, (kvm_read_cr0(vcpu) & ~0xful) | val);
Avi Kivitya1f83a72009-12-29 17:33:58 +02004565 kvm_lmsw(vcpu, val);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004566
4567 skip_emulated_instruction(vcpu);
4568 return 1;
4569 default:
4570 break;
4571 }
Avi Kivity851ba692009-08-24 11:10:17 +03004572 vcpu->run->exit_reason = 0;
Christoffer Dalla737f252012-06-03 21:17:48 +03004573 vcpu_unimpl(vcpu, "unhandled control register: op %d cr %d\n",
Avi Kivity6aa8b732006-12-10 02:21:36 -08004574 (int)(exit_qualification >> 4) & 3, cr);
4575 return 0;
4576}
4577
Avi Kivity851ba692009-08-24 11:10:17 +03004578static int handle_dr(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004579{
He, Qingbfdaab02007-09-12 14:18:28 +08004580 unsigned long exit_qualification;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004581 int dr, reg;
4582
Jan Kiszkaf2483412010-01-20 18:20:20 +01004583 /* Do not handle if the CPL > 0, will trigger GP on re-entry */
Avi Kivity0a79b002009-09-01 12:03:25 +03004584 if (!kvm_require_cpl(vcpu, 0))
4585 return 1;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004586 dr = vmcs_readl(GUEST_DR7);
4587 if (dr & DR7_GD) {
4588 /*
4589 * As the vm-exit takes precedence over the debug trap, we
4590 * need to emulate the latter, either for the host or the
4591 * guest debugging itself.
4592 */
4593 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
Avi Kivity851ba692009-08-24 11:10:17 +03004594 vcpu->run->debug.arch.dr6 = vcpu->arch.dr6;
4595 vcpu->run->debug.arch.dr7 = dr;
4596 vcpu->run->debug.arch.pc =
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004597 vmcs_readl(GUEST_CS_BASE) +
4598 vmcs_readl(GUEST_RIP);
Avi Kivity851ba692009-08-24 11:10:17 +03004599 vcpu->run->debug.arch.exception = DB_VECTOR;
4600 vcpu->run->exit_reason = KVM_EXIT_DEBUG;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004601 return 0;
4602 } else {
4603 vcpu->arch.dr7 &= ~DR7_GD;
4604 vcpu->arch.dr6 |= DR6_BD;
4605 vmcs_writel(GUEST_DR7, vcpu->arch.dr7);
4606 kvm_queue_exception(vcpu, DB_VECTOR);
4607 return 1;
4608 }
4609 }
4610
He, Qingbfdaab02007-09-12 14:18:28 +08004611 exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004612 dr = exit_qualification & DEBUG_REG_ACCESS_NUM;
4613 reg = DEBUG_REG_ACCESS_REG(exit_qualification);
4614 if (exit_qualification & TYPE_MOV_FROM_DR) {
Gleb Natapov020df072010-04-13 10:05:23 +03004615 unsigned long val;
4616 if (!kvm_get_dr(vcpu, dr, &val))
4617 kvm_register_write(vcpu, reg, val);
4618 } else
4619 kvm_set_dr(vcpu, dr, vcpu->arch.regs[reg]);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004620 skip_emulated_instruction(vcpu);
4621 return 1;
4622}
4623
Gleb Natapov020df072010-04-13 10:05:23 +03004624static void vmx_set_dr7(struct kvm_vcpu *vcpu, unsigned long val)
4625{
4626 vmcs_writel(GUEST_DR7, val);
4627}
4628
Avi Kivity851ba692009-08-24 11:10:17 +03004629static int handle_cpuid(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004630{
Avi Kivity06465c52007-02-28 20:46:53 +02004631 kvm_emulate_cpuid(vcpu);
4632 return 1;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004633}
4634
Avi Kivity851ba692009-08-24 11:10:17 +03004635static int handle_rdmsr(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004636{
Zhang Xiantaoad312c72007-12-13 23:50:52 +08004637 u32 ecx = vcpu->arch.regs[VCPU_REGS_RCX];
Avi Kivity6aa8b732006-12-10 02:21:36 -08004638 u64 data;
4639
4640 if (vmx_get_msr(vcpu, ecx, &data)) {
Avi Kivity59200272010-01-25 19:47:02 +02004641 trace_kvm_msr_read_ex(ecx);
Avi Kivityc1a5d4f2007-11-25 14:12:03 +02004642 kvm_inject_gp(vcpu, 0);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004643 return 1;
4644 }
4645
Marcelo Tosatti229456f2009-06-17 09:22:14 -03004646 trace_kvm_msr_read(ecx, data);
Feng (Eric) Liu2714d1d2008-04-10 15:31:10 -04004647
Avi Kivity6aa8b732006-12-10 02:21:36 -08004648 /* FIXME: handling of bits 32:63 of rax, rdx */
Zhang Xiantaoad312c72007-12-13 23:50:52 +08004649 vcpu->arch.regs[VCPU_REGS_RAX] = data & -1u;
4650 vcpu->arch.regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004651 skip_emulated_instruction(vcpu);
4652 return 1;
4653}
4654
Avi Kivity851ba692009-08-24 11:10:17 +03004655static int handle_wrmsr(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004656{
Zhang Xiantaoad312c72007-12-13 23:50:52 +08004657 u32 ecx = vcpu->arch.regs[VCPU_REGS_RCX];
4658 u64 data = (vcpu->arch.regs[VCPU_REGS_RAX] & -1u)
4659 | ((u64)(vcpu->arch.regs[VCPU_REGS_RDX] & -1u) << 32);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004660
4661 if (vmx_set_msr(vcpu, ecx, data) != 0) {
Avi Kivity59200272010-01-25 19:47:02 +02004662 trace_kvm_msr_write_ex(ecx, data);
Avi Kivityc1a5d4f2007-11-25 14:12:03 +02004663 kvm_inject_gp(vcpu, 0);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004664 return 1;
4665 }
4666
Avi Kivity59200272010-01-25 19:47:02 +02004667 trace_kvm_msr_write(ecx, data);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004668 skip_emulated_instruction(vcpu);
4669 return 1;
4670}
4671
Avi Kivity851ba692009-08-24 11:10:17 +03004672static int handle_tpr_below_threshold(struct kvm_vcpu *vcpu)
Yang, Sheng6e5d8652007-09-12 18:03:11 +08004673{
Avi Kivity3842d132010-07-27 12:30:24 +03004674 kvm_make_request(KVM_REQ_EVENT, vcpu);
Yang, Sheng6e5d8652007-09-12 18:03:11 +08004675 return 1;
4676}
4677
Avi Kivity851ba692009-08-24 11:10:17 +03004678static int handle_interrupt_window(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004679{
Eddie Dong85f455f2007-07-06 12:20:49 +03004680 u32 cpu_based_vm_exec_control;
4681
4682 /* clear pending irq */
4683 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
4684 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
4685 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
Feng (Eric) Liu2714d1d2008-04-10 15:31:10 -04004686
Avi Kivity3842d132010-07-27 12:30:24 +03004687 kvm_make_request(KVM_REQ_EVENT, vcpu);
4688
Jan Kiszkaa26bf122008-09-26 09:30:45 +02004689 ++vcpu->stat.irq_window_exits;
Feng (Eric) Liu2714d1d2008-04-10 15:31:10 -04004690
Dor Laorc1150d82007-01-05 16:36:24 -08004691 /*
4692 * If the user space waits to inject interrupts, exit as soon as
4693 * possible
4694 */
Gleb Natapov80618232009-04-21 17:44:56 +03004695 if (!irqchip_in_kernel(vcpu->kvm) &&
Avi Kivity851ba692009-08-24 11:10:17 +03004696 vcpu->run->request_interrupt_window &&
Gleb Natapov80618232009-04-21 17:44:56 +03004697 !kvm_cpu_has_interrupt(vcpu)) {
Avi Kivity851ba692009-08-24 11:10:17 +03004698 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
Dor Laorc1150d82007-01-05 16:36:24 -08004699 return 0;
4700 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004701 return 1;
4702}
4703
Avi Kivity851ba692009-08-24 11:10:17 +03004704static int handle_halt(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004705{
4706 skip_emulated_instruction(vcpu);
Avi Kivityd3bef152007-06-05 15:53:05 +03004707 return kvm_emulate_halt(vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004708}
4709
Avi Kivity851ba692009-08-24 11:10:17 +03004710static int handle_vmcall(struct kvm_vcpu *vcpu)
Ingo Molnarc21415e2007-02-19 14:37:47 +02004711{
Dor Laor510043d2007-02-19 18:25:43 +02004712 skip_emulated_instruction(vcpu);
Anthony Liguori7aa81cc2007-09-17 14:57:50 -05004713 kvm_emulate_hypercall(vcpu);
4714 return 1;
Ingo Molnarc21415e2007-02-19 14:37:47 +02004715}
4716
Gleb Natapovec25d5e2010-11-01 15:35:01 +02004717static int handle_invd(struct kvm_vcpu *vcpu)
4718{
Andre Przywara51d8b662010-12-21 11:12:02 +01004719 return emulate_instruction(vcpu, 0) == EMULATE_DONE;
Gleb Natapovec25d5e2010-11-01 15:35:01 +02004720}
4721
Avi Kivity851ba692009-08-24 11:10:17 +03004722static int handle_invlpg(struct kvm_vcpu *vcpu)
Marcelo Tosattia7052892008-09-23 13:18:35 -03004723{
Sheng Yangf9c617f2009-03-25 10:08:52 +08004724 unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
Marcelo Tosattia7052892008-09-23 13:18:35 -03004725
4726 kvm_mmu_invlpg(vcpu, exit_qualification);
4727 skip_emulated_instruction(vcpu);
4728 return 1;
4729}
4730
Avi Kivityfee84b02011-11-10 14:57:25 +02004731static int handle_rdpmc(struct kvm_vcpu *vcpu)
4732{
4733 int err;
4734
4735 err = kvm_rdpmc(vcpu);
4736 kvm_complete_insn_gp(vcpu, err);
4737
4738 return 1;
4739}
4740
Avi Kivity851ba692009-08-24 11:10:17 +03004741static int handle_wbinvd(struct kvm_vcpu *vcpu)
Eddie Donge5edaa02007-11-11 12:28:35 +02004742{
4743 skip_emulated_instruction(vcpu);
Sheng Yangf5f48ee2010-06-30 12:25:15 +08004744 kvm_emulate_wbinvd(vcpu);
Eddie Donge5edaa02007-11-11 12:28:35 +02004745 return 1;
4746}
4747
Dexuan Cui2acf9232010-06-10 11:27:12 +08004748static int handle_xsetbv(struct kvm_vcpu *vcpu)
4749{
4750 u64 new_bv = kvm_read_edx_eax(vcpu);
4751 u32 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4752
4753 if (kvm_set_xcr(vcpu, index, new_bv) == 0)
4754 skip_emulated_instruction(vcpu);
4755 return 1;
4756}
4757
Avi Kivity851ba692009-08-24 11:10:17 +03004758static int handle_apic_access(struct kvm_vcpu *vcpu)
Sheng Yangf78e0e22007-10-29 09:40:42 +08004759{
Kevin Tian58fbbf22011-08-30 13:56:17 +03004760 if (likely(fasteoi)) {
4761 unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
4762 int access_type, offset;
4763
4764 access_type = exit_qualification & APIC_ACCESS_TYPE;
4765 offset = exit_qualification & APIC_ACCESS_OFFSET;
4766 /*
4767 * Sane guest uses MOV to write EOI, with written value
4768 * not cared. So make a short-circuit here by avoiding
4769 * heavy instruction emulation.
4770 */
4771 if ((access_type == TYPE_LINEAR_APIC_INST_WRITE) &&
4772 (offset == APIC_EOI)) {
4773 kvm_lapic_set_eoi(vcpu);
4774 skip_emulated_instruction(vcpu);
4775 return 1;
4776 }
4777 }
Andre Przywara51d8b662010-12-21 11:12:02 +01004778 return emulate_instruction(vcpu, 0) == EMULATE_DONE;
Sheng Yangf78e0e22007-10-29 09:40:42 +08004779}
4780
Avi Kivity851ba692009-08-24 11:10:17 +03004781static int handle_task_switch(struct kvm_vcpu *vcpu)
Izik Eidus37817f22008-03-24 23:14:53 +02004782{
Jan Kiszka60637aa2008-09-26 09:30:47 +02004783 struct vcpu_vmx *vmx = to_vmx(vcpu);
Izik Eidus37817f22008-03-24 23:14:53 +02004784 unsigned long exit_qualification;
Jan Kiszkae269fb22010-04-14 15:51:09 +02004785 bool has_error_code = false;
4786 u32 error_code = 0;
Izik Eidus37817f22008-03-24 23:14:53 +02004787 u16 tss_selector;
Kevin Wolf7f3d35f2012-02-08 14:34:38 +01004788 int reason, type, idt_v, idt_index;
Gleb Natapov64a7ec02009-03-30 16:03:29 +03004789
4790 idt_v = (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK);
Kevin Wolf7f3d35f2012-02-08 14:34:38 +01004791 idt_index = (vmx->idt_vectoring_info & VECTORING_INFO_VECTOR_MASK);
Gleb Natapov64a7ec02009-03-30 16:03:29 +03004792 type = (vmx->idt_vectoring_info & VECTORING_INFO_TYPE_MASK);
Izik Eidus37817f22008-03-24 23:14:53 +02004793
4794 exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
4795
4796 reason = (u32)exit_qualification >> 30;
Gleb Natapov64a7ec02009-03-30 16:03:29 +03004797 if (reason == TASK_SWITCH_GATE && idt_v) {
4798 switch (type) {
4799 case INTR_TYPE_NMI_INTR:
4800 vcpu->arch.nmi_injected = false;
Avi Kivity654f06f2011-03-23 15:02:47 +02004801 vmx_set_nmi_mask(vcpu, true);
Gleb Natapov64a7ec02009-03-30 16:03:29 +03004802 break;
4803 case INTR_TYPE_EXT_INTR:
Gleb Natapov66fd3f72009-05-11 13:35:50 +03004804 case INTR_TYPE_SOFT_INTR:
Gleb Natapov64a7ec02009-03-30 16:03:29 +03004805 kvm_clear_interrupt_queue(vcpu);
4806 break;
4807 case INTR_TYPE_HARD_EXCEPTION:
Jan Kiszkae269fb22010-04-14 15:51:09 +02004808 if (vmx->idt_vectoring_info &
4809 VECTORING_INFO_DELIVER_CODE_MASK) {
4810 has_error_code = true;
4811 error_code =
4812 vmcs_read32(IDT_VECTORING_ERROR_CODE);
4813 }
4814 /* fall through */
Gleb Natapov64a7ec02009-03-30 16:03:29 +03004815 case INTR_TYPE_SOFT_EXCEPTION:
4816 kvm_clear_exception_queue(vcpu);
4817 break;
4818 default:
4819 break;
4820 }
Jan Kiszka60637aa2008-09-26 09:30:47 +02004821 }
Izik Eidus37817f22008-03-24 23:14:53 +02004822 tss_selector = exit_qualification;
4823
Gleb Natapov64a7ec02009-03-30 16:03:29 +03004824 if (!idt_v || (type != INTR_TYPE_HARD_EXCEPTION &&
4825 type != INTR_TYPE_EXT_INTR &&
4826 type != INTR_TYPE_NMI_INTR))
4827 skip_emulated_instruction(vcpu);
4828
Kevin Wolf7f3d35f2012-02-08 14:34:38 +01004829 if (kvm_task_switch(vcpu, tss_selector,
4830 type == INTR_TYPE_SOFT_INTR ? idt_index : -1, reason,
4831 has_error_code, error_code) == EMULATE_FAIL) {
Gleb Natapovacb54512010-04-15 21:03:50 +03004832 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4833 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4834 vcpu->run->internal.ndata = 0;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004835 return 0;
Gleb Natapovacb54512010-04-15 21:03:50 +03004836 }
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004837
4838 /* clear all local breakpoint enable flags */
4839 vmcs_writel(GUEST_DR7, vmcs_readl(GUEST_DR7) & ~55);
4840
4841 /*
4842 * TODO: What about debug traps on tss switch?
4843 * Are we supposed to inject them and update dr6?
4844 */
4845
4846 return 1;
Izik Eidus37817f22008-03-24 23:14:53 +02004847}
4848
Avi Kivity851ba692009-08-24 11:10:17 +03004849static int handle_ept_violation(struct kvm_vcpu *vcpu)
Sheng Yang14394422008-04-28 12:24:45 +08004850{
Sheng Yangf9c617f2009-03-25 10:08:52 +08004851 unsigned long exit_qualification;
Sheng Yang14394422008-04-28 12:24:45 +08004852 gpa_t gpa;
Xiao Guangrong4f5982a2012-06-20 15:58:04 +08004853 u32 error_code;
Sheng Yang14394422008-04-28 12:24:45 +08004854 int gla_validity;
Sheng Yang14394422008-04-28 12:24:45 +08004855
Sheng Yangf9c617f2009-03-25 10:08:52 +08004856 exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
Sheng Yang14394422008-04-28 12:24:45 +08004857
4858 if (exit_qualification & (1 << 6)) {
4859 printk(KERN_ERR "EPT: GPA exceeds GAW!\n");
Jan Kiszka7f582ab2009-07-22 23:53:01 +02004860 return -EINVAL;
Sheng Yang14394422008-04-28 12:24:45 +08004861 }
4862
4863 gla_validity = (exit_qualification >> 7) & 0x3;
4864 if (gla_validity != 0x3 && gla_validity != 0x1 && gla_validity != 0) {
4865 printk(KERN_ERR "EPT: Handling EPT violation failed!\n");
4866 printk(KERN_ERR "EPT: GPA: 0x%lx, GVA: 0x%lx\n",
4867 (long unsigned int)vmcs_read64(GUEST_PHYSICAL_ADDRESS),
Sheng Yangf9c617f2009-03-25 10:08:52 +08004868 vmcs_readl(GUEST_LINEAR_ADDRESS));
Sheng Yang14394422008-04-28 12:24:45 +08004869 printk(KERN_ERR "EPT: Exit qualification is 0x%lx\n",
4870 (long unsigned int)exit_qualification);
Avi Kivity851ba692009-08-24 11:10:17 +03004871 vcpu->run->exit_reason = KVM_EXIT_UNKNOWN;
4872 vcpu->run->hw.hardware_exit_reason = EXIT_REASON_EPT_VIOLATION;
Avi Kivity596ae892009-06-03 14:12:10 +03004873 return 0;
Sheng Yang14394422008-04-28 12:24:45 +08004874 }
4875
4876 gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS);
Marcelo Tosatti229456f2009-06-17 09:22:14 -03004877 trace_kvm_page_fault(gpa, exit_qualification);
Xiao Guangrong4f5982a2012-06-20 15:58:04 +08004878
4879 /* It is a write fault? */
4880 error_code = exit_qualification & (1U << 1);
4881 /* ept page table is present? */
4882 error_code |= (exit_qualification >> 3) & 0x1;
4883
4884 return kvm_mmu_page_fault(vcpu, gpa, error_code, NULL, 0);
Sheng Yang14394422008-04-28 12:24:45 +08004885}
4886
Marcelo Tosatti68f89402009-06-11 12:07:43 -03004887static u64 ept_rsvd_mask(u64 spte, int level)
4888{
4889 int i;
4890 u64 mask = 0;
4891
4892 for (i = 51; i > boot_cpu_data.x86_phys_bits; i--)
4893 mask |= (1ULL << i);
4894
4895 if (level > 2)
4896 /* bits 7:3 reserved */
4897 mask |= 0xf8;
4898 else if (level == 2) {
4899 if (spte & (1ULL << 7))
4900 /* 2MB ref, bits 20:12 reserved */
4901 mask |= 0x1ff000;
4902 else
4903 /* bits 6:3 reserved */
4904 mask |= 0x78;
4905 }
4906
4907 return mask;
4908}
4909
4910static void ept_misconfig_inspect_spte(struct kvm_vcpu *vcpu, u64 spte,
4911 int level)
4912{
4913 printk(KERN_ERR "%s: spte 0x%llx level %d\n", __func__, spte, level);
4914
4915 /* 010b (write-only) */
4916 WARN_ON((spte & 0x7) == 0x2);
4917
4918 /* 110b (write/execute) */
4919 WARN_ON((spte & 0x7) == 0x6);
4920
4921 /* 100b (execute-only) and value not supported by logical processor */
4922 if (!cpu_has_vmx_ept_execute_only())
4923 WARN_ON((spte & 0x7) == 0x4);
4924
4925 /* not 000b */
4926 if ((spte & 0x7)) {
4927 u64 rsvd_bits = spte & ept_rsvd_mask(spte, level);
4928
4929 if (rsvd_bits != 0) {
4930 printk(KERN_ERR "%s: rsvd_bits = 0x%llx\n",
4931 __func__, rsvd_bits);
4932 WARN_ON(1);
4933 }
4934
4935 if (level == 1 || (level == 2 && (spte & (1ULL << 7)))) {
4936 u64 ept_mem_type = (spte & 0x38) >> 3;
4937
4938 if (ept_mem_type == 2 || ept_mem_type == 3 ||
4939 ept_mem_type == 7) {
4940 printk(KERN_ERR "%s: ept_mem_type=0x%llx\n",
4941 __func__, ept_mem_type);
4942 WARN_ON(1);
4943 }
4944 }
4945 }
4946}
4947
Avi Kivity851ba692009-08-24 11:10:17 +03004948static int handle_ept_misconfig(struct kvm_vcpu *vcpu)
Marcelo Tosatti68f89402009-06-11 12:07:43 -03004949{
4950 u64 sptes[4];
Xiao Guangrongce88dec2011-07-12 03:33:44 +08004951 int nr_sptes, i, ret;
Marcelo Tosatti68f89402009-06-11 12:07:43 -03004952 gpa_t gpa;
4953
4954 gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS);
4955
Xiao Guangrongce88dec2011-07-12 03:33:44 +08004956 ret = handle_mmio_page_fault_common(vcpu, gpa, true);
4957 if (likely(ret == 1))
4958 return x86_emulate_instruction(vcpu, gpa, 0, NULL, 0) ==
4959 EMULATE_DONE;
4960 if (unlikely(!ret))
4961 return 1;
4962
4963 /* It is the real ept misconfig */
Marcelo Tosatti68f89402009-06-11 12:07:43 -03004964 printk(KERN_ERR "EPT: Misconfiguration.\n");
4965 printk(KERN_ERR "EPT: GPA: 0x%llx\n", gpa);
4966
4967 nr_sptes = kvm_mmu_get_spte_hierarchy(vcpu, gpa, sptes);
4968
4969 for (i = PT64_ROOT_LEVEL; i > PT64_ROOT_LEVEL - nr_sptes; --i)
4970 ept_misconfig_inspect_spte(vcpu, sptes[i-1], i);
4971
Avi Kivity851ba692009-08-24 11:10:17 +03004972 vcpu->run->exit_reason = KVM_EXIT_UNKNOWN;
4973 vcpu->run->hw.hardware_exit_reason = EXIT_REASON_EPT_MISCONFIG;
Marcelo Tosatti68f89402009-06-11 12:07:43 -03004974
4975 return 0;
4976}
4977
Avi Kivity851ba692009-08-24 11:10:17 +03004978static int handle_nmi_window(struct kvm_vcpu *vcpu)
Sheng Yangf08864b2008-05-15 18:23:25 +08004979{
4980 u32 cpu_based_vm_exec_control;
4981
4982 /* clear pending NMI */
4983 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
4984 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_NMI_PENDING;
4985 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
4986 ++vcpu->stat.nmi_window_exits;
Avi Kivity3842d132010-07-27 12:30:24 +03004987 kvm_make_request(KVM_REQ_EVENT, vcpu);
Sheng Yangf08864b2008-05-15 18:23:25 +08004988
4989 return 1;
4990}
4991
Mohammed Gamal80ced182009-09-01 12:48:18 +02004992static int handle_invalid_guest_state(struct kvm_vcpu *vcpu)
Mohammed Gamalea953ef2008-08-17 16:47:05 +03004993{
Avi Kivity8b3079a2009-01-05 12:10:54 +02004994 struct vcpu_vmx *vmx = to_vmx(vcpu);
4995 enum emulation_result err = EMULATE_DONE;
Mohammed Gamal80ced182009-09-01 12:48:18 +02004996 int ret = 1;
Avi Kivity49e9d552010-09-19 14:34:08 +02004997 u32 cpu_exec_ctrl;
4998 bool intr_window_requested;
Avi Kivityb8405c12012-06-07 17:08:48 +03004999 unsigned count = 130;
Avi Kivity49e9d552010-09-19 14:34:08 +02005000
5001 cpu_exec_ctrl = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
5002 intr_window_requested = cpu_exec_ctrl & CPU_BASED_VIRTUAL_INTR_PENDING;
Mohammed Gamalea953ef2008-08-17 16:47:05 +03005003
Avi Kivityb8405c12012-06-07 17:08:48 +03005004 while (!guest_state_valid(vcpu) && count-- != 0) {
Avi Kivitybdea48e2012-06-10 18:07:57 +03005005 if (intr_window_requested && vmx_interrupt_allowed(vcpu))
Avi Kivity49e9d552010-09-19 14:34:08 +02005006 return handle_interrupt_window(&vmx->vcpu);
5007
Avi Kivityde87dcdd2012-06-12 20:21:38 +03005008 if (test_bit(KVM_REQ_EVENT, &vcpu->requests))
5009 return 1;
5010
Andre Przywara51d8b662010-12-21 11:12:02 +01005011 err = emulate_instruction(vcpu, 0);
Mohammed Gamalea953ef2008-08-17 16:47:05 +03005012
Mohammed Gamal80ced182009-09-01 12:48:18 +02005013 if (err == EMULATE_DO_MMIO) {
5014 ret = 0;
5015 goto out;
5016 }
Guillaume Thouvenin1d5a4d92008-10-29 09:39:42 +01005017
Avi Kivityde5f70e2012-06-12 20:22:28 +03005018 if (err != EMULATE_DONE) {
5019 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5020 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5021 vcpu->run->internal.ndata = 0;
Gleb Natapov6d77dbf2010-05-10 11:16:56 +03005022 return 0;
Avi Kivityde5f70e2012-06-12 20:22:28 +03005023 }
Mohammed Gamalea953ef2008-08-17 16:47:05 +03005024
5025 if (signal_pending(current))
Mohammed Gamal80ced182009-09-01 12:48:18 +02005026 goto out;
Mohammed Gamalea953ef2008-08-17 16:47:05 +03005027 if (need_resched())
5028 schedule();
5029 }
5030
Avi Kivity7c068e42012-06-10 18:09:27 +03005031 vmx->emulation_required = !guest_state_valid(vcpu);
Mohammed Gamal80ced182009-09-01 12:48:18 +02005032out:
5033 return ret;
Mohammed Gamalea953ef2008-08-17 16:47:05 +03005034}
5035
Avi Kivity6aa8b732006-12-10 02:21:36 -08005036/*
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08005037 * Indicate a busy-waiting vcpu in spinlock. We do not enable the PAUSE
5038 * exiting, so only get here on cpu with PAUSE-Loop-Exiting.
5039 */
Marcelo Tosatti9fb41ba2009-10-12 19:37:31 -03005040static int handle_pause(struct kvm_vcpu *vcpu)
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08005041{
5042 skip_emulated_instruction(vcpu);
5043 kvm_vcpu_on_spin(vcpu);
5044
5045 return 1;
5046}
5047
Sheng Yang59708672009-12-15 13:29:54 +08005048static int handle_invalid_op(struct kvm_vcpu *vcpu)
5049{
5050 kvm_queue_exception(vcpu, UD_VECTOR);
5051 return 1;
5052}
5053
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08005054/*
Nadav Har'Elff2f6fe2011-05-25 23:05:27 +03005055 * To run an L2 guest, we need a vmcs02 based on the L1-specified vmcs12.
5056 * We could reuse a single VMCS for all the L2 guests, but we also want the
5057 * option to allocate a separate vmcs02 for each separate loaded vmcs12 - this
5058 * allows keeping them loaded on the processor, and in the future will allow
5059 * optimizations where prepare_vmcs02 doesn't need to set all the fields on
5060 * every entry if they never change.
5061 * So we keep, in vmx->nested.vmcs02_pool, a cache of size VMCS02_POOL_SIZE
5062 * (>=0) with a vmcs02 for each recently loaded vmcs12s, most recent first.
5063 *
5064 * The following functions allocate and free a vmcs02 in this pool.
5065 */
5066
5067/* Get a VMCS from the pool to use as vmcs02 for the current vmcs12. */
5068static struct loaded_vmcs *nested_get_current_vmcs02(struct vcpu_vmx *vmx)
5069{
5070 struct vmcs02_list *item;
5071 list_for_each_entry(item, &vmx->nested.vmcs02_pool, list)
5072 if (item->vmptr == vmx->nested.current_vmptr) {
5073 list_move(&item->list, &vmx->nested.vmcs02_pool);
5074 return &item->vmcs02;
5075 }
5076
5077 if (vmx->nested.vmcs02_num >= max(VMCS02_POOL_SIZE, 1)) {
5078 /* Recycle the least recently used VMCS. */
5079 item = list_entry(vmx->nested.vmcs02_pool.prev,
5080 struct vmcs02_list, list);
5081 item->vmptr = vmx->nested.current_vmptr;
5082 list_move(&item->list, &vmx->nested.vmcs02_pool);
5083 return &item->vmcs02;
5084 }
5085
5086 /* Create a new VMCS */
5087 item = (struct vmcs02_list *)
5088 kmalloc(sizeof(struct vmcs02_list), GFP_KERNEL);
5089 if (!item)
5090 return NULL;
5091 item->vmcs02.vmcs = alloc_vmcs();
5092 if (!item->vmcs02.vmcs) {
5093 kfree(item);
5094 return NULL;
5095 }
5096 loaded_vmcs_init(&item->vmcs02);
5097 item->vmptr = vmx->nested.current_vmptr;
5098 list_add(&(item->list), &(vmx->nested.vmcs02_pool));
5099 vmx->nested.vmcs02_num++;
5100 return &item->vmcs02;
5101}
5102
5103/* Free and remove from pool a vmcs02 saved for a vmcs12 (if there is one) */
5104static void nested_free_vmcs02(struct vcpu_vmx *vmx, gpa_t vmptr)
5105{
5106 struct vmcs02_list *item;
5107 list_for_each_entry(item, &vmx->nested.vmcs02_pool, list)
5108 if (item->vmptr == vmptr) {
5109 free_loaded_vmcs(&item->vmcs02);
5110 list_del(&item->list);
5111 kfree(item);
5112 vmx->nested.vmcs02_num--;
5113 return;
5114 }
5115}
5116
5117/*
5118 * Free all VMCSs saved for this vcpu, except the one pointed by
5119 * vmx->loaded_vmcs. These include the VMCSs in vmcs02_pool (except the one
5120 * currently used, if running L2), and vmcs01 when running L2.
5121 */
5122static void nested_free_all_saved_vmcss(struct vcpu_vmx *vmx)
5123{
5124 struct vmcs02_list *item, *n;
5125 list_for_each_entry_safe(item, n, &vmx->nested.vmcs02_pool, list) {
5126 if (vmx->loaded_vmcs != &item->vmcs02)
5127 free_loaded_vmcs(&item->vmcs02);
5128 list_del(&item->list);
5129 kfree(item);
5130 }
5131 vmx->nested.vmcs02_num = 0;
5132
5133 if (vmx->loaded_vmcs != &vmx->vmcs01)
5134 free_loaded_vmcs(&vmx->vmcs01);
5135}
5136
5137/*
Nadav Har'Elec378ae2011-05-25 23:02:54 +03005138 * Emulate the VMXON instruction.
5139 * Currently, we just remember that VMX is active, and do not save or even
5140 * inspect the argument to VMXON (the so-called "VMXON pointer") because we
5141 * do not currently need to store anything in that guest-allocated memory
5142 * region. Consequently, VMCLEAR and VMPTRLD also do not verify that the their
5143 * argument is different from the VMXON pointer (which the spec says they do).
5144 */
5145static int handle_vmon(struct kvm_vcpu *vcpu)
5146{
5147 struct kvm_segment cs;
5148 struct vcpu_vmx *vmx = to_vmx(vcpu);
5149
5150 /* The Intel VMX Instruction Reference lists a bunch of bits that
5151 * are prerequisite to running VMXON, most notably cr4.VMXE must be
5152 * set to 1 (see vmx_set_cr4() for when we allow the guest to set this).
5153 * Otherwise, we should fail with #UD. We test these now:
5154 */
5155 if (!kvm_read_cr4_bits(vcpu, X86_CR4_VMXE) ||
5156 !kvm_read_cr0_bits(vcpu, X86_CR0_PE) ||
5157 (vmx_get_rflags(vcpu) & X86_EFLAGS_VM)) {
5158 kvm_queue_exception(vcpu, UD_VECTOR);
5159 return 1;
5160 }
5161
5162 vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
5163 if (is_long_mode(vcpu) && !cs.l) {
5164 kvm_queue_exception(vcpu, UD_VECTOR);
5165 return 1;
5166 }
5167
5168 if (vmx_get_cpl(vcpu)) {
5169 kvm_inject_gp(vcpu, 0);
5170 return 1;
5171 }
5172
Nadav Har'Elff2f6fe2011-05-25 23:05:27 +03005173 INIT_LIST_HEAD(&(vmx->nested.vmcs02_pool));
5174 vmx->nested.vmcs02_num = 0;
5175
Nadav Har'Elec378ae2011-05-25 23:02:54 +03005176 vmx->nested.vmxon = true;
5177
5178 skip_emulated_instruction(vcpu);
5179 return 1;
5180}
5181
5182/*
5183 * Intel's VMX Instruction Reference specifies a common set of prerequisites
5184 * for running VMX instructions (except VMXON, whose prerequisites are
5185 * slightly different). It also specifies what exception to inject otherwise.
5186 */
5187static int nested_vmx_check_permission(struct kvm_vcpu *vcpu)
5188{
5189 struct kvm_segment cs;
5190 struct vcpu_vmx *vmx = to_vmx(vcpu);
5191
5192 if (!vmx->nested.vmxon) {
5193 kvm_queue_exception(vcpu, UD_VECTOR);
5194 return 0;
5195 }
5196
5197 vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
5198 if ((vmx_get_rflags(vcpu) & X86_EFLAGS_VM) ||
5199 (is_long_mode(vcpu) && !cs.l)) {
5200 kvm_queue_exception(vcpu, UD_VECTOR);
5201 return 0;
5202 }
5203
5204 if (vmx_get_cpl(vcpu)) {
5205 kvm_inject_gp(vcpu, 0);
5206 return 0;
5207 }
5208
5209 return 1;
5210}
5211
5212/*
5213 * Free whatever needs to be freed from vmx->nested when L1 goes down, or
5214 * just stops using VMX.
5215 */
5216static void free_nested(struct vcpu_vmx *vmx)
5217{
5218 if (!vmx->nested.vmxon)
5219 return;
5220 vmx->nested.vmxon = false;
Nadav Har'Ela9d30f32011-05-25 23:03:55 +03005221 if (vmx->nested.current_vmptr != -1ull) {
5222 kunmap(vmx->nested.current_vmcs12_page);
5223 nested_release_page(vmx->nested.current_vmcs12_page);
5224 vmx->nested.current_vmptr = -1ull;
5225 vmx->nested.current_vmcs12 = NULL;
5226 }
Nadav Har'Elfe3ef052011-05-25 23:10:02 +03005227 /* Unpin physical memory we referred to in current vmcs02 */
5228 if (vmx->nested.apic_access_page) {
5229 nested_release_page(vmx->nested.apic_access_page);
5230 vmx->nested.apic_access_page = 0;
5231 }
Nadav Har'Elff2f6fe2011-05-25 23:05:27 +03005232
5233 nested_free_all_saved_vmcss(vmx);
Nadav Har'Elec378ae2011-05-25 23:02:54 +03005234}
5235
5236/* Emulate the VMXOFF instruction */
5237static int handle_vmoff(struct kvm_vcpu *vcpu)
5238{
5239 if (!nested_vmx_check_permission(vcpu))
5240 return 1;
5241 free_nested(to_vmx(vcpu));
5242 skip_emulated_instruction(vcpu);
5243 return 1;
5244}
5245
5246/*
Nadav Har'El064aea72011-05-25 23:04:56 +03005247 * Decode the memory-address operand of a vmx instruction, as recorded on an
5248 * exit caused by such an instruction (run by a guest hypervisor).
5249 * On success, returns 0. When the operand is invalid, returns 1 and throws
5250 * #UD or #GP.
5251 */
5252static int get_vmx_mem_address(struct kvm_vcpu *vcpu,
5253 unsigned long exit_qualification,
5254 u32 vmx_instruction_info, gva_t *ret)
5255{
5256 /*
5257 * According to Vol. 3B, "Information for VM Exits Due to Instruction
5258 * Execution", on an exit, vmx_instruction_info holds most of the
5259 * addressing components of the operand. Only the displacement part
5260 * is put in exit_qualification (see 3B, "Basic VM-Exit Information").
5261 * For how an actual address is calculated from all these components,
5262 * refer to Vol. 1, "Operand Addressing".
5263 */
5264 int scaling = vmx_instruction_info & 3;
5265 int addr_size = (vmx_instruction_info >> 7) & 7;
5266 bool is_reg = vmx_instruction_info & (1u << 10);
5267 int seg_reg = (vmx_instruction_info >> 15) & 7;
5268 int index_reg = (vmx_instruction_info >> 18) & 0xf;
5269 bool index_is_valid = !(vmx_instruction_info & (1u << 22));
5270 int base_reg = (vmx_instruction_info >> 23) & 0xf;
5271 bool base_is_valid = !(vmx_instruction_info & (1u << 27));
5272
5273 if (is_reg) {
5274 kvm_queue_exception(vcpu, UD_VECTOR);
5275 return 1;
5276 }
5277
5278 /* Addr = segment_base + offset */
5279 /* offset = base + [index * scale] + displacement */
5280 *ret = vmx_get_segment_base(vcpu, seg_reg);
5281 if (base_is_valid)
5282 *ret += kvm_register_read(vcpu, base_reg);
5283 if (index_is_valid)
5284 *ret += kvm_register_read(vcpu, index_reg)<<scaling;
5285 *ret += exit_qualification; /* holds the displacement */
5286
5287 if (addr_size == 1) /* 32 bit */
5288 *ret &= 0xffffffff;
5289
5290 /*
5291 * TODO: throw #GP (and return 1) in various cases that the VM*
5292 * instructions require it - e.g., offset beyond segment limit,
5293 * unusable or unreadable/unwritable segment, non-canonical 64-bit
5294 * address, and so on. Currently these are not checked.
5295 */
5296 return 0;
5297}
5298
5299/*
Nadav Har'El0140cae2011-05-25 23:06:28 +03005300 * The following 3 functions, nested_vmx_succeed()/failValid()/failInvalid(),
5301 * set the success or error code of an emulated VMX instruction, as specified
5302 * by Vol 2B, VMX Instruction Reference, "Conventions".
5303 */
5304static void nested_vmx_succeed(struct kvm_vcpu *vcpu)
5305{
5306 vmx_set_rflags(vcpu, vmx_get_rflags(vcpu)
5307 & ~(X86_EFLAGS_CF | X86_EFLAGS_PF | X86_EFLAGS_AF |
5308 X86_EFLAGS_ZF | X86_EFLAGS_SF | X86_EFLAGS_OF));
5309}
5310
5311static void nested_vmx_failInvalid(struct kvm_vcpu *vcpu)
5312{
5313 vmx_set_rflags(vcpu, (vmx_get_rflags(vcpu)
5314 & ~(X86_EFLAGS_PF | X86_EFLAGS_AF | X86_EFLAGS_ZF |
5315 X86_EFLAGS_SF | X86_EFLAGS_OF))
5316 | X86_EFLAGS_CF);
5317}
5318
5319static void nested_vmx_failValid(struct kvm_vcpu *vcpu,
5320 u32 vm_instruction_error)
5321{
5322 if (to_vmx(vcpu)->nested.current_vmptr == -1ull) {
5323 /*
5324 * failValid writes the error number to the current VMCS, which
5325 * can't be done there isn't a current VMCS.
5326 */
5327 nested_vmx_failInvalid(vcpu);
5328 return;
5329 }
5330 vmx_set_rflags(vcpu, (vmx_get_rflags(vcpu)
5331 & ~(X86_EFLAGS_CF | X86_EFLAGS_PF | X86_EFLAGS_AF |
5332 X86_EFLAGS_SF | X86_EFLAGS_OF))
5333 | X86_EFLAGS_ZF);
5334 get_vmcs12(vcpu)->vm_instruction_error = vm_instruction_error;
5335}
5336
Nadav Har'El27d6c862011-05-25 23:06:59 +03005337/* Emulate the VMCLEAR instruction */
5338static int handle_vmclear(struct kvm_vcpu *vcpu)
5339{
5340 struct vcpu_vmx *vmx = to_vmx(vcpu);
5341 gva_t gva;
5342 gpa_t vmptr;
5343 struct vmcs12 *vmcs12;
5344 struct page *page;
5345 struct x86_exception e;
5346
5347 if (!nested_vmx_check_permission(vcpu))
5348 return 1;
5349
5350 if (get_vmx_mem_address(vcpu, vmcs_readl(EXIT_QUALIFICATION),
5351 vmcs_read32(VMX_INSTRUCTION_INFO), &gva))
5352 return 1;
5353
5354 if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &vmptr,
5355 sizeof(vmptr), &e)) {
5356 kvm_inject_page_fault(vcpu, &e);
5357 return 1;
5358 }
5359
5360 if (!IS_ALIGNED(vmptr, PAGE_SIZE)) {
5361 nested_vmx_failValid(vcpu, VMXERR_VMCLEAR_INVALID_ADDRESS);
5362 skip_emulated_instruction(vcpu);
5363 return 1;
5364 }
5365
5366 if (vmptr == vmx->nested.current_vmptr) {
5367 kunmap(vmx->nested.current_vmcs12_page);
5368 nested_release_page(vmx->nested.current_vmcs12_page);
5369 vmx->nested.current_vmptr = -1ull;
5370 vmx->nested.current_vmcs12 = NULL;
5371 }
5372
5373 page = nested_get_page(vcpu, vmptr);
5374 if (page == NULL) {
5375 /*
5376 * For accurate processor emulation, VMCLEAR beyond available
5377 * physical memory should do nothing at all. However, it is
5378 * possible that a nested vmx bug, not a guest hypervisor bug,
5379 * resulted in this case, so let's shut down before doing any
5380 * more damage:
5381 */
5382 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
5383 return 1;
5384 }
5385 vmcs12 = kmap(page);
5386 vmcs12->launch_state = 0;
5387 kunmap(page);
5388 nested_release_page(page);
5389
5390 nested_free_vmcs02(vmx, vmptr);
5391
5392 skip_emulated_instruction(vcpu);
5393 nested_vmx_succeed(vcpu);
5394 return 1;
5395}
5396
Nadav Har'Elcd232ad2011-05-25 23:10:33 +03005397static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch);
5398
5399/* Emulate the VMLAUNCH instruction */
5400static int handle_vmlaunch(struct kvm_vcpu *vcpu)
5401{
5402 return nested_vmx_run(vcpu, true);
5403}
5404
5405/* Emulate the VMRESUME instruction */
5406static int handle_vmresume(struct kvm_vcpu *vcpu)
5407{
5408
5409 return nested_vmx_run(vcpu, false);
5410}
5411
Nadav Har'El49f705c2011-05-25 23:08:30 +03005412enum vmcs_field_type {
5413 VMCS_FIELD_TYPE_U16 = 0,
5414 VMCS_FIELD_TYPE_U64 = 1,
5415 VMCS_FIELD_TYPE_U32 = 2,
5416 VMCS_FIELD_TYPE_NATURAL_WIDTH = 3
5417};
5418
5419static inline int vmcs_field_type(unsigned long field)
5420{
5421 if (0x1 & field) /* the *_HIGH fields are all 32 bit */
5422 return VMCS_FIELD_TYPE_U32;
5423 return (field >> 13) & 0x3 ;
5424}
5425
5426static inline int vmcs_field_readonly(unsigned long field)
5427{
5428 return (((field >> 10) & 0x3) == 1);
5429}
5430
5431/*
5432 * Read a vmcs12 field. Since these can have varying lengths and we return
5433 * one type, we chose the biggest type (u64) and zero-extend the return value
5434 * to that size. Note that the caller, handle_vmread, might need to use only
5435 * some of the bits we return here (e.g., on 32-bit guests, only 32 bits of
5436 * 64-bit fields are to be returned).
5437 */
5438static inline bool vmcs12_read_any(struct kvm_vcpu *vcpu,
5439 unsigned long field, u64 *ret)
5440{
5441 short offset = vmcs_field_to_offset(field);
5442 char *p;
5443
5444 if (offset < 0)
5445 return 0;
5446
5447 p = ((char *)(get_vmcs12(vcpu))) + offset;
5448
5449 switch (vmcs_field_type(field)) {
5450 case VMCS_FIELD_TYPE_NATURAL_WIDTH:
5451 *ret = *((natural_width *)p);
5452 return 1;
5453 case VMCS_FIELD_TYPE_U16:
5454 *ret = *((u16 *)p);
5455 return 1;
5456 case VMCS_FIELD_TYPE_U32:
5457 *ret = *((u32 *)p);
5458 return 1;
5459 case VMCS_FIELD_TYPE_U64:
5460 *ret = *((u64 *)p);
5461 return 1;
5462 default:
5463 return 0; /* can never happen. */
5464 }
5465}
5466
5467/*
5468 * VMX instructions which assume a current vmcs12 (i.e., that VMPTRLD was
5469 * used before) all generate the same failure when it is missing.
5470 */
5471static int nested_vmx_check_vmcs12(struct kvm_vcpu *vcpu)
5472{
5473 struct vcpu_vmx *vmx = to_vmx(vcpu);
5474 if (vmx->nested.current_vmptr == -1ull) {
5475 nested_vmx_failInvalid(vcpu);
5476 skip_emulated_instruction(vcpu);
5477 return 0;
5478 }
5479 return 1;
5480}
5481
5482static int handle_vmread(struct kvm_vcpu *vcpu)
5483{
5484 unsigned long field;
5485 u64 field_value;
5486 unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
5487 u32 vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
5488 gva_t gva = 0;
5489
5490 if (!nested_vmx_check_permission(vcpu) ||
5491 !nested_vmx_check_vmcs12(vcpu))
5492 return 1;
5493
5494 /* Decode instruction info and find the field to read */
5495 field = kvm_register_read(vcpu, (((vmx_instruction_info) >> 28) & 0xf));
5496 /* Read the field, zero-extended to a u64 field_value */
5497 if (!vmcs12_read_any(vcpu, field, &field_value)) {
5498 nested_vmx_failValid(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
5499 skip_emulated_instruction(vcpu);
5500 return 1;
5501 }
5502 /*
5503 * Now copy part of this value to register or memory, as requested.
5504 * Note that the number of bits actually copied is 32 or 64 depending
5505 * on the guest's mode (32 or 64 bit), not on the given field's length.
5506 */
5507 if (vmx_instruction_info & (1u << 10)) {
5508 kvm_register_write(vcpu, (((vmx_instruction_info) >> 3) & 0xf),
5509 field_value);
5510 } else {
5511 if (get_vmx_mem_address(vcpu, exit_qualification,
5512 vmx_instruction_info, &gva))
5513 return 1;
5514 /* _system ok, as nested_vmx_check_permission verified cpl=0 */
5515 kvm_write_guest_virt_system(&vcpu->arch.emulate_ctxt, gva,
5516 &field_value, (is_long_mode(vcpu) ? 8 : 4), NULL);
5517 }
5518
5519 nested_vmx_succeed(vcpu);
5520 skip_emulated_instruction(vcpu);
5521 return 1;
5522}
5523
5524
5525static int handle_vmwrite(struct kvm_vcpu *vcpu)
5526{
5527 unsigned long field;
5528 gva_t gva;
5529 unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
5530 u32 vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
5531 char *p;
5532 short offset;
5533 /* The value to write might be 32 or 64 bits, depending on L1's long
5534 * mode, and eventually we need to write that into a field of several
5535 * possible lengths. The code below first zero-extends the value to 64
5536 * bit (field_value), and then copies only the approriate number of
5537 * bits into the vmcs12 field.
5538 */
5539 u64 field_value = 0;
5540 struct x86_exception e;
5541
5542 if (!nested_vmx_check_permission(vcpu) ||
5543 !nested_vmx_check_vmcs12(vcpu))
5544 return 1;
5545
5546 if (vmx_instruction_info & (1u << 10))
5547 field_value = kvm_register_read(vcpu,
5548 (((vmx_instruction_info) >> 3) & 0xf));
5549 else {
5550 if (get_vmx_mem_address(vcpu, exit_qualification,
5551 vmx_instruction_info, &gva))
5552 return 1;
5553 if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva,
5554 &field_value, (is_long_mode(vcpu) ? 8 : 4), &e)) {
5555 kvm_inject_page_fault(vcpu, &e);
5556 return 1;
5557 }
5558 }
5559
5560
5561 field = kvm_register_read(vcpu, (((vmx_instruction_info) >> 28) & 0xf));
5562 if (vmcs_field_readonly(field)) {
5563 nested_vmx_failValid(vcpu,
5564 VMXERR_VMWRITE_READ_ONLY_VMCS_COMPONENT);
5565 skip_emulated_instruction(vcpu);
5566 return 1;
5567 }
5568
5569 offset = vmcs_field_to_offset(field);
5570 if (offset < 0) {
5571 nested_vmx_failValid(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
5572 skip_emulated_instruction(vcpu);
5573 return 1;
5574 }
5575 p = ((char *) get_vmcs12(vcpu)) + offset;
5576
5577 switch (vmcs_field_type(field)) {
5578 case VMCS_FIELD_TYPE_U16:
5579 *(u16 *)p = field_value;
5580 break;
5581 case VMCS_FIELD_TYPE_U32:
5582 *(u32 *)p = field_value;
5583 break;
5584 case VMCS_FIELD_TYPE_U64:
5585 *(u64 *)p = field_value;
5586 break;
5587 case VMCS_FIELD_TYPE_NATURAL_WIDTH:
5588 *(natural_width *)p = field_value;
5589 break;
5590 default:
5591 nested_vmx_failValid(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
5592 skip_emulated_instruction(vcpu);
5593 return 1;
5594 }
5595
5596 nested_vmx_succeed(vcpu);
5597 skip_emulated_instruction(vcpu);
5598 return 1;
5599}
5600
Nadav Har'El63846662011-05-25 23:07:29 +03005601/* Emulate the VMPTRLD instruction */
5602static int handle_vmptrld(struct kvm_vcpu *vcpu)
5603{
5604 struct vcpu_vmx *vmx = to_vmx(vcpu);
5605 gva_t gva;
5606 gpa_t vmptr;
5607 struct x86_exception e;
5608
5609 if (!nested_vmx_check_permission(vcpu))
5610 return 1;
5611
5612 if (get_vmx_mem_address(vcpu, vmcs_readl(EXIT_QUALIFICATION),
5613 vmcs_read32(VMX_INSTRUCTION_INFO), &gva))
5614 return 1;
5615
5616 if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &vmptr,
5617 sizeof(vmptr), &e)) {
5618 kvm_inject_page_fault(vcpu, &e);
5619 return 1;
5620 }
5621
5622 if (!IS_ALIGNED(vmptr, PAGE_SIZE)) {
5623 nested_vmx_failValid(vcpu, VMXERR_VMPTRLD_INVALID_ADDRESS);
5624 skip_emulated_instruction(vcpu);
5625 return 1;
5626 }
5627
5628 if (vmx->nested.current_vmptr != vmptr) {
5629 struct vmcs12 *new_vmcs12;
5630 struct page *page;
5631 page = nested_get_page(vcpu, vmptr);
5632 if (page == NULL) {
5633 nested_vmx_failInvalid(vcpu);
5634 skip_emulated_instruction(vcpu);
5635 return 1;
5636 }
5637 new_vmcs12 = kmap(page);
5638 if (new_vmcs12->revision_id != VMCS12_REVISION) {
5639 kunmap(page);
5640 nested_release_page_clean(page);
5641 nested_vmx_failValid(vcpu,
5642 VMXERR_VMPTRLD_INCORRECT_VMCS_REVISION_ID);
5643 skip_emulated_instruction(vcpu);
5644 return 1;
5645 }
5646 if (vmx->nested.current_vmptr != -1ull) {
5647 kunmap(vmx->nested.current_vmcs12_page);
5648 nested_release_page(vmx->nested.current_vmcs12_page);
5649 }
5650
5651 vmx->nested.current_vmptr = vmptr;
5652 vmx->nested.current_vmcs12 = new_vmcs12;
5653 vmx->nested.current_vmcs12_page = page;
5654 }
5655
5656 nested_vmx_succeed(vcpu);
5657 skip_emulated_instruction(vcpu);
5658 return 1;
5659}
5660
Nadav Har'El6a4d7552011-05-25 23:08:00 +03005661/* Emulate the VMPTRST instruction */
5662static int handle_vmptrst(struct kvm_vcpu *vcpu)
5663{
5664 unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
5665 u32 vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
5666 gva_t vmcs_gva;
5667 struct x86_exception e;
5668
5669 if (!nested_vmx_check_permission(vcpu))
5670 return 1;
5671
5672 if (get_vmx_mem_address(vcpu, exit_qualification,
5673 vmx_instruction_info, &vmcs_gva))
5674 return 1;
5675 /* ok to use *_system, as nested_vmx_check_permission verified cpl=0 */
5676 if (kvm_write_guest_virt_system(&vcpu->arch.emulate_ctxt, vmcs_gva,
5677 (void *)&to_vmx(vcpu)->nested.current_vmptr,
5678 sizeof(u64), &e)) {
5679 kvm_inject_page_fault(vcpu, &e);
5680 return 1;
5681 }
5682 nested_vmx_succeed(vcpu);
5683 skip_emulated_instruction(vcpu);
5684 return 1;
5685}
5686
Nadav Har'El0140cae2011-05-25 23:06:28 +03005687/*
Avi Kivity6aa8b732006-12-10 02:21:36 -08005688 * The exit handlers return 1 if the exit was handled fully and guest execution
5689 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
5690 * to be done to userspace and return 0.
5691 */
Avi Kivity851ba692009-08-24 11:10:17 +03005692static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu) = {
Avi Kivity6aa8b732006-12-10 02:21:36 -08005693 [EXIT_REASON_EXCEPTION_NMI] = handle_exception,
5694 [EXIT_REASON_EXTERNAL_INTERRUPT] = handle_external_interrupt,
Avi Kivity988ad742007-02-12 00:54:36 -08005695 [EXIT_REASON_TRIPLE_FAULT] = handle_triple_fault,
Sheng Yangf08864b2008-05-15 18:23:25 +08005696 [EXIT_REASON_NMI_WINDOW] = handle_nmi_window,
Avi Kivity6aa8b732006-12-10 02:21:36 -08005697 [EXIT_REASON_IO_INSTRUCTION] = handle_io,
Avi Kivity6aa8b732006-12-10 02:21:36 -08005698 [EXIT_REASON_CR_ACCESS] = handle_cr,
5699 [EXIT_REASON_DR_ACCESS] = handle_dr,
5700 [EXIT_REASON_CPUID] = handle_cpuid,
5701 [EXIT_REASON_MSR_READ] = handle_rdmsr,
5702 [EXIT_REASON_MSR_WRITE] = handle_wrmsr,
5703 [EXIT_REASON_PENDING_INTERRUPT] = handle_interrupt_window,
5704 [EXIT_REASON_HLT] = handle_halt,
Gleb Natapovec25d5e2010-11-01 15:35:01 +02005705 [EXIT_REASON_INVD] = handle_invd,
Marcelo Tosattia7052892008-09-23 13:18:35 -03005706 [EXIT_REASON_INVLPG] = handle_invlpg,
Avi Kivityfee84b02011-11-10 14:57:25 +02005707 [EXIT_REASON_RDPMC] = handle_rdpmc,
Ingo Molnarc21415e2007-02-19 14:37:47 +02005708 [EXIT_REASON_VMCALL] = handle_vmcall,
Nadav Har'El27d6c862011-05-25 23:06:59 +03005709 [EXIT_REASON_VMCLEAR] = handle_vmclear,
Nadav Har'Elcd232ad2011-05-25 23:10:33 +03005710 [EXIT_REASON_VMLAUNCH] = handle_vmlaunch,
Nadav Har'El63846662011-05-25 23:07:29 +03005711 [EXIT_REASON_VMPTRLD] = handle_vmptrld,
Nadav Har'El6a4d7552011-05-25 23:08:00 +03005712 [EXIT_REASON_VMPTRST] = handle_vmptrst,
Nadav Har'El49f705c2011-05-25 23:08:30 +03005713 [EXIT_REASON_VMREAD] = handle_vmread,
Nadav Har'Elcd232ad2011-05-25 23:10:33 +03005714 [EXIT_REASON_VMRESUME] = handle_vmresume,
Nadav Har'El49f705c2011-05-25 23:08:30 +03005715 [EXIT_REASON_VMWRITE] = handle_vmwrite,
Nadav Har'Elec378ae2011-05-25 23:02:54 +03005716 [EXIT_REASON_VMOFF] = handle_vmoff,
5717 [EXIT_REASON_VMON] = handle_vmon,
Sheng Yangf78e0e22007-10-29 09:40:42 +08005718 [EXIT_REASON_TPR_BELOW_THRESHOLD] = handle_tpr_below_threshold,
5719 [EXIT_REASON_APIC_ACCESS] = handle_apic_access,
Eddie Donge5edaa02007-11-11 12:28:35 +02005720 [EXIT_REASON_WBINVD] = handle_wbinvd,
Dexuan Cui2acf9232010-06-10 11:27:12 +08005721 [EXIT_REASON_XSETBV] = handle_xsetbv,
Izik Eidus37817f22008-03-24 23:14:53 +02005722 [EXIT_REASON_TASK_SWITCH] = handle_task_switch,
Andi Kleena0861c02009-06-08 17:37:09 +08005723 [EXIT_REASON_MCE_DURING_VMENTRY] = handle_machine_check,
Marcelo Tosatti68f89402009-06-11 12:07:43 -03005724 [EXIT_REASON_EPT_VIOLATION] = handle_ept_violation,
5725 [EXIT_REASON_EPT_MISCONFIG] = handle_ept_misconfig,
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08005726 [EXIT_REASON_PAUSE_INSTRUCTION] = handle_pause,
Sheng Yang59708672009-12-15 13:29:54 +08005727 [EXIT_REASON_MWAIT_INSTRUCTION] = handle_invalid_op,
5728 [EXIT_REASON_MONITOR_INSTRUCTION] = handle_invalid_op,
Avi Kivity6aa8b732006-12-10 02:21:36 -08005729};
5730
5731static const int kvm_vmx_max_exit_handlers =
Robert P. J. Day50a34852007-06-03 13:35:29 -04005732 ARRAY_SIZE(kvm_vmx_exit_handlers);
Avi Kivity6aa8b732006-12-10 02:21:36 -08005733
Nadav Har'El644d7112011-05-25 23:12:35 +03005734/*
5735 * Return 1 if we should exit from L2 to L1 to handle an MSR access access,
5736 * rather than handle it ourselves in L0. I.e., check whether L1 expressed
5737 * disinterest in the current event (read or write a specific MSR) by using an
5738 * MSR bitmap. This may be the case even when L0 doesn't use MSR bitmaps.
5739 */
5740static bool nested_vmx_exit_handled_msr(struct kvm_vcpu *vcpu,
5741 struct vmcs12 *vmcs12, u32 exit_reason)
5742{
5743 u32 msr_index = vcpu->arch.regs[VCPU_REGS_RCX];
5744 gpa_t bitmap;
5745
5746 if (!nested_cpu_has(get_vmcs12(vcpu), CPU_BASED_USE_MSR_BITMAPS))
5747 return 1;
5748
5749 /*
5750 * The MSR_BITMAP page is divided into four 1024-byte bitmaps,
5751 * for the four combinations of read/write and low/high MSR numbers.
5752 * First we need to figure out which of the four to use:
5753 */
5754 bitmap = vmcs12->msr_bitmap;
5755 if (exit_reason == EXIT_REASON_MSR_WRITE)
5756 bitmap += 2048;
5757 if (msr_index >= 0xc0000000) {
5758 msr_index -= 0xc0000000;
5759 bitmap += 1024;
5760 }
5761
5762 /* Then read the msr_index'th bit from this bitmap: */
5763 if (msr_index < 1024*8) {
5764 unsigned char b;
5765 kvm_read_guest(vcpu->kvm, bitmap + msr_index/8, &b, 1);
5766 return 1 & (b >> (msr_index & 7));
5767 } else
5768 return 1; /* let L1 handle the wrong parameter */
5769}
5770
5771/*
5772 * Return 1 if we should exit from L2 to L1 to handle a CR access exit,
5773 * rather than handle it ourselves in L0. I.e., check if L1 wanted to
5774 * intercept (via guest_host_mask etc.) the current event.
5775 */
5776static bool nested_vmx_exit_handled_cr(struct kvm_vcpu *vcpu,
5777 struct vmcs12 *vmcs12)
5778{
5779 unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
5780 int cr = exit_qualification & 15;
5781 int reg = (exit_qualification >> 8) & 15;
5782 unsigned long val = kvm_register_read(vcpu, reg);
5783
5784 switch ((exit_qualification >> 4) & 3) {
5785 case 0: /* mov to cr */
5786 switch (cr) {
5787 case 0:
5788 if (vmcs12->cr0_guest_host_mask &
5789 (val ^ vmcs12->cr0_read_shadow))
5790 return 1;
5791 break;
5792 case 3:
5793 if ((vmcs12->cr3_target_count >= 1 &&
5794 vmcs12->cr3_target_value0 == val) ||
5795 (vmcs12->cr3_target_count >= 2 &&
5796 vmcs12->cr3_target_value1 == val) ||
5797 (vmcs12->cr3_target_count >= 3 &&
5798 vmcs12->cr3_target_value2 == val) ||
5799 (vmcs12->cr3_target_count >= 4 &&
5800 vmcs12->cr3_target_value3 == val))
5801 return 0;
5802 if (nested_cpu_has(vmcs12, CPU_BASED_CR3_LOAD_EXITING))
5803 return 1;
5804 break;
5805 case 4:
5806 if (vmcs12->cr4_guest_host_mask &
5807 (vmcs12->cr4_read_shadow ^ val))
5808 return 1;
5809 break;
5810 case 8:
5811 if (nested_cpu_has(vmcs12, CPU_BASED_CR8_LOAD_EXITING))
5812 return 1;
5813 break;
5814 }
5815 break;
5816 case 2: /* clts */
5817 if ((vmcs12->cr0_guest_host_mask & X86_CR0_TS) &&
5818 (vmcs12->cr0_read_shadow & X86_CR0_TS))
5819 return 1;
5820 break;
5821 case 1: /* mov from cr */
5822 switch (cr) {
5823 case 3:
5824 if (vmcs12->cpu_based_vm_exec_control &
5825 CPU_BASED_CR3_STORE_EXITING)
5826 return 1;
5827 break;
5828 case 8:
5829 if (vmcs12->cpu_based_vm_exec_control &
5830 CPU_BASED_CR8_STORE_EXITING)
5831 return 1;
5832 break;
5833 }
5834 break;
5835 case 3: /* lmsw */
5836 /*
5837 * lmsw can change bits 1..3 of cr0, and only set bit 0 of
5838 * cr0. Other attempted changes are ignored, with no exit.
5839 */
5840 if (vmcs12->cr0_guest_host_mask & 0xe &
5841 (val ^ vmcs12->cr0_read_shadow))
5842 return 1;
5843 if ((vmcs12->cr0_guest_host_mask & 0x1) &&
5844 !(vmcs12->cr0_read_shadow & 0x1) &&
5845 (val & 0x1))
5846 return 1;
5847 break;
5848 }
5849 return 0;
5850}
5851
5852/*
5853 * Return 1 if we should exit from L2 to L1 to handle an exit, or 0 if we
5854 * should handle it ourselves in L0 (and then continue L2). Only call this
5855 * when in is_guest_mode (L2).
5856 */
5857static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
5858{
5859 u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
5860 u32 intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
5861 struct vcpu_vmx *vmx = to_vmx(vcpu);
5862 struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
5863
5864 if (vmx->nested.nested_run_pending)
5865 return 0;
5866
5867 if (unlikely(vmx->fail)) {
Jan Kiszkabd801582011-09-12 11:26:22 +02005868 pr_info_ratelimited("%s failed vm entry %x\n", __func__,
5869 vmcs_read32(VM_INSTRUCTION_ERROR));
Nadav Har'El644d7112011-05-25 23:12:35 +03005870 return 1;
5871 }
5872
5873 switch (exit_reason) {
5874 case EXIT_REASON_EXCEPTION_NMI:
5875 if (!is_exception(intr_info))
5876 return 0;
5877 else if (is_page_fault(intr_info))
5878 return enable_ept;
5879 return vmcs12->exception_bitmap &
5880 (1u << (intr_info & INTR_INFO_VECTOR_MASK));
5881 case EXIT_REASON_EXTERNAL_INTERRUPT:
5882 return 0;
5883 case EXIT_REASON_TRIPLE_FAULT:
5884 return 1;
5885 case EXIT_REASON_PENDING_INTERRUPT:
5886 case EXIT_REASON_NMI_WINDOW:
5887 /*
5888 * prepare_vmcs02() set the CPU_BASED_VIRTUAL_INTR_PENDING bit
5889 * (aka Interrupt Window Exiting) only when L1 turned it on,
5890 * so if we got a PENDING_INTERRUPT exit, this must be for L1.
5891 * Same for NMI Window Exiting.
5892 */
5893 return 1;
5894 case EXIT_REASON_TASK_SWITCH:
5895 return 1;
5896 case EXIT_REASON_CPUID:
5897 return 1;
5898 case EXIT_REASON_HLT:
5899 return nested_cpu_has(vmcs12, CPU_BASED_HLT_EXITING);
5900 case EXIT_REASON_INVD:
5901 return 1;
5902 case EXIT_REASON_INVLPG:
5903 return nested_cpu_has(vmcs12, CPU_BASED_INVLPG_EXITING);
5904 case EXIT_REASON_RDPMC:
5905 return nested_cpu_has(vmcs12, CPU_BASED_RDPMC_EXITING);
5906 case EXIT_REASON_RDTSC:
5907 return nested_cpu_has(vmcs12, CPU_BASED_RDTSC_EXITING);
5908 case EXIT_REASON_VMCALL: case EXIT_REASON_VMCLEAR:
5909 case EXIT_REASON_VMLAUNCH: case EXIT_REASON_VMPTRLD:
5910 case EXIT_REASON_VMPTRST: case EXIT_REASON_VMREAD:
5911 case EXIT_REASON_VMRESUME: case EXIT_REASON_VMWRITE:
5912 case EXIT_REASON_VMOFF: case EXIT_REASON_VMON:
5913 /*
5914 * VMX instructions trap unconditionally. This allows L1 to
5915 * emulate them for its L2 guest, i.e., allows 3-level nesting!
5916 */
5917 return 1;
5918 case EXIT_REASON_CR_ACCESS:
5919 return nested_vmx_exit_handled_cr(vcpu, vmcs12);
5920 case EXIT_REASON_DR_ACCESS:
5921 return nested_cpu_has(vmcs12, CPU_BASED_MOV_DR_EXITING);
5922 case EXIT_REASON_IO_INSTRUCTION:
5923 /* TODO: support IO bitmaps */
5924 return 1;
5925 case EXIT_REASON_MSR_READ:
5926 case EXIT_REASON_MSR_WRITE:
5927 return nested_vmx_exit_handled_msr(vcpu, vmcs12, exit_reason);
5928 case EXIT_REASON_INVALID_STATE:
5929 return 1;
5930 case EXIT_REASON_MWAIT_INSTRUCTION:
5931 return nested_cpu_has(vmcs12, CPU_BASED_MWAIT_EXITING);
5932 case EXIT_REASON_MONITOR_INSTRUCTION:
5933 return nested_cpu_has(vmcs12, CPU_BASED_MONITOR_EXITING);
5934 case EXIT_REASON_PAUSE_INSTRUCTION:
5935 return nested_cpu_has(vmcs12, CPU_BASED_PAUSE_EXITING) ||
5936 nested_cpu_has2(vmcs12,
5937 SECONDARY_EXEC_PAUSE_LOOP_EXITING);
5938 case EXIT_REASON_MCE_DURING_VMENTRY:
5939 return 0;
5940 case EXIT_REASON_TPR_BELOW_THRESHOLD:
5941 return 1;
5942 case EXIT_REASON_APIC_ACCESS:
5943 return nested_cpu_has2(vmcs12,
5944 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES);
5945 case EXIT_REASON_EPT_VIOLATION:
5946 case EXIT_REASON_EPT_MISCONFIG:
5947 return 0;
5948 case EXIT_REASON_WBINVD:
5949 return nested_cpu_has2(vmcs12, SECONDARY_EXEC_WBINVD_EXITING);
5950 case EXIT_REASON_XSETBV:
5951 return 1;
5952 default:
5953 return 1;
5954 }
5955}
5956
Avi Kivity586f9602010-11-18 13:09:54 +02005957static void vmx_get_exit_info(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2)
5958{
5959 *info1 = vmcs_readl(EXIT_QUALIFICATION);
5960 *info2 = vmcs_read32(VM_EXIT_INTR_INFO);
5961}
5962
Avi Kivity6aa8b732006-12-10 02:21:36 -08005963/*
5964 * The guest has exited. See if we can fix it or if we need userspace
5965 * assistance.
5966 */
Avi Kivity851ba692009-08-24 11:10:17 +03005967static int vmx_handle_exit(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08005968{
Avi Kivity29bd8a72007-09-10 17:27:03 +03005969 struct vcpu_vmx *vmx = to_vmx(vcpu);
Andi Kleena0861c02009-06-08 17:37:09 +08005970 u32 exit_reason = vmx->exit_reason;
Avi Kivity1155f762007-11-22 11:30:47 +02005971 u32 vectoring_info = vmx->idt_vectoring_info;
Avi Kivity29bd8a72007-09-10 17:27:03 +03005972
Mohammed Gamal80ced182009-09-01 12:48:18 +02005973 /* If guest state is invalid, start emulating */
5974 if (vmx->emulation_required && emulate_invalid_guest_state)
5975 return handle_invalid_guest_state(vcpu);
Guillaume Thouvenin1d5a4d92008-10-29 09:39:42 +01005976
Nadav Har'Elb6f12502011-05-25 23:13:06 +03005977 /*
5978 * the KVM_REQ_EVENT optimization bit is only on for one entry, and if
5979 * we did not inject a still-pending event to L1 now because of
5980 * nested_run_pending, we need to re-enable this bit.
5981 */
5982 if (vmx->nested.nested_run_pending)
5983 kvm_make_request(KVM_REQ_EVENT, vcpu);
5984
Nadav Har'El509c75e2011-06-02 11:54:52 +03005985 if (!is_guest_mode(vcpu) && (exit_reason == EXIT_REASON_VMLAUNCH ||
5986 exit_reason == EXIT_REASON_VMRESUME))
Nadav Har'El644d7112011-05-25 23:12:35 +03005987 vmx->nested.nested_run_pending = 1;
5988 else
5989 vmx->nested.nested_run_pending = 0;
5990
5991 if (is_guest_mode(vcpu) && nested_vmx_exit_handled(vcpu)) {
5992 nested_vmx_vmexit(vcpu);
5993 return 1;
5994 }
5995
Mohammed Gamal51207022010-05-31 22:40:54 +03005996 if (exit_reason & VMX_EXIT_REASONS_FAILED_VMENTRY) {
5997 vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY;
5998 vcpu->run->fail_entry.hardware_entry_failure_reason
5999 = exit_reason;
6000 return 0;
6001 }
6002
Avi Kivity29bd8a72007-09-10 17:27:03 +03006003 if (unlikely(vmx->fail)) {
Avi Kivity851ba692009-08-24 11:10:17 +03006004 vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY;
6005 vcpu->run->fail_entry.hardware_entry_failure_reason
Avi Kivity29bd8a72007-09-10 17:27:03 +03006006 = vmcs_read32(VM_INSTRUCTION_ERROR);
6007 return 0;
6008 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08006009
Mike Dayd77c26f2007-10-08 09:02:08 -04006010 if ((vectoring_info & VECTORING_INFO_VALID_MASK) &&
Sheng Yang14394422008-04-28 12:24:45 +08006011 (exit_reason != EXIT_REASON_EXCEPTION_NMI &&
Jan Kiszka60637aa2008-09-26 09:30:47 +02006012 exit_reason != EXIT_REASON_EPT_VIOLATION &&
6013 exit_reason != EXIT_REASON_TASK_SWITCH))
6014 printk(KERN_WARNING "%s: unexpected, valid vectoring info "
6015 "(0x%x) and exit reason is 0x%x\n",
6016 __func__, vectoring_info, exit_reason);
Jan Kiszka3b86cd92008-09-26 09:30:57 +02006017
Nadav Har'El644d7112011-05-25 23:12:35 +03006018 if (unlikely(!cpu_has_virtual_nmis() && vmx->soft_vnmi_blocked &&
6019 !(is_guest_mode(vcpu) && nested_cpu_has_virtual_nmis(
6020 get_vmcs12(vcpu), vcpu)))) {
Gleb Natapovc4282df2009-04-21 17:45:07 +03006021 if (vmx_interrupt_allowed(vcpu)) {
Jan Kiszka3b86cd92008-09-26 09:30:57 +02006022 vmx->soft_vnmi_blocked = 0;
Jan Kiszka3b86cd92008-09-26 09:30:57 +02006023 } else if (vmx->vnmi_blocked_time > 1000000000LL &&
Jan Kiszka45312202008-12-11 16:54:54 +01006024 vcpu->arch.nmi_pending) {
Jan Kiszka3b86cd92008-09-26 09:30:57 +02006025 /*
6026 * This CPU don't support us in finding the end of an
6027 * NMI-blocked window if the guest runs with IRQs
6028 * disabled. So we pull the trigger after 1 s of
6029 * futile waiting, but inform the user about this.
6030 */
6031 printk(KERN_WARNING "%s: Breaking out of NMI-blocked "
6032 "state on VCPU %d after 1 s timeout\n",
6033 __func__, vcpu->vcpu_id);
6034 vmx->soft_vnmi_blocked = 0;
Jan Kiszka3b86cd92008-09-26 09:30:57 +02006035 }
Jan Kiszka3b86cd92008-09-26 09:30:57 +02006036 }
6037
Avi Kivity6aa8b732006-12-10 02:21:36 -08006038 if (exit_reason < kvm_vmx_max_exit_handlers
6039 && kvm_vmx_exit_handlers[exit_reason])
Avi Kivity851ba692009-08-24 11:10:17 +03006040 return kvm_vmx_exit_handlers[exit_reason](vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08006041 else {
Avi Kivity851ba692009-08-24 11:10:17 +03006042 vcpu->run->exit_reason = KVM_EXIT_UNKNOWN;
6043 vcpu->run->hw.hardware_exit_reason = exit_reason;
Avi Kivity6aa8b732006-12-10 02:21:36 -08006044 }
6045 return 0;
6046}
6047
Gleb Natapov95ba8273132009-04-21 17:45:08 +03006048static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
Yang, Sheng6e5d8652007-09-12 18:03:11 +08006049{
Gleb Natapov95ba8273132009-04-21 17:45:08 +03006050 if (irr == -1 || tpr < irr) {
Yang, Sheng6e5d8652007-09-12 18:03:11 +08006051 vmcs_write32(TPR_THRESHOLD, 0);
6052 return;
6053 }
6054
Gleb Natapov95ba8273132009-04-21 17:45:08 +03006055 vmcs_write32(TPR_THRESHOLD, irr);
Yang, Sheng6e5d8652007-09-12 18:03:11 +08006056}
6057
Avi Kivity51aa01d2010-07-20 14:31:20 +03006058static void vmx_complete_atomic_exit(struct vcpu_vmx *vmx)
Avi Kivitycf393f72008-07-01 16:20:21 +03006059{
Avi Kivity00eba012011-03-07 17:24:54 +02006060 u32 exit_intr_info;
6061
6062 if (!(vmx->exit_reason == EXIT_REASON_MCE_DURING_VMENTRY
6063 || vmx->exit_reason == EXIT_REASON_EXCEPTION_NMI))
6064 return;
6065
Avi Kivityc5ca8e52011-03-07 17:37:37 +02006066 vmx->exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
Avi Kivity00eba012011-03-07 17:24:54 +02006067 exit_intr_info = vmx->exit_intr_info;
Andi Kleena0861c02009-06-08 17:37:09 +08006068
6069 /* Handle machine checks before interrupts are enabled */
Avi Kivity00eba012011-03-07 17:24:54 +02006070 if (is_machine_check(exit_intr_info))
Andi Kleena0861c02009-06-08 17:37:09 +08006071 kvm_machine_check();
6072
Gleb Natapov20f65982009-05-11 13:35:55 +03006073 /* We need to handle NMIs before interrupts are enabled */
Avi Kivity00eba012011-03-07 17:24:54 +02006074 if ((exit_intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_NMI_INTR &&
Zhang, Yanminff9d07a2010-04-19 13:32:45 +08006075 (exit_intr_info & INTR_INFO_VALID_MASK)) {
6076 kvm_before_handle_nmi(&vmx->vcpu);
Gleb Natapov20f65982009-05-11 13:35:55 +03006077 asm("int $2");
Zhang, Yanminff9d07a2010-04-19 13:32:45 +08006078 kvm_after_handle_nmi(&vmx->vcpu);
6079 }
Avi Kivity51aa01d2010-07-20 14:31:20 +03006080}
Gleb Natapov20f65982009-05-11 13:35:55 +03006081
Avi Kivity51aa01d2010-07-20 14:31:20 +03006082static void vmx_recover_nmi_blocking(struct vcpu_vmx *vmx)
6083{
Avi Kivityc5ca8e52011-03-07 17:37:37 +02006084 u32 exit_intr_info;
Avi Kivity51aa01d2010-07-20 14:31:20 +03006085 bool unblock_nmi;
6086 u8 vector;
6087 bool idtv_info_valid;
6088
6089 idtv_info_valid = vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK;
Gleb Natapov20f65982009-05-11 13:35:55 +03006090
Avi Kivitycf393f72008-07-01 16:20:21 +03006091 if (cpu_has_virtual_nmis()) {
Avi Kivity9d58b932011-03-07 16:52:07 +02006092 if (vmx->nmi_known_unmasked)
6093 return;
Avi Kivityc5ca8e52011-03-07 17:37:37 +02006094 /*
6095 * Can't use vmx->exit_intr_info since we're not sure what
6096 * the exit reason is.
6097 */
6098 exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
Avi Kivitycf393f72008-07-01 16:20:21 +03006099 unblock_nmi = (exit_intr_info & INTR_INFO_UNBLOCK_NMI) != 0;
6100 vector = exit_intr_info & INTR_INFO_VECTOR_MASK;
6101 /*
Gleb Natapov7b4a25c2009-03-30 16:03:08 +03006102 * SDM 3: 27.7.1.2 (September 2008)
Avi Kivitycf393f72008-07-01 16:20:21 +03006103 * Re-set bit "block by NMI" before VM entry if vmexit caused by
6104 * a guest IRET fault.
Gleb Natapov7b4a25c2009-03-30 16:03:08 +03006105 * SDM 3: 23.2.2 (September 2008)
6106 * Bit 12 is undefined in any of the following cases:
6107 * If the VM exit sets the valid bit in the IDT-vectoring
6108 * information field.
6109 * If the VM exit is due to a double fault.
Avi Kivitycf393f72008-07-01 16:20:21 +03006110 */
Gleb Natapov7b4a25c2009-03-30 16:03:08 +03006111 if ((exit_intr_info & INTR_INFO_VALID_MASK) && unblock_nmi &&
6112 vector != DF_VECTOR && !idtv_info_valid)
Avi Kivitycf393f72008-07-01 16:20:21 +03006113 vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO,
6114 GUEST_INTR_STATE_NMI);
Avi Kivity9d58b932011-03-07 16:52:07 +02006115 else
6116 vmx->nmi_known_unmasked =
6117 !(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO)
6118 & GUEST_INTR_STATE_NMI);
Jan Kiszka3b86cd92008-09-26 09:30:57 +02006119 } else if (unlikely(vmx->soft_vnmi_blocked))
6120 vmx->vnmi_blocked_time +=
6121 ktime_to_ns(ktime_sub(ktime_get(), vmx->entry_time));
Avi Kivity51aa01d2010-07-20 14:31:20 +03006122}
6123
Avi Kivity83422e12010-07-20 14:43:23 +03006124static void __vmx_complete_interrupts(struct vcpu_vmx *vmx,
6125 u32 idt_vectoring_info,
6126 int instr_len_field,
6127 int error_code_field)
Avi Kivity51aa01d2010-07-20 14:31:20 +03006128{
Avi Kivity51aa01d2010-07-20 14:31:20 +03006129 u8 vector;
6130 int type;
6131 bool idtv_info_valid;
6132
6133 idtv_info_valid = idt_vectoring_info & VECTORING_INFO_VALID_MASK;
Avi Kivity668f6122008-07-02 09:28:55 +03006134
Gleb Natapov37b96e92009-03-30 16:03:13 +03006135 vmx->vcpu.arch.nmi_injected = false;
6136 kvm_clear_exception_queue(&vmx->vcpu);
6137 kvm_clear_interrupt_queue(&vmx->vcpu);
6138
6139 if (!idtv_info_valid)
6140 return;
6141
Avi Kivity3842d132010-07-27 12:30:24 +03006142 kvm_make_request(KVM_REQ_EVENT, &vmx->vcpu);
6143
Avi Kivity668f6122008-07-02 09:28:55 +03006144 vector = idt_vectoring_info & VECTORING_INFO_VECTOR_MASK;
6145 type = idt_vectoring_info & VECTORING_INFO_TYPE_MASK;
Gleb Natapov37b96e92009-03-30 16:03:13 +03006146
Gleb Natapov64a7ec02009-03-30 16:03:29 +03006147 switch (type) {
Gleb Natapov37b96e92009-03-30 16:03:13 +03006148 case INTR_TYPE_NMI_INTR:
6149 vmx->vcpu.arch.nmi_injected = true;
Avi Kivity668f6122008-07-02 09:28:55 +03006150 /*
Gleb Natapov7b4a25c2009-03-30 16:03:08 +03006151 * SDM 3: 27.7.1.2 (September 2008)
Gleb Natapov37b96e92009-03-30 16:03:13 +03006152 * Clear bit "block by NMI" before VM entry if a NMI
6153 * delivery faulted.
Avi Kivity668f6122008-07-02 09:28:55 +03006154 */
Avi Kivity654f06f2011-03-23 15:02:47 +02006155 vmx_set_nmi_mask(&vmx->vcpu, false);
Gleb Natapov37b96e92009-03-30 16:03:13 +03006156 break;
Gleb Natapov37b96e92009-03-30 16:03:13 +03006157 case INTR_TYPE_SOFT_EXCEPTION:
Gleb Natapov66fd3f72009-05-11 13:35:50 +03006158 vmx->vcpu.arch.event_exit_inst_len =
Avi Kivity83422e12010-07-20 14:43:23 +03006159 vmcs_read32(instr_len_field);
Gleb Natapov66fd3f72009-05-11 13:35:50 +03006160 /* fall through */
6161 case INTR_TYPE_HARD_EXCEPTION:
Avi Kivity35920a32008-07-03 14:50:12 +03006162 if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) {
Avi Kivity83422e12010-07-20 14:43:23 +03006163 u32 err = vmcs_read32(error_code_field);
Gleb Natapov37b96e92009-03-30 16:03:13 +03006164 kvm_queue_exception_e(&vmx->vcpu, vector, err);
Avi Kivity35920a32008-07-03 14:50:12 +03006165 } else
6166 kvm_queue_exception(&vmx->vcpu, vector);
Gleb Natapov37b96e92009-03-30 16:03:13 +03006167 break;
Gleb Natapov66fd3f72009-05-11 13:35:50 +03006168 case INTR_TYPE_SOFT_INTR:
6169 vmx->vcpu.arch.event_exit_inst_len =
Avi Kivity83422e12010-07-20 14:43:23 +03006170 vmcs_read32(instr_len_field);
Gleb Natapov66fd3f72009-05-11 13:35:50 +03006171 /* fall through */
Gleb Natapov37b96e92009-03-30 16:03:13 +03006172 case INTR_TYPE_EXT_INTR:
Gleb Natapov66fd3f72009-05-11 13:35:50 +03006173 kvm_queue_interrupt(&vmx->vcpu, vector,
6174 type == INTR_TYPE_SOFT_INTR);
Gleb Natapov37b96e92009-03-30 16:03:13 +03006175 break;
6176 default:
6177 break;
Avi Kivityf7d92382008-07-03 16:14:28 +03006178 }
Avi Kivitycf393f72008-07-01 16:20:21 +03006179}
6180
Avi Kivity83422e12010-07-20 14:43:23 +03006181static void vmx_complete_interrupts(struct vcpu_vmx *vmx)
6182{
Nadav Har'El66c78ae2011-05-25 23:14:07 +03006183 if (is_guest_mode(&vmx->vcpu))
6184 return;
Avi Kivity83422e12010-07-20 14:43:23 +03006185 __vmx_complete_interrupts(vmx, vmx->idt_vectoring_info,
6186 VM_EXIT_INSTRUCTION_LEN,
6187 IDT_VECTORING_ERROR_CODE);
6188}
6189
Avi Kivityb463a6f2010-07-20 15:06:17 +03006190static void vmx_cancel_injection(struct kvm_vcpu *vcpu)
6191{
Nadav Har'El66c78ae2011-05-25 23:14:07 +03006192 if (is_guest_mode(vcpu))
6193 return;
Avi Kivityb463a6f2010-07-20 15:06:17 +03006194 __vmx_complete_interrupts(to_vmx(vcpu),
6195 vmcs_read32(VM_ENTRY_INTR_INFO_FIELD),
6196 VM_ENTRY_INSTRUCTION_LEN,
6197 VM_ENTRY_EXCEPTION_ERROR_CODE);
6198
6199 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);
6200}
6201
Gleb Natapovd7cd9792011-10-05 14:01:23 +02006202static void atomic_switch_perf_msrs(struct vcpu_vmx *vmx)
6203{
6204 int i, nr_msrs;
6205 struct perf_guest_switch_msr *msrs;
6206
6207 msrs = perf_guest_get_msrs(&nr_msrs);
6208
6209 if (!msrs)
6210 return;
6211
6212 for (i = 0; i < nr_msrs; i++)
6213 if (msrs[i].host == msrs[i].guest)
6214 clear_atomic_switch_msr(vmx, msrs[i].msr);
6215 else
6216 add_atomic_switch_msr(vmx, msrs[i].msr, msrs[i].guest,
6217 msrs[i].host);
6218}
6219
Avi Kivityc8019492008-07-14 14:44:59 +03006220#ifdef CONFIG_X86_64
6221#define R "r"
6222#define Q "q"
6223#else
6224#define R "e"
6225#define Q "l"
6226#endif
6227
Lai Jiangshana3b5ba42011-02-11 14:29:40 +08006228static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08006229{
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04006230 struct vcpu_vmx *vmx = to_vmx(vcpu);
Gleb Natapov2a7921b2012-08-12 16:12:29 +03006231 unsigned long debugctlmsr;
Avi Kivity104f2262010-11-18 13:12:52 +02006232
Nadav Har'El66c78ae2011-05-25 23:14:07 +03006233 if (is_guest_mode(vcpu) && !vmx->nested.nested_run_pending) {
6234 struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
6235 if (vmcs12->idt_vectoring_info_field &
6236 VECTORING_INFO_VALID_MASK) {
6237 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
6238 vmcs12->idt_vectoring_info_field);
6239 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
6240 vmcs12->vm_exit_instruction_len);
6241 if (vmcs12->idt_vectoring_info_field &
6242 VECTORING_INFO_DELIVER_CODE_MASK)
6243 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE,
6244 vmcs12->idt_vectoring_error_code);
6245 }
6246 }
6247
Avi Kivity104f2262010-11-18 13:12:52 +02006248 /* Record the guest's net vcpu time for enforced NMI injections. */
6249 if (unlikely(!cpu_has_virtual_nmis() && vmx->soft_vnmi_blocked))
6250 vmx->entry_time = ktime_get();
6251
6252 /* Don't enter VMX if guest state is invalid, let the exit handler
6253 start emulation until we arrive back to a valid state */
6254 if (vmx->emulation_required && emulate_invalid_guest_state)
6255 return;
6256
6257 if (test_bit(VCPU_REGS_RSP, (unsigned long *)&vcpu->arch.regs_dirty))
6258 vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]);
6259 if (test_bit(VCPU_REGS_RIP, (unsigned long *)&vcpu->arch.regs_dirty))
6260 vmcs_writel(GUEST_RIP, vcpu->arch.regs[VCPU_REGS_RIP]);
6261
6262 /* When single-stepping over STI and MOV SS, we must clear the
6263 * corresponding interruptibility bits in the guest state. Otherwise
6264 * vmentry fails as it then expects bit 14 (BS) in pending debug
6265 * exceptions being set, but that's not correct for the guest debugging
6266 * case. */
6267 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6268 vmx_set_interrupt_shadow(vcpu, 0);
6269
Gleb Natapovd7cd9792011-10-05 14:01:23 +02006270 atomic_switch_perf_msrs(vmx);
Gleb Natapov2a7921b2012-08-12 16:12:29 +03006271 debugctlmsr = get_debugctlmsr();
Gleb Natapovd7cd9792011-10-05 14:01:23 +02006272
Nadav Har'Eld462b812011-05-24 15:26:10 +03006273 vmx->__launched = vmx->loaded_vmcs->launched;
Avi Kivity104f2262010-11-18 13:12:52 +02006274 asm(
Avi Kivity6aa8b732006-12-10 02:21:36 -08006275 /* Store host registers */
Avi Kivityc8019492008-07-14 14:44:59 +03006276 "push %%"R"dx; push %%"R"bp;"
Avi Kivity40712fa2011-01-06 18:09:12 +02006277 "push %%"R"cx \n\t" /* placeholder for guest rcx */
Avi Kivityc8019492008-07-14 14:44:59 +03006278 "push %%"R"cx \n\t"
Avi Kivity313dbd42008-07-17 18:04:30 +03006279 "cmp %%"R"sp, %c[host_rsp](%0) \n\t"
6280 "je 1f \n\t"
6281 "mov %%"R"sp, %c[host_rsp](%0) \n\t"
Avi Kivity4ecac3f2008-05-13 13:23:38 +03006282 __ex(ASM_VMX_VMWRITE_RSP_RDX) "\n\t"
Avi Kivity313dbd42008-07-17 18:04:30 +03006283 "1: \n\t"
Avi Kivityd3edefc2009-06-16 12:33:56 +03006284 /* Reload cr2 if changed */
6285 "mov %c[cr2](%0), %%"R"ax \n\t"
6286 "mov %%cr2, %%"R"dx \n\t"
6287 "cmp %%"R"ax, %%"R"dx \n\t"
6288 "je 2f \n\t"
6289 "mov %%"R"ax, %%cr2 \n\t"
6290 "2: \n\t"
Avi Kivity6aa8b732006-12-10 02:21:36 -08006291 /* Check if vmlaunch of vmresume is needed */
Avi Kivitye08aa782007-11-15 18:06:18 +02006292 "cmpl $0, %c[launched](%0) \n\t"
Avi Kivity6aa8b732006-12-10 02:21:36 -08006293 /* Load guest registers. Don't clobber flags. */
Avi Kivityc8019492008-07-14 14:44:59 +03006294 "mov %c[rax](%0), %%"R"ax \n\t"
6295 "mov %c[rbx](%0), %%"R"bx \n\t"
6296 "mov %c[rdx](%0), %%"R"dx \n\t"
6297 "mov %c[rsi](%0), %%"R"si \n\t"
6298 "mov %c[rdi](%0), %%"R"di \n\t"
6299 "mov %c[rbp](%0), %%"R"bp \n\t"
Avi Kivity05b3e0c2006-12-13 00:33:45 -08006300#ifdef CONFIG_X86_64
Avi Kivitye08aa782007-11-15 18:06:18 +02006301 "mov %c[r8](%0), %%r8 \n\t"
6302 "mov %c[r9](%0), %%r9 \n\t"
6303 "mov %c[r10](%0), %%r10 \n\t"
6304 "mov %c[r11](%0), %%r11 \n\t"
6305 "mov %c[r12](%0), %%r12 \n\t"
6306 "mov %c[r13](%0), %%r13 \n\t"
6307 "mov %c[r14](%0), %%r14 \n\t"
6308 "mov %c[r15](%0), %%r15 \n\t"
Avi Kivity6aa8b732006-12-10 02:21:36 -08006309#endif
Avi Kivityc8019492008-07-14 14:44:59 +03006310 "mov %c[rcx](%0), %%"R"cx \n\t" /* kills %0 (ecx) */
6311
Avi Kivity6aa8b732006-12-10 02:21:36 -08006312 /* Enter guest mode */
Avi Kivitycd2276a2007-05-14 20:41:13 +03006313 "jne .Llaunched \n\t"
Avi Kivity4ecac3f2008-05-13 13:23:38 +03006314 __ex(ASM_VMX_VMLAUNCH) "\n\t"
Avi Kivitycd2276a2007-05-14 20:41:13 +03006315 "jmp .Lkvm_vmx_return \n\t"
Avi Kivity4ecac3f2008-05-13 13:23:38 +03006316 ".Llaunched: " __ex(ASM_VMX_VMRESUME) "\n\t"
Avi Kivitycd2276a2007-05-14 20:41:13 +03006317 ".Lkvm_vmx_return: "
Avi Kivity6aa8b732006-12-10 02:21:36 -08006318 /* Save guest registers, load host registers, keep flags */
Avi Kivity40712fa2011-01-06 18:09:12 +02006319 "mov %0, %c[wordsize](%%"R"sp) \n\t"
6320 "pop %0 \n\t"
Avi Kivityc8019492008-07-14 14:44:59 +03006321 "mov %%"R"ax, %c[rax](%0) \n\t"
6322 "mov %%"R"bx, %c[rbx](%0) \n\t"
Avi Kivity1c696d02011-01-06 18:09:11 +02006323 "pop"Q" %c[rcx](%0) \n\t"
Avi Kivityc8019492008-07-14 14:44:59 +03006324 "mov %%"R"dx, %c[rdx](%0) \n\t"
6325 "mov %%"R"si, %c[rsi](%0) \n\t"
6326 "mov %%"R"di, %c[rdi](%0) \n\t"
6327 "mov %%"R"bp, %c[rbp](%0) \n\t"
Avi Kivity05b3e0c2006-12-13 00:33:45 -08006328#ifdef CONFIG_X86_64
Avi Kivitye08aa782007-11-15 18:06:18 +02006329 "mov %%r8, %c[r8](%0) \n\t"
6330 "mov %%r9, %c[r9](%0) \n\t"
6331 "mov %%r10, %c[r10](%0) \n\t"
6332 "mov %%r11, %c[r11](%0) \n\t"
6333 "mov %%r12, %c[r12](%0) \n\t"
6334 "mov %%r13, %c[r13](%0) \n\t"
6335 "mov %%r14, %c[r14](%0) \n\t"
6336 "mov %%r15, %c[r15](%0) \n\t"
Avi Kivity6aa8b732006-12-10 02:21:36 -08006337#endif
Avi Kivityc8019492008-07-14 14:44:59 +03006338 "mov %%cr2, %%"R"ax \n\t"
6339 "mov %%"R"ax, %c[cr2](%0) \n\t"
6340
Avi Kivity1c696d02011-01-06 18:09:11 +02006341 "pop %%"R"bp; pop %%"R"dx \n\t"
Avi Kivitye08aa782007-11-15 18:06:18 +02006342 "setbe %c[fail](%0) \n\t"
6343 : : "c"(vmx), "d"((unsigned long)HOST_RSP),
Nadav Har'Eld462b812011-05-24 15:26:10 +03006344 [launched]"i"(offsetof(struct vcpu_vmx, __launched)),
Avi Kivitye08aa782007-11-15 18:06:18 +02006345 [fail]"i"(offsetof(struct vcpu_vmx, fail)),
Avi Kivity313dbd42008-07-17 18:04:30 +03006346 [host_rsp]"i"(offsetof(struct vcpu_vmx, host_rsp)),
Zhang Xiantaoad312c72007-12-13 23:50:52 +08006347 [rax]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RAX])),
6348 [rbx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RBX])),
6349 [rcx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RCX])),
6350 [rdx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RDX])),
6351 [rsi]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RSI])),
6352 [rdi]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RDI])),
6353 [rbp]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RBP])),
Avi Kivity05b3e0c2006-12-13 00:33:45 -08006354#ifdef CONFIG_X86_64
Zhang Xiantaoad312c72007-12-13 23:50:52 +08006355 [r8]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R8])),
6356 [r9]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R9])),
6357 [r10]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R10])),
6358 [r11]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R11])),
6359 [r12]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R12])),
6360 [r13]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R13])),
6361 [r14]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R14])),
6362 [r15]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R15])),
Avi Kivity6aa8b732006-12-10 02:21:36 -08006363#endif
Avi Kivity40712fa2011-01-06 18:09:12 +02006364 [cr2]"i"(offsetof(struct vcpu_vmx, vcpu.arch.cr2)),
6365 [wordsize]"i"(sizeof(ulong))
Laurent Vivierc2036302007-10-25 14:18:52 +02006366 : "cc", "memory"
Jan Kiszka07d6f552010-09-28 16:37:42 +02006367 , R"ax", R"bx", R"di", R"si"
Laurent Vivierc2036302007-10-25 14:18:52 +02006368#ifdef CONFIG_X86_64
Laurent Vivierc2036302007-10-25 14:18:52 +02006369 , "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
6370#endif
6371 );
Avi Kivity6aa8b732006-12-10 02:21:36 -08006372
Gleb Natapov2a7921b2012-08-12 16:12:29 +03006373 /* MSR_IA32_DEBUGCTLMSR is zeroed on vmexit. Restore it if needed */
6374 if (debugctlmsr)
6375 update_debugctlmsr(debugctlmsr);
6376
Avi Kivityaa67f602012-08-01 16:48:03 +03006377#ifndef CONFIG_X86_64
6378 /*
6379 * The sysexit path does not restore ds/es, so we must set them to
6380 * a reasonable value ourselves.
6381 *
6382 * We can't defer this to vmx_load_host_state() since that function
6383 * may be executed in interrupt context, which saves and restore segments
6384 * around it, nullifying its effect.
6385 */
6386 loadsegment(ds, __USER_DS);
6387 loadsegment(es, __USER_DS);
6388#endif
6389
Avi Kivity6de4f3a2009-05-31 22:58:47 +03006390 vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP)
Avi Kivity6de12732011-03-07 12:51:22 +02006391 | (1 << VCPU_EXREG_RFLAGS)
Avi Kivity69c73022011-03-07 15:26:44 +02006392 | (1 << VCPU_EXREG_CPL)
Avi Kivityaff48ba2010-12-05 18:56:11 +02006393 | (1 << VCPU_EXREG_PDPTR)
Avi Kivity2fb92db2011-04-27 19:42:18 +03006394 | (1 << VCPU_EXREG_SEGMENTS)
Avi Kivityaff48ba2010-12-05 18:56:11 +02006395 | (1 << VCPU_EXREG_CR3));
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03006396 vcpu->arch.regs_dirty = 0;
6397
Avi Kivity1155f762007-11-22 11:30:47 +02006398 vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
6399
Nadav Har'El66c78ae2011-05-25 23:14:07 +03006400 if (is_guest_mode(vcpu)) {
6401 struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
6402 vmcs12->idt_vectoring_info_field = vmx->idt_vectoring_info;
6403 if (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK) {
6404 vmcs12->idt_vectoring_error_code =
6405 vmcs_read32(IDT_VECTORING_ERROR_CODE);
6406 vmcs12->vm_exit_instruction_len =
6407 vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
6408 }
6409 }
6410
Nadav Har'Eld462b812011-05-24 15:26:10 +03006411 vmx->loaded_vmcs->launched = 1;
Avi Kivity1b6269d2007-10-09 12:12:19 +02006412
Avi Kivity51aa01d2010-07-20 14:31:20 +03006413 vmx->exit_reason = vmcs_read32(VM_EXIT_REASON);
Jan Kiszka1e2b1dd2011-09-12 10:52:24 +02006414 trace_kvm_exit(vmx->exit_reason, vcpu, KVM_ISA_VMX);
Avi Kivity51aa01d2010-07-20 14:31:20 +03006415
6416 vmx_complete_atomic_exit(vmx);
6417 vmx_recover_nmi_blocking(vmx);
Avi Kivitycf393f72008-07-01 16:20:21 +03006418 vmx_complete_interrupts(vmx);
Avi Kivity6aa8b732006-12-10 02:21:36 -08006419}
6420
Avi Kivityc8019492008-07-14 14:44:59 +03006421#undef R
6422#undef Q
6423
Avi Kivity6aa8b732006-12-10 02:21:36 -08006424static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
6425{
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006426 struct vcpu_vmx *vmx = to_vmx(vcpu);
6427
Lai Jiangshancdbecfc2010-04-17 16:41:47 +08006428 free_vpid(vmx);
Nadav Har'Elec378ae2011-05-25 23:02:54 +03006429 free_nested(vmx);
Nadav Har'Eld462b812011-05-24 15:26:10 +03006430 free_loaded_vmcs(vmx->loaded_vmcs);
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006431 kfree(vmx->guest_msrs);
6432 kvm_vcpu_uninit(vcpu);
Rusty Russella4770342007-08-01 14:46:11 +10006433 kmem_cache_free(kvm_vcpu_cache, vmx);
Avi Kivity6aa8b732006-12-10 02:21:36 -08006434}
6435
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006436static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
Avi Kivity6aa8b732006-12-10 02:21:36 -08006437{
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006438 int err;
Rusty Russellc16f8622007-07-30 21:12:19 +10006439 struct vcpu_vmx *vmx = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
Avi Kivity15ad7142007-07-11 18:17:21 +03006440 int cpu;
Avi Kivity6aa8b732006-12-10 02:21:36 -08006441
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04006442 if (!vmx)
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006443 return ERR_PTR(-ENOMEM);
6444
Sheng Yang2384d2b2008-01-17 15:14:33 +08006445 allocate_vpid(vmx);
6446
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006447 err = kvm_vcpu_init(&vmx->vcpu, kvm, id);
6448 if (err)
6449 goto free_vcpu;
Ingo Molnar965b58a2007-01-05 16:36:23 -08006450
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04006451 vmx->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
Jan Kiszkabe6d05c2011-04-13 01:27:55 +02006452 err = -ENOMEM;
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006453 if (!vmx->guest_msrs) {
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006454 goto uninit_vcpu;
6455 }
Ingo Molnar965b58a2007-01-05 16:36:23 -08006456
Nadav Har'Eld462b812011-05-24 15:26:10 +03006457 vmx->loaded_vmcs = &vmx->vmcs01;
6458 vmx->loaded_vmcs->vmcs = alloc_vmcs();
6459 if (!vmx->loaded_vmcs->vmcs)
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006460 goto free_msrs;
Nadav Har'Eld462b812011-05-24 15:26:10 +03006461 if (!vmm_exclusive)
6462 kvm_cpu_vmxon(__pa(per_cpu(vmxarea, raw_smp_processor_id())));
6463 loaded_vmcs_init(vmx->loaded_vmcs);
6464 if (!vmm_exclusive)
6465 kvm_cpu_vmxoff();
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04006466
Avi Kivity15ad7142007-07-11 18:17:21 +03006467 cpu = get_cpu();
6468 vmx_vcpu_load(&vmx->vcpu, cpu);
Zachary Amsdene48672f2010-08-19 22:07:23 -10006469 vmx->vcpu.cpu = cpu;
Rusty Russell8b9cf982007-07-30 16:31:43 +10006470 err = vmx_vcpu_setup(vmx);
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006471 vmx_vcpu_put(&vmx->vcpu);
Avi Kivity15ad7142007-07-11 18:17:21 +03006472 put_cpu();
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006473 if (err)
6474 goto free_vmcs;
Marcelo Tosatti5e4a0b32008-02-14 21:21:43 -02006475 if (vm_need_virtualize_apic_accesses(kvm))
Jan Kiszkabe6d05c2011-04-13 01:27:55 +02006476 err = alloc_apic_access_page(kvm);
6477 if (err)
Marcelo Tosatti5e4a0b32008-02-14 21:21:43 -02006478 goto free_vmcs;
Ingo Molnar965b58a2007-01-05 16:36:23 -08006479
Sheng Yangb927a3c2009-07-21 10:42:48 +08006480 if (enable_ept) {
6481 if (!kvm->arch.ept_identity_map_addr)
6482 kvm->arch.ept_identity_map_addr =
6483 VMX_EPT_IDENTITY_PAGETABLE_ADDR;
Gleb Natapov93ea5382011-02-21 12:07:59 +02006484 err = -ENOMEM;
Sheng Yangb7ebfb02008-04-25 21:44:52 +08006485 if (alloc_identity_pagetable(kvm) != 0)
6486 goto free_vmcs;
Gleb Natapov93ea5382011-02-21 12:07:59 +02006487 if (!init_rmode_identity_map(kvm))
6488 goto free_vmcs;
Sheng Yangb927a3c2009-07-21 10:42:48 +08006489 }
Sheng Yangb7ebfb02008-04-25 21:44:52 +08006490
Nadav Har'Ela9d30f32011-05-25 23:03:55 +03006491 vmx->nested.current_vmptr = -1ull;
6492 vmx->nested.current_vmcs12 = NULL;
6493
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006494 return &vmx->vcpu;
Ingo Molnar965b58a2007-01-05 16:36:23 -08006495
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006496free_vmcs:
Xiao Guangrong5f3fbc32012-05-14 14:58:58 +08006497 free_loaded_vmcs(vmx->loaded_vmcs);
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006498free_msrs:
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006499 kfree(vmx->guest_msrs);
6500uninit_vcpu:
6501 kvm_vcpu_uninit(&vmx->vcpu);
6502free_vcpu:
Lai Jiangshancdbecfc2010-04-17 16:41:47 +08006503 free_vpid(vmx);
Rusty Russella4770342007-08-01 14:46:11 +10006504 kmem_cache_free(kvm_vcpu_cache, vmx);
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006505 return ERR_PTR(err);
Avi Kivity6aa8b732006-12-10 02:21:36 -08006506}
6507
Yang, Sheng002c7f72007-07-31 14:23:01 +03006508static void __init vmx_check_processor_compat(void *rtn)
6509{
6510 struct vmcs_config vmcs_conf;
6511
6512 *(int *)rtn = 0;
6513 if (setup_vmcs_config(&vmcs_conf) < 0)
6514 *(int *)rtn = -EIO;
6515 if (memcmp(&vmcs_config, &vmcs_conf, sizeof(struct vmcs_config)) != 0) {
6516 printk(KERN_ERR "kvm: CPU %d feature inconsistency!\n",
6517 smp_processor_id());
6518 *(int *)rtn = -EIO;
6519 }
6520}
6521
Sheng Yang67253af2008-04-25 10:20:22 +08006522static int get_ept_level(void)
6523{
6524 return VMX_EPT_DEFAULT_GAW + 1;
6525}
6526
Sheng Yang4b12f0d2009-04-27 20:35:42 +08006527static u64 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
Sheng Yang64d4d522008-10-09 16:01:57 +08006528{
Sheng Yang4b12f0d2009-04-27 20:35:42 +08006529 u64 ret;
6530
Sheng Yang522c68c2009-04-27 20:35:43 +08006531 /* For VT-d and EPT combination
6532 * 1. MMIO: always map as UC
6533 * 2. EPT with VT-d:
6534 * a. VT-d without snooping control feature: can't guarantee the
6535 * result, try to trust guest.
6536 * b. VT-d with snooping control feature: snooping control feature of
6537 * VT-d engine can guarantee the cache correctness. Just set it
6538 * to WB to keep consistent with host. So the same as item 3.
Sheng Yanga19a6d12010-02-09 16:41:53 +08006539 * 3. EPT without VT-d: always map as WB and set IPAT=1 to keep
Sheng Yang522c68c2009-04-27 20:35:43 +08006540 * consistent with host MTRR
6541 */
Sheng Yang4b12f0d2009-04-27 20:35:42 +08006542 if (is_mmio)
6543 ret = MTRR_TYPE_UNCACHABLE << VMX_EPT_MT_EPTE_SHIFT;
Sheng Yang522c68c2009-04-27 20:35:43 +08006544 else if (vcpu->kvm->arch.iommu_domain &&
6545 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY))
6546 ret = kvm_get_guest_memory_type(vcpu, gfn) <<
6547 VMX_EPT_MT_EPTE_SHIFT;
Sheng Yang4b12f0d2009-04-27 20:35:42 +08006548 else
Sheng Yang522c68c2009-04-27 20:35:43 +08006549 ret = (MTRR_TYPE_WRBACK << VMX_EPT_MT_EPTE_SHIFT)
Sheng Yanga19a6d12010-02-09 16:41:53 +08006550 | VMX_EPT_IPAT_BIT;
Sheng Yang4b12f0d2009-04-27 20:35:42 +08006551
6552 return ret;
Sheng Yang64d4d522008-10-09 16:01:57 +08006553}
6554
Sheng Yang17cc3932010-01-05 19:02:27 +08006555static int vmx_get_lpage_level(void)
Joerg Roedel344f4142009-07-27 16:30:48 +02006556{
Sheng Yang878403b2010-01-05 19:02:29 +08006557 if (enable_ept && !cpu_has_vmx_ept_1g_page())
6558 return PT_DIRECTORY_LEVEL;
6559 else
6560 /* For shadow and EPT supported 1GB page */
6561 return PT_PDPE_LEVEL;
Joerg Roedel344f4142009-07-27 16:30:48 +02006562}
6563
Sheng Yang0e851882009-12-18 16:48:46 +08006564static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
6565{
Sheng Yang4e47c7a2009-12-18 16:48:47 +08006566 struct kvm_cpuid_entry2 *best;
6567 struct vcpu_vmx *vmx = to_vmx(vcpu);
6568 u32 exec_control;
6569
6570 vmx->rdtscp_enabled = false;
6571 if (vmx_rdtscp_supported()) {
6572 exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
6573 if (exec_control & SECONDARY_EXEC_RDTSCP) {
6574 best = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
6575 if (best && (best->edx & bit(X86_FEATURE_RDTSCP)))
6576 vmx->rdtscp_enabled = true;
6577 else {
6578 exec_control &= ~SECONDARY_EXEC_RDTSCP;
6579 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
6580 exec_control);
6581 }
6582 }
6583 }
Mao, Junjiead756a12012-07-02 01:18:48 +00006584
6585 exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
6586 /* Exposing INVPCID only when PCID is exposed */
6587 best = kvm_find_cpuid_entry(vcpu, 0x7, 0);
6588 if (vmx_invpcid_supported() &&
6589 best && (best->ecx & bit(X86_FEATURE_INVPCID)) &&
6590 guest_cpuid_has_pcid(vcpu)) {
6591 exec_control |= SECONDARY_EXEC_ENABLE_INVPCID;
6592 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
6593 exec_control);
6594 } else {
6595 exec_control &= ~SECONDARY_EXEC_ENABLE_INVPCID;
6596 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
6597 exec_control);
6598 if (best)
6599 best->ecx &= ~bit(X86_FEATURE_INVPCID);
6600 }
Sheng Yang0e851882009-12-18 16:48:46 +08006601}
6602
Joerg Roedeld4330ef2010-04-22 12:33:11 +02006603static void vmx_set_supported_cpuid(u32 func, struct kvm_cpuid_entry2 *entry)
6604{
Nadav Har'El7b8050f2011-05-25 23:16:10 +03006605 if (func == 1 && nested)
6606 entry->ecx |= bit(X86_FEATURE_VMX);
Joerg Roedeld4330ef2010-04-22 12:33:11 +02006607}
6608
Nadav Har'Elfe3ef052011-05-25 23:10:02 +03006609/*
6610 * prepare_vmcs02 is called when the L1 guest hypervisor runs its nested
6611 * L2 guest. L1 has a vmcs for L2 (vmcs12), and this function "merges" it
6612 * with L0's requirements for its guest (a.k.a. vmsc01), so we can run the L2
6613 * guest in a way that will both be appropriate to L1's requests, and our
6614 * needs. In addition to modifying the active vmcs (which is vmcs02), this
6615 * function also has additional necessary side-effects, like setting various
6616 * vcpu->arch fields.
6617 */
6618static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
6619{
6620 struct vcpu_vmx *vmx = to_vmx(vcpu);
6621 u32 exec_control;
6622
6623 vmcs_write16(GUEST_ES_SELECTOR, vmcs12->guest_es_selector);
6624 vmcs_write16(GUEST_CS_SELECTOR, vmcs12->guest_cs_selector);
6625 vmcs_write16(GUEST_SS_SELECTOR, vmcs12->guest_ss_selector);
6626 vmcs_write16(GUEST_DS_SELECTOR, vmcs12->guest_ds_selector);
6627 vmcs_write16(GUEST_FS_SELECTOR, vmcs12->guest_fs_selector);
6628 vmcs_write16(GUEST_GS_SELECTOR, vmcs12->guest_gs_selector);
6629 vmcs_write16(GUEST_LDTR_SELECTOR, vmcs12->guest_ldtr_selector);
6630 vmcs_write16(GUEST_TR_SELECTOR, vmcs12->guest_tr_selector);
6631 vmcs_write32(GUEST_ES_LIMIT, vmcs12->guest_es_limit);
6632 vmcs_write32(GUEST_CS_LIMIT, vmcs12->guest_cs_limit);
6633 vmcs_write32(GUEST_SS_LIMIT, vmcs12->guest_ss_limit);
6634 vmcs_write32(GUEST_DS_LIMIT, vmcs12->guest_ds_limit);
6635 vmcs_write32(GUEST_FS_LIMIT, vmcs12->guest_fs_limit);
6636 vmcs_write32(GUEST_GS_LIMIT, vmcs12->guest_gs_limit);
6637 vmcs_write32(GUEST_LDTR_LIMIT, vmcs12->guest_ldtr_limit);
6638 vmcs_write32(GUEST_TR_LIMIT, vmcs12->guest_tr_limit);
6639 vmcs_write32(GUEST_GDTR_LIMIT, vmcs12->guest_gdtr_limit);
6640 vmcs_write32(GUEST_IDTR_LIMIT, vmcs12->guest_idtr_limit);
6641 vmcs_write32(GUEST_ES_AR_BYTES, vmcs12->guest_es_ar_bytes);
6642 vmcs_write32(GUEST_CS_AR_BYTES, vmcs12->guest_cs_ar_bytes);
6643 vmcs_write32(GUEST_SS_AR_BYTES, vmcs12->guest_ss_ar_bytes);
6644 vmcs_write32(GUEST_DS_AR_BYTES, vmcs12->guest_ds_ar_bytes);
6645 vmcs_write32(GUEST_FS_AR_BYTES, vmcs12->guest_fs_ar_bytes);
6646 vmcs_write32(GUEST_GS_AR_BYTES, vmcs12->guest_gs_ar_bytes);
6647 vmcs_write32(GUEST_LDTR_AR_BYTES, vmcs12->guest_ldtr_ar_bytes);
6648 vmcs_write32(GUEST_TR_AR_BYTES, vmcs12->guest_tr_ar_bytes);
6649 vmcs_writel(GUEST_ES_BASE, vmcs12->guest_es_base);
6650 vmcs_writel(GUEST_CS_BASE, vmcs12->guest_cs_base);
6651 vmcs_writel(GUEST_SS_BASE, vmcs12->guest_ss_base);
6652 vmcs_writel(GUEST_DS_BASE, vmcs12->guest_ds_base);
6653 vmcs_writel(GUEST_FS_BASE, vmcs12->guest_fs_base);
6654 vmcs_writel(GUEST_GS_BASE, vmcs12->guest_gs_base);
6655 vmcs_writel(GUEST_LDTR_BASE, vmcs12->guest_ldtr_base);
6656 vmcs_writel(GUEST_TR_BASE, vmcs12->guest_tr_base);
6657 vmcs_writel(GUEST_GDTR_BASE, vmcs12->guest_gdtr_base);
6658 vmcs_writel(GUEST_IDTR_BASE, vmcs12->guest_idtr_base);
6659
6660 vmcs_write64(GUEST_IA32_DEBUGCTL, vmcs12->guest_ia32_debugctl);
6661 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
6662 vmcs12->vm_entry_intr_info_field);
6663 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE,
6664 vmcs12->vm_entry_exception_error_code);
6665 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
6666 vmcs12->vm_entry_instruction_len);
6667 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
6668 vmcs12->guest_interruptibility_info);
6669 vmcs_write32(GUEST_ACTIVITY_STATE, vmcs12->guest_activity_state);
6670 vmcs_write32(GUEST_SYSENTER_CS, vmcs12->guest_sysenter_cs);
6671 vmcs_writel(GUEST_DR7, vmcs12->guest_dr7);
6672 vmcs_writel(GUEST_RFLAGS, vmcs12->guest_rflags);
6673 vmcs_writel(GUEST_PENDING_DBG_EXCEPTIONS,
6674 vmcs12->guest_pending_dbg_exceptions);
6675 vmcs_writel(GUEST_SYSENTER_ESP, vmcs12->guest_sysenter_esp);
6676 vmcs_writel(GUEST_SYSENTER_EIP, vmcs12->guest_sysenter_eip);
6677
6678 vmcs_write64(VMCS_LINK_POINTER, -1ull);
6679
6680 vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
6681 (vmcs_config.pin_based_exec_ctrl |
6682 vmcs12->pin_based_vm_exec_control));
6683
6684 /*
6685 * Whether page-faults are trapped is determined by a combination of
6686 * 3 settings: PFEC_MASK, PFEC_MATCH and EXCEPTION_BITMAP.PF.
6687 * If enable_ept, L0 doesn't care about page faults and we should
6688 * set all of these to L1's desires. However, if !enable_ept, L0 does
6689 * care about (at least some) page faults, and because it is not easy
6690 * (if at all possible?) to merge L0 and L1's desires, we simply ask
6691 * to exit on each and every L2 page fault. This is done by setting
6692 * MASK=MATCH=0 and (see below) EB.PF=1.
6693 * Note that below we don't need special code to set EB.PF beyond the
6694 * "or"ing of the EB of vmcs01 and vmcs12, because when enable_ept,
6695 * vmcs01's EB.PF is 0 so the "or" will take vmcs12's value, and when
6696 * !enable_ept, EB.PF is 1, so the "or" will always be 1.
6697 *
6698 * A problem with this approach (when !enable_ept) is that L1 may be
6699 * injected with more page faults than it asked for. This could have
6700 * caused problems, but in practice existing hypervisors don't care.
6701 * To fix this, we will need to emulate the PFEC checking (on the L1
6702 * page tables), using walk_addr(), when injecting PFs to L1.
6703 */
6704 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK,
6705 enable_ept ? vmcs12->page_fault_error_code_mask : 0);
6706 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH,
6707 enable_ept ? vmcs12->page_fault_error_code_match : 0);
6708
6709 if (cpu_has_secondary_exec_ctrls()) {
6710 u32 exec_control = vmx_secondary_exec_control(vmx);
6711 if (!vmx->rdtscp_enabled)
6712 exec_control &= ~SECONDARY_EXEC_RDTSCP;
6713 /* Take the following fields only from vmcs12 */
6714 exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
6715 if (nested_cpu_has(vmcs12,
6716 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS))
6717 exec_control |= vmcs12->secondary_vm_exec_control;
6718
6719 if (exec_control & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES) {
6720 /*
6721 * Translate L1 physical address to host physical
6722 * address for vmcs02. Keep the page pinned, so this
6723 * physical address remains valid. We keep a reference
6724 * to it so we can release it later.
6725 */
6726 if (vmx->nested.apic_access_page) /* shouldn't happen */
6727 nested_release_page(vmx->nested.apic_access_page);
6728 vmx->nested.apic_access_page =
6729 nested_get_page(vcpu, vmcs12->apic_access_addr);
6730 /*
6731 * If translation failed, no matter: This feature asks
6732 * to exit when accessing the given address, and if it
6733 * can never be accessed, this feature won't do
6734 * anything anyway.
6735 */
6736 if (!vmx->nested.apic_access_page)
6737 exec_control &=
6738 ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
6739 else
6740 vmcs_write64(APIC_ACCESS_ADDR,
6741 page_to_phys(vmx->nested.apic_access_page));
6742 }
6743
6744 vmcs_write32(SECONDARY_VM_EXEC_CONTROL, exec_control);
6745 }
6746
6747
6748 /*
6749 * Set host-state according to L0's settings (vmcs12 is irrelevant here)
6750 * Some constant fields are set here by vmx_set_constant_host_state().
6751 * Other fields are different per CPU, and will be set later when
6752 * vmx_vcpu_load() is called, and when vmx_save_host_state() is called.
6753 */
6754 vmx_set_constant_host_state();
6755
6756 /*
6757 * HOST_RSP is normally set correctly in vmx_vcpu_run() just before
6758 * entry, but only if the current (host) sp changed from the value
6759 * we wrote last (vmx->host_rsp). This cache is no longer relevant
6760 * if we switch vmcs, and rather than hold a separate cache per vmcs,
6761 * here we just force the write to happen on entry.
6762 */
6763 vmx->host_rsp = 0;
6764
6765 exec_control = vmx_exec_control(vmx); /* L0's desires */
6766 exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
6767 exec_control &= ~CPU_BASED_VIRTUAL_NMI_PENDING;
6768 exec_control &= ~CPU_BASED_TPR_SHADOW;
6769 exec_control |= vmcs12->cpu_based_vm_exec_control;
6770 /*
6771 * Merging of IO and MSR bitmaps not currently supported.
6772 * Rather, exit every time.
6773 */
6774 exec_control &= ~CPU_BASED_USE_MSR_BITMAPS;
6775 exec_control &= ~CPU_BASED_USE_IO_BITMAPS;
6776 exec_control |= CPU_BASED_UNCOND_IO_EXITING;
6777
6778 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, exec_control);
6779
6780 /* EXCEPTION_BITMAP and CR0_GUEST_HOST_MASK should basically be the
6781 * bitwise-or of what L1 wants to trap for L2, and what we want to
6782 * trap. Note that CR0.TS also needs updating - we do this later.
6783 */
6784 update_exception_bitmap(vcpu);
6785 vcpu->arch.cr0_guest_owned_bits &= ~vmcs12->cr0_guest_host_mask;
6786 vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
6787
6788 /* Note: IA32_MODE, LOAD_IA32_EFER are modified by vmx_set_efer below */
6789 vmcs_write32(VM_EXIT_CONTROLS,
6790 vmcs12->vm_exit_controls | vmcs_config.vmexit_ctrl);
6791 vmcs_write32(VM_ENTRY_CONTROLS, vmcs12->vm_entry_controls |
6792 (vmcs_config.vmentry_ctrl & ~VM_ENTRY_IA32E_MODE));
6793
6794 if (vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_PAT)
6795 vmcs_write64(GUEST_IA32_PAT, vmcs12->guest_ia32_pat);
6796 else if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT)
6797 vmcs_write64(GUEST_IA32_PAT, vmx->vcpu.arch.pat);
6798
6799
6800 set_cr4_guest_host_mask(vmx);
6801
Nadav Har'El27fc51b2011-08-02 15:54:52 +03006802 if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETING)
6803 vmcs_write64(TSC_OFFSET,
6804 vmx->nested.vmcs01_tsc_offset + vmcs12->tsc_offset);
6805 else
6806 vmcs_write64(TSC_OFFSET, vmx->nested.vmcs01_tsc_offset);
Nadav Har'Elfe3ef052011-05-25 23:10:02 +03006807
6808 if (enable_vpid) {
6809 /*
6810 * Trivially support vpid by letting L2s share their parent
6811 * L1's vpid. TODO: move to a more elaborate solution, giving
6812 * each L2 its own vpid and exposing the vpid feature to L1.
6813 */
6814 vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid);
6815 vmx_flush_tlb(vcpu);
6816 }
6817
6818 if (vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_EFER)
6819 vcpu->arch.efer = vmcs12->guest_ia32_efer;
6820 if (vmcs12->vm_entry_controls & VM_ENTRY_IA32E_MODE)
6821 vcpu->arch.efer |= (EFER_LMA | EFER_LME);
6822 else
6823 vcpu->arch.efer &= ~(EFER_LMA | EFER_LME);
6824 /* Note: modifies VM_ENTRY/EXIT_CONTROLS and GUEST/HOST_IA32_EFER */
6825 vmx_set_efer(vcpu, vcpu->arch.efer);
6826
6827 /*
6828 * This sets GUEST_CR0 to vmcs12->guest_cr0, with possibly a modified
6829 * TS bit (for lazy fpu) and bits which we consider mandatory enabled.
6830 * The CR0_READ_SHADOW is what L2 should have expected to read given
6831 * the specifications by L1; It's not enough to take
6832 * vmcs12->cr0_read_shadow because on our cr0_guest_host_mask we we
6833 * have more bits than L1 expected.
6834 */
6835 vmx_set_cr0(vcpu, vmcs12->guest_cr0);
6836 vmcs_writel(CR0_READ_SHADOW, nested_read_cr0(vmcs12));
6837
6838 vmx_set_cr4(vcpu, vmcs12->guest_cr4);
6839 vmcs_writel(CR4_READ_SHADOW, nested_read_cr4(vmcs12));
6840
6841 /* shadow page tables on either EPT or shadow page tables */
6842 kvm_set_cr3(vcpu, vmcs12->guest_cr3);
6843 kvm_mmu_reset_context(vcpu);
6844
6845 kvm_register_write(vcpu, VCPU_REGS_RSP, vmcs12->guest_rsp);
6846 kvm_register_write(vcpu, VCPU_REGS_RIP, vmcs12->guest_rip);
6847}
6848
Nadav Har'Elcd232ad2011-05-25 23:10:33 +03006849/*
6850 * nested_vmx_run() handles a nested entry, i.e., a VMLAUNCH or VMRESUME on L1
6851 * for running an L2 nested guest.
6852 */
6853static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch)
6854{
6855 struct vmcs12 *vmcs12;
6856 struct vcpu_vmx *vmx = to_vmx(vcpu);
6857 int cpu;
6858 struct loaded_vmcs *vmcs02;
6859
6860 if (!nested_vmx_check_permission(vcpu) ||
6861 !nested_vmx_check_vmcs12(vcpu))
6862 return 1;
6863
6864 skip_emulated_instruction(vcpu);
6865 vmcs12 = get_vmcs12(vcpu);
6866
Nadav Har'El7c177932011-05-25 23:12:04 +03006867 /*
6868 * The nested entry process starts with enforcing various prerequisites
6869 * on vmcs12 as required by the Intel SDM, and act appropriately when
6870 * they fail: As the SDM explains, some conditions should cause the
6871 * instruction to fail, while others will cause the instruction to seem
6872 * to succeed, but return an EXIT_REASON_INVALID_STATE.
6873 * To speed up the normal (success) code path, we should avoid checking
6874 * for misconfigurations which will anyway be caught by the processor
6875 * when using the merged vmcs02.
6876 */
6877 if (vmcs12->launch_state == launch) {
6878 nested_vmx_failValid(vcpu,
6879 launch ? VMXERR_VMLAUNCH_NONCLEAR_VMCS
6880 : VMXERR_VMRESUME_NONLAUNCHED_VMCS);
6881 return 1;
6882 }
6883
6884 if ((vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_MSR_BITMAPS) &&
6885 !IS_ALIGNED(vmcs12->msr_bitmap, PAGE_SIZE)) {
6886 /*TODO: Also verify bits beyond physical address width are 0*/
6887 nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
6888 return 1;
6889 }
6890
6891 if (nested_cpu_has2(vmcs12, SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES) &&
6892 !IS_ALIGNED(vmcs12->apic_access_addr, PAGE_SIZE)) {
6893 /*TODO: Also verify bits beyond physical address width are 0*/
6894 nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
6895 return 1;
6896 }
6897
6898 if (vmcs12->vm_entry_msr_load_count > 0 ||
6899 vmcs12->vm_exit_msr_load_count > 0 ||
6900 vmcs12->vm_exit_msr_store_count > 0) {
Jan Kiszkabd801582011-09-12 11:26:22 +02006901 pr_warn_ratelimited("%s: VMCS MSR_{LOAD,STORE} unsupported\n",
6902 __func__);
Nadav Har'El7c177932011-05-25 23:12:04 +03006903 nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
6904 return 1;
6905 }
6906
6907 if (!vmx_control_verify(vmcs12->cpu_based_vm_exec_control,
6908 nested_vmx_procbased_ctls_low, nested_vmx_procbased_ctls_high) ||
6909 !vmx_control_verify(vmcs12->secondary_vm_exec_control,
6910 nested_vmx_secondary_ctls_low, nested_vmx_secondary_ctls_high) ||
6911 !vmx_control_verify(vmcs12->pin_based_vm_exec_control,
6912 nested_vmx_pinbased_ctls_low, nested_vmx_pinbased_ctls_high) ||
6913 !vmx_control_verify(vmcs12->vm_exit_controls,
6914 nested_vmx_exit_ctls_low, nested_vmx_exit_ctls_high) ||
6915 !vmx_control_verify(vmcs12->vm_entry_controls,
6916 nested_vmx_entry_ctls_low, nested_vmx_entry_ctls_high))
6917 {
6918 nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
6919 return 1;
6920 }
6921
6922 if (((vmcs12->host_cr0 & VMXON_CR0_ALWAYSON) != VMXON_CR0_ALWAYSON) ||
6923 ((vmcs12->host_cr4 & VMXON_CR4_ALWAYSON) != VMXON_CR4_ALWAYSON)) {
6924 nested_vmx_failValid(vcpu,
6925 VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);
6926 return 1;
6927 }
6928
6929 if (((vmcs12->guest_cr0 & VMXON_CR0_ALWAYSON) != VMXON_CR0_ALWAYSON) ||
6930 ((vmcs12->guest_cr4 & VMXON_CR4_ALWAYSON) != VMXON_CR4_ALWAYSON)) {
6931 nested_vmx_entry_failure(vcpu, vmcs12,
6932 EXIT_REASON_INVALID_STATE, ENTRY_FAIL_DEFAULT);
6933 return 1;
6934 }
6935 if (vmcs12->vmcs_link_pointer != -1ull) {
6936 nested_vmx_entry_failure(vcpu, vmcs12,
6937 EXIT_REASON_INVALID_STATE, ENTRY_FAIL_VMCS_LINK_PTR);
6938 return 1;
6939 }
6940
6941 /*
6942 * We're finally done with prerequisite checking, and can start with
6943 * the nested entry.
6944 */
6945
Nadav Har'Elcd232ad2011-05-25 23:10:33 +03006946 vmcs02 = nested_get_current_vmcs02(vmx);
6947 if (!vmcs02)
6948 return -ENOMEM;
6949
6950 enter_guest_mode(vcpu);
6951
6952 vmx->nested.vmcs01_tsc_offset = vmcs_read64(TSC_OFFSET);
6953
6954 cpu = get_cpu();
6955 vmx->loaded_vmcs = vmcs02;
6956 vmx_vcpu_put(vcpu);
6957 vmx_vcpu_load(vcpu, cpu);
6958 vcpu->cpu = cpu;
6959 put_cpu();
6960
6961 vmcs12->launch_state = 1;
6962
6963 prepare_vmcs02(vcpu, vmcs12);
6964
6965 /*
6966 * Note no nested_vmx_succeed or nested_vmx_fail here. At this point
6967 * we are no longer running L1, and VMLAUNCH/VMRESUME has not yet
6968 * returned as far as L1 is concerned. It will only return (and set
6969 * the success flag) when L2 exits (see nested_vmx_vmexit()).
6970 */
6971 return 1;
6972}
6973
Nadav Har'El4704d0b2011-05-25 23:11:34 +03006974/*
6975 * On a nested exit from L2 to L1, vmcs12.guest_cr0 might not be up-to-date
6976 * because L2 may have changed some cr0 bits directly (CRO_GUEST_HOST_MASK).
6977 * This function returns the new value we should put in vmcs12.guest_cr0.
6978 * It's not enough to just return the vmcs02 GUEST_CR0. Rather,
6979 * 1. Bits that neither L0 nor L1 trapped, were set directly by L2 and are now
6980 * available in vmcs02 GUEST_CR0. (Note: It's enough to check that L0
6981 * didn't trap the bit, because if L1 did, so would L0).
6982 * 2. Bits that L1 asked to trap (and therefore L0 also did) could not have
6983 * been modified by L2, and L1 knows it. So just leave the old value of
6984 * the bit from vmcs12.guest_cr0. Note that the bit from vmcs02 GUEST_CR0
6985 * isn't relevant, because if L0 traps this bit it can set it to anything.
6986 * 3. Bits that L1 didn't trap, but L0 did. L1 believes the guest could have
6987 * changed these bits, and therefore they need to be updated, but L0
6988 * didn't necessarily allow them to be changed in GUEST_CR0 - and rather
6989 * put them in vmcs02 CR0_READ_SHADOW. So take these bits from there.
6990 */
6991static inline unsigned long
6992vmcs12_guest_cr0(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
6993{
6994 return
6995 /*1*/ (vmcs_readl(GUEST_CR0) & vcpu->arch.cr0_guest_owned_bits) |
6996 /*2*/ (vmcs12->guest_cr0 & vmcs12->cr0_guest_host_mask) |
6997 /*3*/ (vmcs_readl(CR0_READ_SHADOW) & ~(vmcs12->cr0_guest_host_mask |
6998 vcpu->arch.cr0_guest_owned_bits));
6999}
7000
7001static inline unsigned long
7002vmcs12_guest_cr4(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
7003{
7004 return
7005 /*1*/ (vmcs_readl(GUEST_CR4) & vcpu->arch.cr4_guest_owned_bits) |
7006 /*2*/ (vmcs12->guest_cr4 & vmcs12->cr4_guest_host_mask) |
7007 /*3*/ (vmcs_readl(CR4_READ_SHADOW) & ~(vmcs12->cr4_guest_host_mask |
7008 vcpu->arch.cr4_guest_owned_bits));
7009}
7010
7011/*
7012 * prepare_vmcs12 is part of what we need to do when the nested L2 guest exits
7013 * and we want to prepare to run its L1 parent. L1 keeps a vmcs for L2 (vmcs12),
7014 * and this function updates it to reflect the changes to the guest state while
7015 * L2 was running (and perhaps made some exits which were handled directly by L0
7016 * without going back to L1), and to reflect the exit reason.
7017 * Note that we do not have to copy here all VMCS fields, just those that
7018 * could have changed by the L2 guest or the exit - i.e., the guest-state and
7019 * exit-information fields only. Other fields are modified by L1 with VMWRITE,
7020 * which already writes to vmcs12 directly.
7021 */
7022void prepare_vmcs12(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
7023{
7024 /* update guest state fields: */
7025 vmcs12->guest_cr0 = vmcs12_guest_cr0(vcpu, vmcs12);
7026 vmcs12->guest_cr4 = vmcs12_guest_cr4(vcpu, vmcs12);
7027
7028 kvm_get_dr(vcpu, 7, (unsigned long *)&vmcs12->guest_dr7);
7029 vmcs12->guest_rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7030 vmcs12->guest_rip = kvm_register_read(vcpu, VCPU_REGS_RIP);
7031 vmcs12->guest_rflags = vmcs_readl(GUEST_RFLAGS);
7032
7033 vmcs12->guest_es_selector = vmcs_read16(GUEST_ES_SELECTOR);
7034 vmcs12->guest_cs_selector = vmcs_read16(GUEST_CS_SELECTOR);
7035 vmcs12->guest_ss_selector = vmcs_read16(GUEST_SS_SELECTOR);
7036 vmcs12->guest_ds_selector = vmcs_read16(GUEST_DS_SELECTOR);
7037 vmcs12->guest_fs_selector = vmcs_read16(GUEST_FS_SELECTOR);
7038 vmcs12->guest_gs_selector = vmcs_read16(GUEST_GS_SELECTOR);
7039 vmcs12->guest_ldtr_selector = vmcs_read16(GUEST_LDTR_SELECTOR);
7040 vmcs12->guest_tr_selector = vmcs_read16(GUEST_TR_SELECTOR);
7041 vmcs12->guest_es_limit = vmcs_read32(GUEST_ES_LIMIT);
7042 vmcs12->guest_cs_limit = vmcs_read32(GUEST_CS_LIMIT);
7043 vmcs12->guest_ss_limit = vmcs_read32(GUEST_SS_LIMIT);
7044 vmcs12->guest_ds_limit = vmcs_read32(GUEST_DS_LIMIT);
7045 vmcs12->guest_fs_limit = vmcs_read32(GUEST_FS_LIMIT);
7046 vmcs12->guest_gs_limit = vmcs_read32(GUEST_GS_LIMIT);
7047 vmcs12->guest_ldtr_limit = vmcs_read32(GUEST_LDTR_LIMIT);
7048 vmcs12->guest_tr_limit = vmcs_read32(GUEST_TR_LIMIT);
7049 vmcs12->guest_gdtr_limit = vmcs_read32(GUEST_GDTR_LIMIT);
7050 vmcs12->guest_idtr_limit = vmcs_read32(GUEST_IDTR_LIMIT);
7051 vmcs12->guest_es_ar_bytes = vmcs_read32(GUEST_ES_AR_BYTES);
7052 vmcs12->guest_cs_ar_bytes = vmcs_read32(GUEST_CS_AR_BYTES);
7053 vmcs12->guest_ss_ar_bytes = vmcs_read32(GUEST_SS_AR_BYTES);
7054 vmcs12->guest_ds_ar_bytes = vmcs_read32(GUEST_DS_AR_BYTES);
7055 vmcs12->guest_fs_ar_bytes = vmcs_read32(GUEST_FS_AR_BYTES);
7056 vmcs12->guest_gs_ar_bytes = vmcs_read32(GUEST_GS_AR_BYTES);
7057 vmcs12->guest_ldtr_ar_bytes = vmcs_read32(GUEST_LDTR_AR_BYTES);
7058 vmcs12->guest_tr_ar_bytes = vmcs_read32(GUEST_TR_AR_BYTES);
7059 vmcs12->guest_es_base = vmcs_readl(GUEST_ES_BASE);
7060 vmcs12->guest_cs_base = vmcs_readl(GUEST_CS_BASE);
7061 vmcs12->guest_ss_base = vmcs_readl(GUEST_SS_BASE);
7062 vmcs12->guest_ds_base = vmcs_readl(GUEST_DS_BASE);
7063 vmcs12->guest_fs_base = vmcs_readl(GUEST_FS_BASE);
7064 vmcs12->guest_gs_base = vmcs_readl(GUEST_GS_BASE);
7065 vmcs12->guest_ldtr_base = vmcs_readl(GUEST_LDTR_BASE);
7066 vmcs12->guest_tr_base = vmcs_readl(GUEST_TR_BASE);
7067 vmcs12->guest_gdtr_base = vmcs_readl(GUEST_GDTR_BASE);
7068 vmcs12->guest_idtr_base = vmcs_readl(GUEST_IDTR_BASE);
7069
7070 vmcs12->guest_activity_state = vmcs_read32(GUEST_ACTIVITY_STATE);
7071 vmcs12->guest_interruptibility_info =
7072 vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
7073 vmcs12->guest_pending_dbg_exceptions =
7074 vmcs_readl(GUEST_PENDING_DBG_EXCEPTIONS);
7075
7076 /* TODO: These cannot have changed unless we have MSR bitmaps and
7077 * the relevant bit asks not to trap the change */
7078 vmcs12->guest_ia32_debugctl = vmcs_read64(GUEST_IA32_DEBUGCTL);
7079 if (vmcs12->vm_entry_controls & VM_EXIT_SAVE_IA32_PAT)
7080 vmcs12->guest_ia32_pat = vmcs_read64(GUEST_IA32_PAT);
7081 vmcs12->guest_sysenter_cs = vmcs_read32(GUEST_SYSENTER_CS);
7082 vmcs12->guest_sysenter_esp = vmcs_readl(GUEST_SYSENTER_ESP);
7083 vmcs12->guest_sysenter_eip = vmcs_readl(GUEST_SYSENTER_EIP);
7084
7085 /* update exit information fields: */
7086
7087 vmcs12->vm_exit_reason = vmcs_read32(VM_EXIT_REASON);
7088 vmcs12->exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
7089
7090 vmcs12->vm_exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
7091 vmcs12->vm_exit_intr_error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
7092 vmcs12->idt_vectoring_info_field =
7093 vmcs_read32(IDT_VECTORING_INFO_FIELD);
7094 vmcs12->idt_vectoring_error_code =
7095 vmcs_read32(IDT_VECTORING_ERROR_CODE);
7096 vmcs12->vm_exit_instruction_len = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
7097 vmcs12->vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
7098
7099 /* clear vm-entry fields which are to be cleared on exit */
7100 if (!(vmcs12->vm_exit_reason & VMX_EXIT_REASONS_FAILED_VMENTRY))
7101 vmcs12->vm_entry_intr_info_field &= ~INTR_INFO_VALID_MASK;
7102}
7103
7104/*
7105 * A part of what we need to when the nested L2 guest exits and we want to
7106 * run its L1 parent, is to reset L1's guest state to the host state specified
7107 * in vmcs12.
7108 * This function is to be called not only on normal nested exit, but also on
7109 * a nested entry failure, as explained in Intel's spec, 3B.23.7 ("VM-Entry
7110 * Failures During or After Loading Guest State").
7111 * This function should be called when the active VMCS is L1's (vmcs01).
7112 */
7113void load_vmcs12_host_state(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
7114{
7115 if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_EFER)
7116 vcpu->arch.efer = vmcs12->host_ia32_efer;
7117 if (vmcs12->vm_exit_controls & VM_EXIT_HOST_ADDR_SPACE_SIZE)
7118 vcpu->arch.efer |= (EFER_LMA | EFER_LME);
7119 else
7120 vcpu->arch.efer &= ~(EFER_LMA | EFER_LME);
7121 vmx_set_efer(vcpu, vcpu->arch.efer);
7122
7123 kvm_register_write(vcpu, VCPU_REGS_RSP, vmcs12->host_rsp);
7124 kvm_register_write(vcpu, VCPU_REGS_RIP, vmcs12->host_rip);
7125 /*
7126 * Note that calling vmx_set_cr0 is important, even if cr0 hasn't
7127 * actually changed, because it depends on the current state of
7128 * fpu_active (which may have changed).
7129 * Note that vmx_set_cr0 refers to efer set above.
7130 */
7131 kvm_set_cr0(vcpu, vmcs12->host_cr0);
7132 /*
7133 * If we did fpu_activate()/fpu_deactivate() during L2's run, we need
7134 * to apply the same changes to L1's vmcs. We just set cr0 correctly,
7135 * but we also need to update cr0_guest_host_mask and exception_bitmap.
7136 */
7137 update_exception_bitmap(vcpu);
7138 vcpu->arch.cr0_guest_owned_bits = (vcpu->fpu_active ? X86_CR0_TS : 0);
7139 vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
7140
7141 /*
7142 * Note that CR4_GUEST_HOST_MASK is already set in the original vmcs01
7143 * (KVM doesn't change it)- no reason to call set_cr4_guest_host_mask();
7144 */
7145 vcpu->arch.cr4_guest_owned_bits = ~vmcs_readl(CR4_GUEST_HOST_MASK);
7146 kvm_set_cr4(vcpu, vmcs12->host_cr4);
7147
7148 /* shadow page tables on either EPT or shadow page tables */
7149 kvm_set_cr3(vcpu, vmcs12->host_cr3);
7150 kvm_mmu_reset_context(vcpu);
7151
7152 if (enable_vpid) {
7153 /*
7154 * Trivially support vpid by letting L2s share their parent
7155 * L1's vpid. TODO: move to a more elaborate solution, giving
7156 * each L2 its own vpid and exposing the vpid feature to L1.
7157 */
7158 vmx_flush_tlb(vcpu);
7159 }
7160
7161
7162 vmcs_write32(GUEST_SYSENTER_CS, vmcs12->host_ia32_sysenter_cs);
7163 vmcs_writel(GUEST_SYSENTER_ESP, vmcs12->host_ia32_sysenter_esp);
7164 vmcs_writel(GUEST_SYSENTER_EIP, vmcs12->host_ia32_sysenter_eip);
7165 vmcs_writel(GUEST_IDTR_BASE, vmcs12->host_idtr_base);
7166 vmcs_writel(GUEST_GDTR_BASE, vmcs12->host_gdtr_base);
7167 vmcs_writel(GUEST_TR_BASE, vmcs12->host_tr_base);
7168 vmcs_writel(GUEST_GS_BASE, vmcs12->host_gs_base);
7169 vmcs_writel(GUEST_FS_BASE, vmcs12->host_fs_base);
7170 vmcs_write16(GUEST_ES_SELECTOR, vmcs12->host_es_selector);
7171 vmcs_write16(GUEST_CS_SELECTOR, vmcs12->host_cs_selector);
7172 vmcs_write16(GUEST_SS_SELECTOR, vmcs12->host_ss_selector);
7173 vmcs_write16(GUEST_DS_SELECTOR, vmcs12->host_ds_selector);
7174 vmcs_write16(GUEST_FS_SELECTOR, vmcs12->host_fs_selector);
7175 vmcs_write16(GUEST_GS_SELECTOR, vmcs12->host_gs_selector);
7176 vmcs_write16(GUEST_TR_SELECTOR, vmcs12->host_tr_selector);
7177
7178 if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PAT)
7179 vmcs_write64(GUEST_IA32_PAT, vmcs12->host_ia32_pat);
7180 if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL)
7181 vmcs_write64(GUEST_IA32_PERF_GLOBAL_CTRL,
7182 vmcs12->host_ia32_perf_global_ctrl);
7183}
7184
7185/*
7186 * Emulate an exit from nested guest (L2) to L1, i.e., prepare to run L1
7187 * and modify vmcs12 to make it see what it would expect to see there if
7188 * L2 was its real guest. Must only be called when in L2 (is_guest_mode())
7189 */
7190static void nested_vmx_vmexit(struct kvm_vcpu *vcpu)
7191{
7192 struct vcpu_vmx *vmx = to_vmx(vcpu);
7193 int cpu;
7194 struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
7195
7196 leave_guest_mode(vcpu);
7197 prepare_vmcs12(vcpu, vmcs12);
7198
7199 cpu = get_cpu();
7200 vmx->loaded_vmcs = &vmx->vmcs01;
7201 vmx_vcpu_put(vcpu);
7202 vmx_vcpu_load(vcpu, cpu);
7203 vcpu->cpu = cpu;
7204 put_cpu();
7205
7206 /* if no vmcs02 cache requested, remove the one we used */
7207 if (VMCS02_POOL_SIZE == 0)
7208 nested_free_vmcs02(vmx, vmx->nested.current_vmptr);
7209
7210 load_vmcs12_host_state(vcpu, vmcs12);
7211
Nadav Har'El27fc51b2011-08-02 15:54:52 +03007212 /* Update TSC_OFFSET if TSC was changed while L2 ran */
Nadav Har'El4704d0b2011-05-25 23:11:34 +03007213 vmcs_write64(TSC_OFFSET, vmx->nested.vmcs01_tsc_offset);
7214
7215 /* This is needed for same reason as it was needed in prepare_vmcs02 */
7216 vmx->host_rsp = 0;
7217
7218 /* Unpin physical memory we referred to in vmcs02 */
7219 if (vmx->nested.apic_access_page) {
7220 nested_release_page(vmx->nested.apic_access_page);
7221 vmx->nested.apic_access_page = 0;
7222 }
7223
7224 /*
7225 * Exiting from L2 to L1, we're now back to L1 which thinks it just
7226 * finished a VMLAUNCH or VMRESUME instruction, so we need to set the
7227 * success or failure flag accordingly.
7228 */
7229 if (unlikely(vmx->fail)) {
7230 vmx->fail = 0;
7231 nested_vmx_failValid(vcpu, vmcs_read32(VM_INSTRUCTION_ERROR));
7232 } else
7233 nested_vmx_succeed(vcpu);
7234}
7235
Nadav Har'El7c177932011-05-25 23:12:04 +03007236/*
7237 * L1's failure to enter L2 is a subset of a normal exit, as explained in
7238 * 23.7 "VM-entry failures during or after loading guest state" (this also
7239 * lists the acceptable exit-reason and exit-qualification parameters).
7240 * It should only be called before L2 actually succeeded to run, and when
7241 * vmcs01 is current (it doesn't leave_guest_mode() or switch vmcss).
7242 */
7243static void nested_vmx_entry_failure(struct kvm_vcpu *vcpu,
7244 struct vmcs12 *vmcs12,
7245 u32 reason, unsigned long qualification)
7246{
7247 load_vmcs12_host_state(vcpu, vmcs12);
7248 vmcs12->vm_exit_reason = reason | VMX_EXIT_REASONS_FAILED_VMENTRY;
7249 vmcs12->exit_qualification = qualification;
7250 nested_vmx_succeed(vcpu);
7251}
7252
Joerg Roedel8a76d7f2011-04-04 12:39:27 +02007253static int vmx_check_intercept(struct kvm_vcpu *vcpu,
7254 struct x86_instruction_info *info,
7255 enum x86_intercept_stage stage)
7256{
7257 return X86EMUL_CONTINUE;
7258}
7259
Christian Ehrhardtcbdd1be2007-09-09 15:41:59 +03007260static struct kvm_x86_ops vmx_x86_ops = {
Avi Kivity6aa8b732006-12-10 02:21:36 -08007261 .cpu_has_kvm_support = cpu_has_kvm_support,
7262 .disabled_by_bios = vmx_disabled_by_bios,
7263 .hardware_setup = hardware_setup,
7264 .hardware_unsetup = hardware_unsetup,
Yang, Sheng002c7f72007-07-31 14:23:01 +03007265 .check_processor_compatibility = vmx_check_processor_compat,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007266 .hardware_enable = hardware_enable,
7267 .hardware_disable = hardware_disable,
Sheng Yang04547152009-04-01 15:52:31 +08007268 .cpu_has_accelerated_tpr = report_flexpriority,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007269
7270 .vcpu_create = vmx_create_vcpu,
7271 .vcpu_free = vmx_free_vcpu,
Avi Kivity04d2cc72007-09-10 18:10:54 +03007272 .vcpu_reset = vmx_vcpu_reset,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007273
Avi Kivity04d2cc72007-09-10 18:10:54 +03007274 .prepare_guest_switch = vmx_save_host_state,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007275 .vcpu_load = vmx_vcpu_load,
7276 .vcpu_put = vmx_vcpu_put,
7277
7278 .set_guest_debug = set_guest_debug,
7279 .get_msr = vmx_get_msr,
7280 .set_msr = vmx_set_msr,
7281 .get_segment_base = vmx_get_segment_base,
7282 .get_segment = vmx_get_segment,
7283 .set_segment = vmx_set_segment,
Izik Eidus2e4d2652008-03-24 19:38:34 +02007284 .get_cpl = vmx_get_cpl,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007285 .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
Avi Kivitye8467fd2009-12-29 18:43:06 +02007286 .decache_cr0_guest_bits = vmx_decache_cr0_guest_bits,
Avi Kivityaff48ba2010-12-05 18:56:11 +02007287 .decache_cr3 = vmx_decache_cr3,
Anthony Liguori25c4c272007-04-27 09:29:21 +03007288 .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007289 .set_cr0 = vmx_set_cr0,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007290 .set_cr3 = vmx_set_cr3,
7291 .set_cr4 = vmx_set_cr4,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007292 .set_efer = vmx_set_efer,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007293 .get_idt = vmx_get_idt,
7294 .set_idt = vmx_set_idt,
7295 .get_gdt = vmx_get_gdt,
7296 .set_gdt = vmx_set_gdt,
Gleb Natapov020df072010-04-13 10:05:23 +03007297 .set_dr7 = vmx_set_dr7,
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03007298 .cache_reg = vmx_cache_reg,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007299 .get_rflags = vmx_get_rflags,
7300 .set_rflags = vmx_set_rflags,
Avi Kivityebcbab42010-02-07 11:56:52 +02007301 .fpu_activate = vmx_fpu_activate,
Avi Kivity02daab22009-12-30 12:40:26 +02007302 .fpu_deactivate = vmx_fpu_deactivate,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007303
7304 .tlb_flush = vmx_flush_tlb,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007305
Avi Kivity6aa8b732006-12-10 02:21:36 -08007306 .run = vmx_vcpu_run,
Avi Kivity6062d012009-03-23 17:35:17 +02007307 .handle_exit = vmx_handle_exit,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007308 .skip_emulated_instruction = skip_emulated_instruction,
Glauber Costa2809f5d2009-05-12 16:21:05 -04007309 .set_interrupt_shadow = vmx_set_interrupt_shadow,
7310 .get_interrupt_shadow = vmx_get_interrupt_shadow,
Ingo Molnar102d8322007-02-19 14:37:47 +02007311 .patch_hypercall = vmx_patch_hypercall,
Eddie Dong2a8067f2007-08-06 16:29:07 +03007312 .set_irq = vmx_inject_irq,
Gleb Natapov95ba8273132009-04-21 17:45:08 +03007313 .set_nmi = vmx_inject_nmi,
Avi Kivity298101d2007-11-25 13:41:11 +02007314 .queue_exception = vmx_queue_exception,
Avi Kivityb463a6f2010-07-20 15:06:17 +03007315 .cancel_injection = vmx_cancel_injection,
Gleb Natapov78646122009-03-23 12:12:11 +02007316 .interrupt_allowed = vmx_interrupt_allowed,
Gleb Natapov95ba8273132009-04-21 17:45:08 +03007317 .nmi_allowed = vmx_nmi_allowed,
Jan Kiszka3cfc3092009-11-12 01:04:25 +01007318 .get_nmi_mask = vmx_get_nmi_mask,
7319 .set_nmi_mask = vmx_set_nmi_mask,
Gleb Natapov95ba8273132009-04-21 17:45:08 +03007320 .enable_nmi_window = enable_nmi_window,
7321 .enable_irq_window = enable_irq_window,
7322 .update_cr8_intercept = update_cr8_intercept,
Gleb Natapov95ba8273132009-04-21 17:45:08 +03007323
Izik Eiduscbc94022007-10-25 00:29:55 +02007324 .set_tss_addr = vmx_set_tss_addr,
Sheng Yang67253af2008-04-25 10:20:22 +08007325 .get_tdp_level = get_ept_level,
Sheng Yang4b12f0d2009-04-27 20:35:42 +08007326 .get_mt_mask = vmx_get_mt_mask,
Marcelo Tosatti229456f2009-06-17 09:22:14 -03007327
Avi Kivity586f9602010-11-18 13:09:54 +02007328 .get_exit_info = vmx_get_exit_info,
Avi Kivity586f9602010-11-18 13:09:54 +02007329
Sheng Yang17cc3932010-01-05 19:02:27 +08007330 .get_lpage_level = vmx_get_lpage_level,
Sheng Yang0e851882009-12-18 16:48:46 +08007331
7332 .cpuid_update = vmx_cpuid_update,
Sheng Yang4e47c7a2009-12-18 16:48:47 +08007333
7334 .rdtscp_supported = vmx_rdtscp_supported,
Mao, Junjiead756a12012-07-02 01:18:48 +00007335 .invpcid_supported = vmx_invpcid_supported,
Joerg Roedeld4330ef2010-04-22 12:33:11 +02007336
7337 .set_supported_cpuid = vmx_set_supported_cpuid,
Sheng Yangf5f48ee2010-06-30 12:25:15 +08007338
7339 .has_wbinvd_exit = cpu_has_vmx_wbinvd_exit,
Zachary Amsden99e3e302010-08-19 22:07:17 -10007340
Joerg Roedel4051b182011-03-25 09:44:49 +01007341 .set_tsc_khz = vmx_set_tsc_khz,
Zachary Amsden99e3e302010-08-19 22:07:17 -10007342 .write_tsc_offset = vmx_write_tsc_offset,
Zachary Amsdene48672f2010-08-19 22:07:23 -10007343 .adjust_tsc_offset = vmx_adjust_tsc_offset,
Joerg Roedel857e4092011-03-25 09:44:50 +01007344 .compute_tsc_offset = vmx_compute_tsc_offset,
Nadav Har'Eld5c17852011-08-02 15:54:20 +03007345 .read_l1_tsc = vmx_read_l1_tsc,
Joerg Roedel1c97f0a2010-09-10 17:30:41 +02007346
7347 .set_tdp_cr3 = vmx_set_cr3,
Joerg Roedel8a76d7f2011-04-04 12:39:27 +02007348
7349 .check_intercept = vmx_check_intercept,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007350};
7351
7352static int __init vmx_init(void)
7353{
Avi Kivity26bb0982009-09-07 11:14:12 +03007354 int r, i;
7355
7356 rdmsrl_safe(MSR_EFER, &host_efer);
7357
7358 for (i = 0; i < NR_VMX_MSR; ++i)
7359 kvm_define_shared_msr(i, vmx_msr_index[i]);
He, Qingfdef3ad2007-04-30 09:45:24 +03007360
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007361 vmx_io_bitmap_a = (unsigned long *)__get_free_page(GFP_KERNEL);
He, Qingfdef3ad2007-04-30 09:45:24 +03007362 if (!vmx_io_bitmap_a)
7363 return -ENOMEM;
7364
Guo Chao2106a542012-06-15 11:31:56 +08007365 r = -ENOMEM;
7366
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007367 vmx_io_bitmap_b = (unsigned long *)__get_free_page(GFP_KERNEL);
Guo Chao2106a542012-06-15 11:31:56 +08007368 if (!vmx_io_bitmap_b)
He, Qingfdef3ad2007-04-30 09:45:24 +03007369 goto out;
He, Qingfdef3ad2007-04-30 09:45:24 +03007370
Avi Kivity58972972009-02-24 22:26:47 +02007371 vmx_msr_bitmap_legacy = (unsigned long *)__get_free_page(GFP_KERNEL);
Guo Chao2106a542012-06-15 11:31:56 +08007372 if (!vmx_msr_bitmap_legacy)
Sheng Yang25c5f222008-03-28 13:18:56 +08007373 goto out1;
Guo Chao2106a542012-06-15 11:31:56 +08007374
Sheng Yang25c5f222008-03-28 13:18:56 +08007375
Avi Kivity58972972009-02-24 22:26:47 +02007376 vmx_msr_bitmap_longmode = (unsigned long *)__get_free_page(GFP_KERNEL);
Guo Chao2106a542012-06-15 11:31:56 +08007377 if (!vmx_msr_bitmap_longmode)
Avi Kivity58972972009-02-24 22:26:47 +02007378 goto out2;
Guo Chao2106a542012-06-15 11:31:56 +08007379
Avi Kivity58972972009-02-24 22:26:47 +02007380
He, Qingfdef3ad2007-04-30 09:45:24 +03007381 /*
7382 * Allow direct access to the PC debug port (it is often used for I/O
7383 * delays, but the vmexits simply slow things down).
7384 */
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007385 memset(vmx_io_bitmap_a, 0xff, PAGE_SIZE);
7386 clear_bit(0x80, vmx_io_bitmap_a);
He, Qingfdef3ad2007-04-30 09:45:24 +03007387
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007388 memset(vmx_io_bitmap_b, 0xff, PAGE_SIZE);
He, Qingfdef3ad2007-04-30 09:45:24 +03007389
Avi Kivity58972972009-02-24 22:26:47 +02007390 memset(vmx_msr_bitmap_legacy, 0xff, PAGE_SIZE);
7391 memset(vmx_msr_bitmap_longmode, 0xff, PAGE_SIZE);
Sheng Yang25c5f222008-03-28 13:18:56 +08007392
Sheng Yang2384d2b2008-01-17 15:14:33 +08007393 set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */
7394
Avi Kivity0ee75be2010-04-28 15:39:01 +03007395 r = kvm_init(&vmx_x86_ops, sizeof(struct vcpu_vmx),
7396 __alignof__(struct vcpu_vmx), THIS_MODULE);
He, Qingfdef3ad2007-04-30 09:45:24 +03007397 if (r)
Avi Kivity58972972009-02-24 22:26:47 +02007398 goto out3;
Sheng Yang25c5f222008-03-28 13:18:56 +08007399
Avi Kivity58972972009-02-24 22:26:47 +02007400 vmx_disable_intercept_for_msr(MSR_FS_BASE, false);
7401 vmx_disable_intercept_for_msr(MSR_GS_BASE, false);
7402 vmx_disable_intercept_for_msr(MSR_KERNEL_GS_BASE, true);
7403 vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_CS, false);
7404 vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_ESP, false);
7405 vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_EIP, false);
He, Qingfdef3ad2007-04-30 09:45:24 +03007406
Avi Kivity089d0342009-03-23 18:26:32 +02007407 if (enable_ept) {
Xudong Hao3f6d8c82012-05-22 11:23:15 +08007408 kvm_mmu_set_mask_ptes(0ull,
7409 (enable_ept_ad_bits) ? VMX_EPT_ACCESS_BIT : 0ull,
7410 (enable_ept_ad_bits) ? VMX_EPT_DIRTY_BIT : 0ull,
7411 0ull, VMX_EPT_EXECUTABLE_MASK);
Xiao Guangrongce88dec2011-07-12 03:33:44 +08007412 ept_set_mmio_spte_mask();
Sheng Yang5fdbcb92008-07-16 09:25:40 +08007413 kvm_enable_tdp();
7414 } else
7415 kvm_disable_tdp();
Sheng Yang14394422008-04-28 12:24:45 +08007416
He, Qingfdef3ad2007-04-30 09:45:24 +03007417 return 0;
7418
Avi Kivity58972972009-02-24 22:26:47 +02007419out3:
7420 free_page((unsigned long)vmx_msr_bitmap_longmode);
Sheng Yang25c5f222008-03-28 13:18:56 +08007421out2:
Avi Kivity58972972009-02-24 22:26:47 +02007422 free_page((unsigned long)vmx_msr_bitmap_legacy);
He, Qingfdef3ad2007-04-30 09:45:24 +03007423out1:
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007424 free_page((unsigned long)vmx_io_bitmap_b);
He, Qingfdef3ad2007-04-30 09:45:24 +03007425out:
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007426 free_page((unsigned long)vmx_io_bitmap_a);
He, Qingfdef3ad2007-04-30 09:45:24 +03007427 return r;
Avi Kivity6aa8b732006-12-10 02:21:36 -08007428}
7429
7430static void __exit vmx_exit(void)
7431{
Avi Kivity58972972009-02-24 22:26:47 +02007432 free_page((unsigned long)vmx_msr_bitmap_legacy);
7433 free_page((unsigned long)vmx_msr_bitmap_longmode);
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007434 free_page((unsigned long)vmx_io_bitmap_b);
7435 free_page((unsigned long)vmx_io_bitmap_a);
He, Qingfdef3ad2007-04-30 09:45:24 +03007436
Zhang Xiantaocb498ea2007-11-14 20:39:31 +08007437 kvm_exit();
Avi Kivity6aa8b732006-12-10 02:21:36 -08007438}
7439
7440module_init(vmx_init)
7441module_exit(vmx_exit)