blob: 56f7ced16f1aab26fc40434de53d5d18be5b75f0 [file] [log] [blame]
Ben Gamari20172632009-02-17 20:08:50 -05001/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
Chris Wilsonf3cd4742009-10-13 22:20:20 +010030#include <linux/debugfs.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Ben Gamari20172632009-02-17 20:08:50 -050032#include "drmP.h"
33#include "drm.h"
Simon Farnsworth4e5359c2010-09-01 17:47:52 +010034#include "intel_drv.h"
Ben Gamari20172632009-02-17 20:08:50 -050035#include "i915_drm.h"
36#include "i915_drv.h"
37
38#define DRM_I915_RING_DEBUG 1
39
40
41#if defined(CONFIG_DEBUG_FS)
42
Chris Wilsonf13d3f72010-09-20 17:36:15 +010043enum {
Chris Wilson69dc4982010-10-19 10:36:51 +010044 ACTIVE_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010045 FLUSHING_LIST,
46 INACTIVE_LIST,
Chris Wilsond21d5972010-09-26 11:19:33 +010047 PINNED_LIST,
48 DEFERRED_FREE_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010049};
Ben Gamari433e12f2009-02-17 20:08:51 -050050
Chris Wilsonc2c347a92010-10-27 15:11:53 +010051enum {
52 RENDER_RING,
53 BSD_RING,
54 BLT_RING,
55};
56
Chris Wilson70d39fe2010-08-25 16:03:34 +010057static const char *yesno(int v)
58{
59 return v ? "yes" : "no";
60}
61
62static int i915_capabilities(struct seq_file *m, void *data)
63{
64 struct drm_info_node *node = (struct drm_info_node *) m->private;
65 struct drm_device *dev = node->minor->dev;
66 const struct intel_device_info *info = INTEL_INFO(dev);
67
68 seq_printf(m, "gen: %d\n", info->gen);
69#define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
70 B(is_mobile);
Chris Wilson70d39fe2010-08-25 16:03:34 +010071 B(is_i85x);
72 B(is_i915g);
Chris Wilson70d39fe2010-08-25 16:03:34 +010073 B(is_i945gm);
Chris Wilson70d39fe2010-08-25 16:03:34 +010074 B(is_g33);
75 B(need_gfx_hws);
76 B(is_g4x);
77 B(is_pineview);
78 B(is_broadwater);
79 B(is_crestline);
Chris Wilson70d39fe2010-08-25 16:03:34 +010080 B(has_fbc);
81 B(has_rc6);
82 B(has_pipe_cxsr);
83 B(has_hotplug);
84 B(cursor_needs_physical);
85 B(has_overlay);
86 B(overlay_needs_physical);
Chris Wilsona6c45cf2010-09-17 00:32:17 +010087 B(supports_tv);
Chris Wilson549f7362010-10-19 11:19:32 +010088 B(has_bsd_ring);
89 B(has_blt_ring);
Chris Wilson70d39fe2010-08-25 16:03:34 +010090#undef B
91
92 return 0;
93}
Ben Gamari433e12f2009-02-17 20:08:51 -050094
Chris Wilsona6172a82009-02-11 14:26:38 +000095static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
96{
97 if (obj_priv->user_pin_count > 0)
98 return "P";
99 else if (obj_priv->pin_count > 0)
100 return "p";
101 else
102 return " ";
103}
104
105static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
106{
107 switch (obj_priv->tiling_mode) {
108 default:
109 case I915_TILING_NONE: return " ";
110 case I915_TILING_X: return "X";
111 case I915_TILING_Y: return "Y";
112 }
113}
114
Chris Wilson37811fc2010-08-25 22:45:57 +0100115static void
116describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
117{
118 seq_printf(m, "%p: %s%s %8zd %08x %08x %d%s%s",
119 &obj->base,
120 get_pin_flag(obj),
121 get_tiling_flag(obj),
122 obj->base.size,
123 obj->base.read_domains,
124 obj->base.write_domain,
125 obj->last_rendering_seqno,
126 obj->dirty ? " dirty" : "",
127 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
128 if (obj->base.name)
129 seq_printf(m, " (name: %d)", obj->base.name);
130 if (obj->fence_reg != I915_FENCE_REG_NONE)
131 seq_printf(m, " (fence: %d)", obj->fence_reg);
132 if (obj->gtt_space != NULL)
Chris Wilsona00b10c2010-09-24 21:15:47 +0100133 seq_printf(m, " (gtt offset: %08x, size: %08x)",
134 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
Daniel Vetterfb7d5162010-10-01 22:05:20 +0200135 if (obj->pin_mappable || obj->fault_mappable)
136 seq_printf(m, " (mappable)");
Chris Wilson69dc4982010-10-19 10:36:51 +0100137 if (obj->ring != NULL)
138 seq_printf(m, " (%s)", obj->ring->name);
Chris Wilson37811fc2010-08-25 22:45:57 +0100139}
140
Ben Gamari433e12f2009-02-17 20:08:51 -0500141static int i915_gem_object_list_info(struct seq_file *m, void *data)
Ben Gamari20172632009-02-17 20:08:50 -0500142{
143 struct drm_info_node *node = (struct drm_info_node *) m->private;
Ben Gamari433e12f2009-02-17 20:08:51 -0500144 uintptr_t list = (uintptr_t) node->info_ent->data;
145 struct list_head *head;
Ben Gamari20172632009-02-17 20:08:50 -0500146 struct drm_device *dev = node->minor->dev;
147 drm_i915_private_t *dev_priv = dev->dev_private;
148 struct drm_i915_gem_object *obj_priv;
Chris Wilson8f2480f2010-09-26 11:44:19 +0100149 size_t total_obj_size, total_gtt_size;
150 int count, ret;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100151
152 ret = mutex_lock_interruptible(&dev->struct_mutex);
153 if (ret)
154 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500155
Ben Gamari433e12f2009-02-17 20:08:51 -0500156 switch (list) {
157 case ACTIVE_LIST:
158 seq_printf(m, "Active:\n");
Chris Wilson69dc4982010-10-19 10:36:51 +0100159 head = &dev_priv->mm.active_list;
Ben Gamari433e12f2009-02-17 20:08:51 -0500160 break;
161 case INACTIVE_LIST:
Ben Gamaria17458f2009-07-01 15:01:36 -0400162 seq_printf(m, "Inactive:\n");
Ben Gamari433e12f2009-02-17 20:08:51 -0500163 head = &dev_priv->mm.inactive_list;
164 break;
Chris Wilsonf13d3f72010-09-20 17:36:15 +0100165 case PINNED_LIST:
166 seq_printf(m, "Pinned:\n");
167 head = &dev_priv->mm.pinned_list;
168 break;
Ben Gamari433e12f2009-02-17 20:08:51 -0500169 case FLUSHING_LIST:
170 seq_printf(m, "Flushing:\n");
171 head = &dev_priv->mm.flushing_list;
172 break;
Chris Wilsond21d5972010-09-26 11:19:33 +0100173 case DEFERRED_FREE_LIST:
174 seq_printf(m, "Deferred free:\n");
175 head = &dev_priv->mm.deferred_free_list;
176 break;
Ben Gamari433e12f2009-02-17 20:08:51 -0500177 default:
Chris Wilsonde227ef2010-07-03 07:58:38 +0100178 mutex_unlock(&dev->struct_mutex);
179 return -EINVAL;
Ben Gamari433e12f2009-02-17 20:08:51 -0500180 }
181
Chris Wilson8f2480f2010-09-26 11:44:19 +0100182 total_obj_size = total_gtt_size = count = 0;
Chris Wilson69dc4982010-10-19 10:36:51 +0100183 list_for_each_entry(obj_priv, head, mm_list) {
Chris Wilson37811fc2010-08-25 22:45:57 +0100184 seq_printf(m, " ");
185 describe_obj(m, obj_priv);
Eric Anholtf4ceda82009-02-17 23:53:41 -0800186 seq_printf(m, "\n");
Chris Wilson8f2480f2010-09-26 11:44:19 +0100187 total_obj_size += obj_priv->base.size;
188 total_gtt_size += obj_priv->gtt_space->size;
189 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500190 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100191 mutex_unlock(&dev->struct_mutex);
Carl Worth5e118f42009-03-20 11:54:25 -0700192
Chris Wilson8f2480f2010-09-26 11:44:19 +0100193 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
194 count, total_obj_size, total_gtt_size);
Ben Gamari20172632009-02-17 20:08:50 -0500195 return 0;
196}
197
Chris Wilson73aa8082010-09-30 11:46:12 +0100198static int i915_gem_object_info(struct seq_file *m, void* data)
199{
200 struct drm_info_node *node = (struct drm_info_node *) m->private;
201 struct drm_device *dev = node->minor->dev;
202 struct drm_i915_private *dev_priv = dev->dev_private;
203 int ret;
204
205 ret = mutex_lock_interruptible(&dev->struct_mutex);
206 if (ret)
207 return ret;
208
209 seq_printf(m, "%u objects\n", dev_priv->mm.object_count);
210 seq_printf(m, "%zu object bytes\n", dev_priv->mm.object_memory);
211 seq_printf(m, "%u pinned\n", dev_priv->mm.pin_count);
212 seq_printf(m, "%zu pin bytes\n", dev_priv->mm.pin_memory);
Daniel Vetterfb7d5162010-10-01 22:05:20 +0200213 seq_printf(m, "%u mappable objects in gtt\n", dev_priv->mm.gtt_mappable_count);
214 seq_printf(m, "%zu mappable gtt bytes\n", dev_priv->mm.gtt_mappable_memory);
215 seq_printf(m, "%zu mappable gtt used bytes\n", dev_priv->mm.mappable_gtt_used);
216 seq_printf(m, "%zu mappable gtt total\n", dev_priv->mm.mappable_gtt_total);
Chris Wilson73aa8082010-09-30 11:46:12 +0100217 seq_printf(m, "%u objects in gtt\n", dev_priv->mm.gtt_count);
218 seq_printf(m, "%zu gtt bytes\n", dev_priv->mm.gtt_memory);
219 seq_printf(m, "%zu gtt total\n", dev_priv->mm.gtt_total);
220
221 mutex_unlock(&dev->struct_mutex);
222
223 return 0;
224}
225
226
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100227static int i915_gem_pageflip_info(struct seq_file *m, void *data)
228{
229 struct drm_info_node *node = (struct drm_info_node *) m->private;
230 struct drm_device *dev = node->minor->dev;
231 unsigned long flags;
232 struct intel_crtc *crtc;
233
234 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
235 const char *pipe = crtc->pipe ? "B" : "A";
236 const char *plane = crtc->plane ? "B" : "A";
237 struct intel_unpin_work *work;
238
239 spin_lock_irqsave(&dev->event_lock, flags);
240 work = crtc->unpin_work;
241 if (work == NULL) {
242 seq_printf(m, "No flip due on pipe %s (plane %s)\n",
243 pipe, plane);
244 } else {
245 if (!work->pending) {
246 seq_printf(m, "Flip queued on pipe %s (plane %s)\n",
247 pipe, plane);
248 } else {
249 seq_printf(m, "Flip pending (waiting for vsync) on pipe %s (plane %s)\n",
250 pipe, plane);
251 }
252 if (work->enable_stall_check)
253 seq_printf(m, "Stall check enabled, ");
254 else
255 seq_printf(m, "Stall check waiting for page flip ioctl, ");
256 seq_printf(m, "%d prepares\n", work->pending);
257
258 if (work->old_fb_obj) {
259 struct drm_i915_gem_object *obj_priv = to_intel_bo(work->old_fb_obj);
260 if(obj_priv)
261 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
262 }
263 if (work->pending_flip_obj) {
264 struct drm_i915_gem_object *obj_priv = to_intel_bo(work->pending_flip_obj);
265 if(obj_priv)
266 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj_priv->gtt_offset );
267 }
268 }
269 spin_unlock_irqrestore(&dev->event_lock, flags);
270 }
271
272 return 0;
273}
274
Ben Gamari20172632009-02-17 20:08:50 -0500275static int i915_gem_request_info(struct seq_file *m, void *data)
276{
277 struct drm_info_node *node = (struct drm_info_node *) m->private;
278 struct drm_device *dev = node->minor->dev;
279 drm_i915_private_t *dev_priv = dev->dev_private;
280 struct drm_i915_gem_request *gem_request;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100281 int ret, count;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100282
283 ret = mutex_lock_interruptible(&dev->struct_mutex);
284 if (ret)
285 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500286
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100287 count = 0;
288 if (!list_empty(&dev_priv->render_ring.request_list)) {
289 seq_printf(m, "Render requests:\n");
290 list_for_each_entry(gem_request,
291 &dev_priv->render_ring.request_list,
292 list) {
293 seq_printf(m, " %d @ %d\n",
294 gem_request->seqno,
295 (int) (jiffies - gem_request->emitted_jiffies));
296 }
297 count++;
298 }
299 if (!list_empty(&dev_priv->bsd_ring.request_list)) {
300 seq_printf(m, "BSD requests:\n");
301 list_for_each_entry(gem_request,
302 &dev_priv->bsd_ring.request_list,
303 list) {
304 seq_printf(m, " %d @ %d\n",
305 gem_request->seqno,
306 (int) (jiffies - gem_request->emitted_jiffies));
307 }
308 count++;
309 }
310 if (!list_empty(&dev_priv->blt_ring.request_list)) {
311 seq_printf(m, "BLT requests:\n");
312 list_for_each_entry(gem_request,
313 &dev_priv->blt_ring.request_list,
314 list) {
315 seq_printf(m, " %d @ %d\n",
316 gem_request->seqno,
317 (int) (jiffies - gem_request->emitted_jiffies));
318 }
319 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500320 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100321 mutex_unlock(&dev->struct_mutex);
322
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100323 if (count == 0)
324 seq_printf(m, "No requests\n");
325
Ben Gamari20172632009-02-17 20:08:50 -0500326 return 0;
327}
328
Chris Wilsonb2223492010-10-27 15:27:33 +0100329static void i915_ring_seqno_info(struct seq_file *m,
330 struct intel_ring_buffer *ring)
331{
332 if (ring->get_seqno) {
333 seq_printf(m, "Current sequence (%s): %d\n",
334 ring->name, ring->get_seqno(ring));
335 seq_printf(m, "Waiter sequence (%s): %d\n",
336 ring->name, ring->waiting_seqno);
337 seq_printf(m, "IRQ sequence (%s): %d\n",
338 ring->name, ring->irq_seqno);
339 }
340}
341
Ben Gamari20172632009-02-17 20:08:50 -0500342static int i915_gem_seqno_info(struct seq_file *m, void *data)
343{
344 struct drm_info_node *node = (struct drm_info_node *) m->private;
345 struct drm_device *dev = node->minor->dev;
346 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100347 int ret;
348
349 ret = mutex_lock_interruptible(&dev->struct_mutex);
350 if (ret)
351 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500352
Chris Wilsonb2223492010-10-27 15:27:33 +0100353 i915_ring_seqno_info(m, &dev_priv->render_ring);
354 i915_ring_seqno_info(m, &dev_priv->bsd_ring);
355 i915_ring_seqno_info(m, &dev_priv->blt_ring);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100356
357 mutex_unlock(&dev->struct_mutex);
358
Ben Gamari20172632009-02-17 20:08:50 -0500359 return 0;
360}
361
362
363static int i915_interrupt_info(struct seq_file *m, void *data)
364{
365 struct drm_info_node *node = (struct drm_info_node *) m->private;
366 struct drm_device *dev = node->minor->dev;
367 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100368 int ret;
369
370 ret = mutex_lock_interruptible(&dev->struct_mutex);
371 if (ret)
372 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500373
Eric Anholtbad720f2009-10-22 16:11:14 -0700374 if (!HAS_PCH_SPLIT(dev)) {
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800375 seq_printf(m, "Interrupt enable: %08x\n",
376 I915_READ(IER));
377 seq_printf(m, "Interrupt identity: %08x\n",
378 I915_READ(IIR));
379 seq_printf(m, "Interrupt mask: %08x\n",
380 I915_READ(IMR));
381 seq_printf(m, "Pipe A stat: %08x\n",
382 I915_READ(PIPEASTAT));
383 seq_printf(m, "Pipe B stat: %08x\n",
384 I915_READ(PIPEBSTAT));
385 } else {
386 seq_printf(m, "North Display Interrupt enable: %08x\n",
387 I915_READ(DEIER));
388 seq_printf(m, "North Display Interrupt identity: %08x\n",
389 I915_READ(DEIIR));
390 seq_printf(m, "North Display Interrupt mask: %08x\n",
391 I915_READ(DEIMR));
392 seq_printf(m, "South Display Interrupt enable: %08x\n",
393 I915_READ(SDEIER));
394 seq_printf(m, "South Display Interrupt identity: %08x\n",
395 I915_READ(SDEIIR));
396 seq_printf(m, "South Display Interrupt mask: %08x\n",
397 I915_READ(SDEIMR));
398 seq_printf(m, "Graphics Interrupt enable: %08x\n",
399 I915_READ(GTIER));
400 seq_printf(m, "Graphics Interrupt identity: %08x\n",
401 I915_READ(GTIIR));
402 seq_printf(m, "Graphics Interrupt mask: %08x\n",
403 I915_READ(GTIMR));
404 }
Ben Gamari20172632009-02-17 20:08:50 -0500405 seq_printf(m, "Interrupts received: %d\n",
406 atomic_read(&dev_priv->irq_received));
Chris Wilsonb2223492010-10-27 15:27:33 +0100407 i915_ring_seqno_info(m, &dev_priv->render_ring);
408 i915_ring_seqno_info(m, &dev_priv->bsd_ring);
409 i915_ring_seqno_info(m, &dev_priv->blt_ring);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100410 mutex_unlock(&dev->struct_mutex);
411
Ben Gamari20172632009-02-17 20:08:50 -0500412 return 0;
413}
414
Chris Wilsona6172a82009-02-11 14:26:38 +0000415static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
416{
417 struct drm_info_node *node = (struct drm_info_node *) m->private;
418 struct drm_device *dev = node->minor->dev;
419 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100420 int i, ret;
421
422 ret = mutex_lock_interruptible(&dev->struct_mutex);
423 if (ret)
424 return ret;
Chris Wilsona6172a82009-02-11 14:26:38 +0000425
426 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
427 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
428 for (i = 0; i < dev_priv->num_fence_regs; i++) {
429 struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
430
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100431 seq_printf(m, "Fenced object[%2d] = ", i);
432 if (obj == NULL)
433 seq_printf(m, "unused");
434 else
435 describe_obj(m, to_intel_bo(obj));
436 seq_printf(m, "\n");
Chris Wilsona6172a82009-02-11 14:26:38 +0000437 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100438 mutex_unlock(&dev->struct_mutex);
Chris Wilsona6172a82009-02-11 14:26:38 +0000439
440 return 0;
441}
442
Ben Gamari20172632009-02-17 20:08:50 -0500443static int i915_hws_info(struct seq_file *m, void *data)
444{
445 struct drm_info_node *node = (struct drm_info_node *) m->private;
446 struct drm_device *dev = node->minor->dev;
447 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100448 struct intel_ring_buffer *ring;
Ben Gamari20172632009-02-17 20:08:50 -0500449 volatile u32 *hws;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100450 int i;
Ben Gamari20172632009-02-17 20:08:50 -0500451
Chris Wilson4066c0a2010-10-29 21:00:54 +0100452 switch ((uintptr_t)node->info_ent->data) {
453 case RENDER_RING: ring = &dev_priv->render_ring; break;
454 case BSD_RING: ring = &dev_priv->bsd_ring; break;
455 case BLT_RING: ring = &dev_priv->blt_ring; break;
456 default: return -EINVAL;
457 }
458
459 hws = (volatile u32 *)ring->status_page.page_addr;
Ben Gamari20172632009-02-17 20:08:50 -0500460 if (hws == NULL)
461 return 0;
462
463 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
464 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
465 i * 4,
466 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
467 }
468 return 0;
469}
470
Chris Wilson5cdf5882010-09-27 15:51:07 +0100471static void i915_dump_object(struct seq_file *m,
472 struct io_mapping *mapping,
473 struct drm_i915_gem_object *obj_priv)
Ben Gamari6911a9b2009-04-02 11:24:54 -0700474{
Chris Wilson5cdf5882010-09-27 15:51:07 +0100475 int page, page_count, i;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700476
Chris Wilson5cdf5882010-09-27 15:51:07 +0100477 page_count = obj_priv->base.size / PAGE_SIZE;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700478 for (page = 0; page < page_count; page++) {
Chris Wilson5cdf5882010-09-27 15:51:07 +0100479 u32 *mem = io_mapping_map_wc(mapping,
480 obj_priv->gtt_offset + page * PAGE_SIZE);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700481 for (i = 0; i < PAGE_SIZE; i += 4)
482 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
Chris Wilson5cdf5882010-09-27 15:51:07 +0100483 io_mapping_unmap(mem);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700484 }
485}
486
487static int i915_batchbuffer_info(struct seq_file *m, void *data)
488{
489 struct drm_info_node *node = (struct drm_info_node *) m->private;
490 struct drm_device *dev = node->minor->dev;
491 drm_i915_private_t *dev_priv = dev->dev_private;
492 struct drm_gem_object *obj;
493 struct drm_i915_gem_object *obj_priv;
494 int ret;
495
Chris Wilsonde227ef2010-07-03 07:58:38 +0100496 ret = mutex_lock_interruptible(&dev->struct_mutex);
497 if (ret)
498 return ret;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700499
Chris Wilson69dc4982010-10-19 10:36:51 +0100500 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, mm_list) {
Daniel Vettera8089e82010-04-09 19:05:09 +0000501 obj = &obj_priv->base;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700502 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
Chris Wilson5cdf5882010-09-27 15:51:07 +0100503 seq_printf(m, "--- gtt_offset = 0x%08x\n",
504 obj_priv->gtt_offset);
505 i915_dump_object(m, dev_priv->mm.gtt_mapping, obj_priv);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700506 }
507 }
508
Chris Wilsonde227ef2010-07-03 07:58:38 +0100509 mutex_unlock(&dev->struct_mutex);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700510
511 return 0;
512}
513
514static int i915_ringbuffer_data(struct seq_file *m, void *data)
515{
516 struct drm_info_node *node = (struct drm_info_node *) m->private;
517 struct drm_device *dev = node->minor->dev;
518 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100519 struct intel_ring_buffer *ring;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100520 int ret;
521
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100522 switch ((uintptr_t)node->info_ent->data) {
523 case RENDER_RING: ring = &dev_priv->render_ring; break;
524 case BSD_RING: ring = &dev_priv->bsd_ring; break;
525 case BLT_RING: ring = &dev_priv->blt_ring; break;
526 default: return -EINVAL;
527 }
528
Chris Wilsonde227ef2010-07-03 07:58:38 +0100529 ret = mutex_lock_interruptible(&dev->struct_mutex);
530 if (ret)
531 return ret;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700532
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100533 if (!ring->gem_object) {
Ben Gamari6911a9b2009-04-02 11:24:54 -0700534 seq_printf(m, "No ringbuffer setup\n");
Chris Wilsonde227ef2010-07-03 07:58:38 +0100535 } else {
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100536 u8 *virt = ring->virtual_start;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100537 uint32_t off;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700538
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100539 for (off = 0; off < ring->size; off += 4) {
Chris Wilsonde227ef2010-07-03 07:58:38 +0100540 uint32_t *ptr = (uint32_t *)(virt + off);
541 seq_printf(m, "%08x : %08x\n", off, *ptr);
542 }
Ben Gamari6911a9b2009-04-02 11:24:54 -0700543 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100544 mutex_unlock(&dev->struct_mutex);
Ben Gamari6911a9b2009-04-02 11:24:54 -0700545
546 return 0;
547}
548
549static int i915_ringbuffer_info(struct seq_file *m, void *data)
550{
551 struct drm_info_node *node = (struct drm_info_node *) m->private;
552 struct drm_device *dev = node->minor->dev;
553 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100554 struct intel_ring_buffer *ring;
Ben Gamari6911a9b2009-04-02 11:24:54 -0700555
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100556 switch ((uintptr_t)node->info_ent->data) {
557 case RENDER_RING: ring = &dev_priv->render_ring; break;
558 case BSD_RING: ring = &dev_priv->bsd_ring; break;
559 case BLT_RING: ring = &dev_priv->blt_ring; break;
560 default: return -EINVAL;
561 }
Ben Gamari6911a9b2009-04-02 11:24:54 -0700562
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100563 if (ring->size == 0)
564 return 0;
565
566 seq_printf(m, "Ring %s:\n", ring->name);
567 seq_printf(m, " Head : %08x\n", I915_READ_HEAD(ring) & HEAD_ADDR);
568 seq_printf(m, " Tail : %08x\n", I915_READ_TAIL(ring) & TAIL_ADDR);
569 seq_printf(m, " Size : %08x\n", ring->size);
570 seq_printf(m, " Active : %08x\n", intel_ring_get_active_head(ring));
571 seq_printf(m, " Control : %08x\n", I915_READ_CTL(ring));
572 seq_printf(m, " Start : %08x\n", I915_READ_START(ring));
Ben Gamari6911a9b2009-04-02 11:24:54 -0700573
574 return 0;
575}
576
Chris Wilson9df30792010-02-18 10:24:56 +0000577static const char *pin_flag(int pinned)
578{
579 if (pinned > 0)
580 return " P";
581 else if (pinned < 0)
582 return " p";
583 else
584 return "";
585}
586
587static const char *tiling_flag(int tiling)
588{
589 switch (tiling) {
590 default:
591 case I915_TILING_NONE: return "";
592 case I915_TILING_X: return " X";
593 case I915_TILING_Y: return " Y";
594 }
595}
596
597static const char *dirty_flag(int dirty)
598{
599 return dirty ? " dirty" : "";
600}
601
602static const char *purgeable_flag(int purgeable)
603{
604 return purgeable ? " purgeable" : "";
605}
606
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700607static int i915_error_state(struct seq_file *m, void *unused)
608{
609 struct drm_info_node *node = (struct drm_info_node *) m->private;
610 struct drm_device *dev = node->minor->dev;
611 drm_i915_private_t *dev_priv = dev->dev_private;
612 struct drm_i915_error_state *error;
613 unsigned long flags;
Chris Wilson9df30792010-02-18 10:24:56 +0000614 int i, page, offset, elt;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700615
616 spin_lock_irqsave(&dev_priv->error_lock, flags);
617 if (!dev_priv->first_error) {
618 seq_printf(m, "no error state collected\n");
619 goto out;
620 }
621
622 error = dev_priv->first_error;
623
Jesse Barnes8a905232009-07-11 16:48:03 -0400624 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
625 error->time.tv_usec);
Chris Wilson9df30792010-02-18 10:24:56 +0000626 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100627 seq_printf(m, "EIR: 0x%08x\n", error->eir);
628 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
Chris Wilsonf4068392010-10-27 20:36:41 +0100629 if (INTEL_INFO(dev)->gen >= 6) {
630 seq_printf(m, "ERROR: 0x%08x\n", error->error);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100631 seq_printf(m, "Blitter command stream:\n");
632 seq_printf(m, " ACTHD: 0x%08x\n", error->bcs_acthd);
633 seq_printf(m, " IPEHR: 0x%08x\n", error->bcs_ipehr);
634 seq_printf(m, " IPEIR: 0x%08x\n", error->bcs_ipeir);
635 seq_printf(m, " INSTDONE: 0x%08x\n", error->bcs_instdone);
636 seq_printf(m, " seqno: 0x%08x\n", error->bcs_seqno);
Chris Wilsonadd354d2010-10-29 19:00:51 +0100637 seq_printf(m, "Video (BSD) command stream:\n");
638 seq_printf(m, " ACTHD: 0x%08x\n", error->vcs_acthd);
639 seq_printf(m, " IPEHR: 0x%08x\n", error->vcs_ipehr);
640 seq_printf(m, " IPEIR: 0x%08x\n", error->vcs_ipeir);
641 seq_printf(m, " INSTDONE: 0x%08x\n", error->vcs_instdone);
642 seq_printf(m, " seqno: 0x%08x\n", error->vcs_seqno);
Chris Wilsonf4068392010-10-27 20:36:41 +0100643 }
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100644 seq_printf(m, "Render command stream:\n");
645 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700646 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
647 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
648 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100649 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700650 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100651 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700652 }
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100653 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
654 seq_printf(m, " seqno: 0x%08x\n", error->seqno);
Chris Wilson9df30792010-02-18 10:24:56 +0000655
656 if (error->active_bo_count) {
657 seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
658
659 for (i = 0; i < error->active_bo_count; i++) {
660 seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s",
661 error->active_bo[i].gtt_offset,
662 error->active_bo[i].size,
663 error->active_bo[i].read_domains,
664 error->active_bo[i].write_domain,
665 error->active_bo[i].seqno,
666 pin_flag(error->active_bo[i].pinned),
667 tiling_flag(error->active_bo[i].tiling),
668 dirty_flag(error->active_bo[i].dirty),
669 purgeable_flag(error->active_bo[i].purgeable));
670
671 if (error->active_bo[i].name)
672 seq_printf(m, " (name: %d)", error->active_bo[i].name);
673 if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
674 seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
675
676 seq_printf(m, "\n");
677 }
678 }
679
680 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
681 if (error->batchbuffer[i]) {
682 struct drm_i915_error_object *obj = error->batchbuffer[i];
683
684 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
685 offset = 0;
686 for (page = 0; page < obj->page_count; page++) {
687 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
688 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
689 offset += 4;
690 }
691 }
692 }
693 }
694
695 if (error->ringbuffer) {
696 struct drm_i915_error_object *obj = error->ringbuffer;
697
698 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
699 offset = 0;
700 for (page = 0; page < obj->page_count; page++) {
701 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
702 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
703 offset += 4;
704 }
705 }
706 }
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700707
Chris Wilson6ef3d422010-08-04 20:26:07 +0100708 if (error->overlay)
709 intel_overlay_print_error_state(m, error->overlay);
710
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700711out:
712 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
713
714 return 0;
715}
Ben Gamari6911a9b2009-04-02 11:24:54 -0700716
Jesse Barnesf97108d2010-01-29 11:27:07 -0800717static int i915_rstdby_delays(struct seq_file *m, void *unused)
718{
719 struct drm_info_node *node = (struct drm_info_node *) m->private;
720 struct drm_device *dev = node->minor->dev;
721 drm_i915_private_t *dev_priv = dev->dev_private;
722 u16 crstanddelay = I915_READ16(CRSTANDVID);
723
724 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
725
726 return 0;
727}
728
729static int i915_cur_delayinfo(struct seq_file *m, void *unused)
730{
731 struct drm_info_node *node = (struct drm_info_node *) m->private;
732 struct drm_device *dev = node->minor->dev;
733 drm_i915_private_t *dev_priv = dev->dev_private;
734 u16 rgvswctl = I915_READ16(MEMSWCTL);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700735 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800736
Jesse Barnes7648fa92010-05-20 14:28:11 -0700737 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
738 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
739 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
740 MEMSTAT_VID_SHIFT);
741 seq_printf(m, "Current P-state: %d\n",
742 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800743
744 return 0;
745}
746
747static int i915_delayfreq_table(struct seq_file *m, void *unused)
748{
749 struct drm_info_node *node = (struct drm_info_node *) m->private;
750 struct drm_device *dev = node->minor->dev;
751 drm_i915_private_t *dev_priv = dev->dev_private;
752 u32 delayfreq;
753 int i;
754
755 for (i = 0; i < 16; i++) {
756 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700757 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
758 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800759 }
760
761 return 0;
762}
763
764static inline int MAP_TO_MV(int map)
765{
766 return 1250 - (map * 25);
767}
768
769static int i915_inttoext_table(struct seq_file *m, void *unused)
770{
771 struct drm_info_node *node = (struct drm_info_node *) m->private;
772 struct drm_device *dev = node->minor->dev;
773 drm_i915_private_t *dev_priv = dev->dev_private;
774 u32 inttoext;
775 int i;
776
777 for (i = 1; i <= 32; i++) {
778 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
779 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
780 }
781
782 return 0;
783}
784
785static int i915_drpc_info(struct seq_file *m, void *unused)
786{
787 struct drm_info_node *node = (struct drm_info_node *) m->private;
788 struct drm_device *dev = node->minor->dev;
789 drm_i915_private_t *dev_priv = dev->dev_private;
790 u32 rgvmodectl = I915_READ(MEMMODECTL);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700791 u32 rstdbyctl = I915_READ(MCHBAR_RENDER_STANDBY);
792 u16 crstandvid = I915_READ16(CRSTANDVID);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800793
794 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
795 "yes" : "no");
796 seq_printf(m, "Boost freq: %d\n",
797 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
798 MEMMODE_BOOST_FREQ_SHIFT);
799 seq_printf(m, "HW control enabled: %s\n",
800 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
801 seq_printf(m, "SW control enabled: %s\n",
802 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
803 seq_printf(m, "Gated voltage change: %s\n",
804 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
805 seq_printf(m, "Starting frequency: P%d\n",
806 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700807 seq_printf(m, "Max P-state: P%d\n",
Jesse Barnesf97108d2010-01-29 11:27:07 -0800808 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700809 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
810 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
811 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
812 seq_printf(m, "Render standby enabled: %s\n",
813 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
Jesse Barnesf97108d2010-01-29 11:27:07 -0800814
815 return 0;
816}
817
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800818static int i915_fbc_status(struct seq_file *m, void *unused)
819{
820 struct drm_info_node *node = (struct drm_info_node *) m->private;
821 struct drm_device *dev = node->minor->dev;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800822 drm_i915_private_t *dev_priv = dev->dev_private;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800823
Adam Jacksonee5382a2010-04-23 11:17:39 -0400824 if (!I915_HAS_FBC(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800825 seq_printf(m, "FBC unsupported on this chipset\n");
826 return 0;
827 }
828
Adam Jacksonee5382a2010-04-23 11:17:39 -0400829 if (intel_fbc_enabled(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800830 seq_printf(m, "FBC enabled\n");
831 } else {
832 seq_printf(m, "FBC disabled: ");
833 switch (dev_priv->no_fbc_reason) {
Chris Wilsonbed4a672010-09-11 10:47:47 +0100834 case FBC_NO_OUTPUT:
835 seq_printf(m, "no outputs");
836 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800837 case FBC_STOLEN_TOO_SMALL:
838 seq_printf(m, "not enough stolen memory");
839 break;
840 case FBC_UNSUPPORTED_MODE:
841 seq_printf(m, "mode not supported");
842 break;
843 case FBC_MODE_TOO_LARGE:
844 seq_printf(m, "mode too large");
845 break;
846 case FBC_BAD_PLANE:
847 seq_printf(m, "FBC unsupported on plane");
848 break;
849 case FBC_NOT_TILED:
850 seq_printf(m, "scanout buffer not tiled");
851 break;
Jesse Barnes9c928d12010-07-23 15:20:00 -0700852 case FBC_MULTIPLE_PIPES:
853 seq_printf(m, "multiple pipes are enabled");
854 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -0800855 default:
856 seq_printf(m, "unknown reason");
857 }
858 seq_printf(m, "\n");
859 }
860 return 0;
861}
862
Jesse Barnes4a9bef32010-02-05 12:47:35 -0800863static int i915_sr_status(struct seq_file *m, void *unused)
864{
865 struct drm_info_node *node = (struct drm_info_node *) m->private;
866 struct drm_device *dev = node->minor->dev;
867 drm_i915_private_t *dev_priv = dev->dev_private;
868 bool sr_enabled = false;
869
Chris Wilsonf00a3dd2010-10-21 14:57:17 +0100870 if (IS_GEN5(dev))
Chris Wilson5ba2aaa2010-08-19 18:04:08 +0100871 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100872 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
Jesse Barnes4a9bef32010-02-05 12:47:35 -0800873 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
874 else if (IS_I915GM(dev))
875 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
876 else if (IS_PINEVIEW(dev))
877 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
878
Chris Wilson5ba2aaa2010-08-19 18:04:08 +0100879 seq_printf(m, "self-refresh: %s\n",
880 sr_enabled ? "enabled" : "disabled");
Jesse Barnes4a9bef32010-02-05 12:47:35 -0800881
882 return 0;
883}
884
Jesse Barnes7648fa92010-05-20 14:28:11 -0700885static int i915_emon_status(struct seq_file *m, void *unused)
886{
887 struct drm_info_node *node = (struct drm_info_node *) m->private;
888 struct drm_device *dev = node->minor->dev;
889 drm_i915_private_t *dev_priv = dev->dev_private;
890 unsigned long temp, chipset, gfx;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100891 int ret;
892
893 ret = mutex_lock_interruptible(&dev->struct_mutex);
894 if (ret)
895 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -0700896
897 temp = i915_mch_val(dev_priv);
898 chipset = i915_chipset_val(dev_priv);
899 gfx = i915_gfx_val(dev_priv);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100900 mutex_unlock(&dev->struct_mutex);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700901
902 seq_printf(m, "GMCH temp: %ld\n", temp);
903 seq_printf(m, "Chipset power: %ld\n", chipset);
904 seq_printf(m, "GFX power: %ld\n", gfx);
905 seq_printf(m, "Total power: %ld\n", chipset + gfx);
906
907 return 0;
908}
909
910static int i915_gfxec(struct seq_file *m, void *unused)
911{
912 struct drm_info_node *node = (struct drm_info_node *) m->private;
913 struct drm_device *dev = node->minor->dev;
914 drm_i915_private_t *dev_priv = dev->dev_private;
915
916 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
917
918 return 0;
919}
920
Chris Wilson44834a62010-08-19 16:09:23 +0100921static int i915_opregion(struct seq_file *m, void *unused)
922{
923 struct drm_info_node *node = (struct drm_info_node *) m->private;
924 struct drm_device *dev = node->minor->dev;
925 drm_i915_private_t *dev_priv = dev->dev_private;
926 struct intel_opregion *opregion = &dev_priv->opregion;
927 int ret;
928
929 ret = mutex_lock_interruptible(&dev->struct_mutex);
930 if (ret)
931 return ret;
932
933 if (opregion->header)
934 seq_write(m, opregion->header, OPREGION_SIZE);
935
936 mutex_unlock(&dev->struct_mutex);
937
938 return 0;
939}
940
Chris Wilson37811fc2010-08-25 22:45:57 +0100941static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
942{
943 struct drm_info_node *node = (struct drm_info_node *) m->private;
944 struct drm_device *dev = node->minor->dev;
945 drm_i915_private_t *dev_priv = dev->dev_private;
946 struct intel_fbdev *ifbdev;
947 struct intel_framebuffer *fb;
948 int ret;
949
950 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
951 if (ret)
952 return ret;
953
954 ifbdev = dev_priv->fbdev;
955 fb = to_intel_framebuffer(ifbdev->helper.fb);
956
957 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
958 fb->base.width,
959 fb->base.height,
960 fb->base.depth,
961 fb->base.bits_per_pixel);
962 describe_obj(m, to_intel_bo(fb->obj));
963 seq_printf(m, "\n");
964
965 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
966 if (&fb->base == ifbdev->helper.fb)
967 continue;
968
969 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
970 fb->base.width,
971 fb->base.height,
972 fb->base.depth,
973 fb->base.bits_per_pixel);
974 describe_obj(m, to_intel_bo(fb->obj));
975 seq_printf(m, "\n");
976 }
977
978 mutex_unlock(&dev->mode_config.mutex);
979
980 return 0;
981}
982
Chris Wilsonf3cd4742009-10-13 22:20:20 +0100983static int
984i915_wedged_open(struct inode *inode,
985 struct file *filp)
986{
987 filp->private_data = inode->i_private;
988 return 0;
989}
990
991static ssize_t
992i915_wedged_read(struct file *filp,
993 char __user *ubuf,
994 size_t max,
995 loff_t *ppos)
996{
997 struct drm_device *dev = filp->private_data;
998 drm_i915_private_t *dev_priv = dev->dev_private;
999 char buf[80];
1000 int len;
1001
1002 len = snprintf(buf, sizeof (buf),
1003 "wedged : %d\n",
1004 atomic_read(&dev_priv->mm.wedged));
1005
Dan Carpenterf4433a82010-09-08 21:44:47 +02001006 if (len > sizeof (buf))
1007 len = sizeof (buf);
1008
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001009 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1010}
1011
1012static ssize_t
1013i915_wedged_write(struct file *filp,
1014 const char __user *ubuf,
1015 size_t cnt,
1016 loff_t *ppos)
1017{
1018 struct drm_device *dev = filp->private_data;
1019 drm_i915_private_t *dev_priv = dev->dev_private;
1020 char buf[20];
1021 int val = 1;
1022
1023 if (cnt > 0) {
1024 if (cnt > sizeof (buf) - 1)
1025 return -EINVAL;
1026
1027 if (copy_from_user(buf, ubuf, cnt))
1028 return -EFAULT;
1029 buf[cnt] = 0;
1030
1031 val = simple_strtoul(buf, NULL, 0);
1032 }
1033
1034 DRM_INFO("Manually setting wedged to %d\n", val);
1035
1036 atomic_set(&dev_priv->mm.wedged, val);
1037 if (val) {
Chris Wilsonf787a5f2010-09-24 16:02:42 +01001038 wake_up_all(&dev_priv->irq_queue);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001039 queue_work(dev_priv->wq, &dev_priv->error_work);
1040 }
1041
1042 return cnt;
1043}
1044
1045static const struct file_operations i915_wedged_fops = {
1046 .owner = THIS_MODULE,
1047 .open = i915_wedged_open,
1048 .read = i915_wedged_read,
1049 .write = i915_wedged_write,
Arnd Bergmann6038f372010-08-15 18:52:59 +02001050 .llseek = default_llseek,
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001051};
1052
1053/* As the drm_debugfs_init() routines are called before dev->dev_private is
1054 * allocated we need to hook into the minor for release. */
1055static int
1056drm_add_fake_info_node(struct drm_minor *minor,
1057 struct dentry *ent,
1058 const void *key)
1059{
1060 struct drm_info_node *node;
1061
1062 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1063 if (node == NULL) {
1064 debugfs_remove(ent);
1065 return -ENOMEM;
1066 }
1067
1068 node->minor = minor;
1069 node->dent = ent;
1070 node->info_ent = (void *) key;
1071 list_add(&node->list, &minor->debugfs_nodes.list);
1072
1073 return 0;
1074}
1075
1076static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
1077{
1078 struct drm_device *dev = minor->dev;
1079 struct dentry *ent;
1080
1081 ent = debugfs_create_file("i915_wedged",
1082 S_IRUGO | S_IWUSR,
1083 root, dev,
1084 &i915_wedged_fops);
1085 if (IS_ERR(ent))
1086 return PTR_ERR(ent);
1087
1088 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
1089}
Ben Gamari9e3a6d12009-07-01 22:26:53 -04001090
Ben Gamari27c202a2009-07-01 22:26:52 -04001091static struct drm_info_list i915_debugfs_list[] = {
Chris Wilson70d39fe2010-08-25 16:03:34 +01001092 {"i915_capabilities", i915_capabilities, 0, 0},
Chris Wilson73aa8082010-09-30 11:46:12 +01001093 {"i915_gem_objects", i915_gem_object_info, 0},
Ben Gamari433e12f2009-02-17 20:08:51 -05001094 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
1095 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
1096 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
Chris Wilsonf13d3f72010-09-20 17:36:15 +01001097 {"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
Chris Wilsond21d5972010-09-26 11:19:33 +01001098 {"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
Simon Farnsworth4e5359c2010-09-01 17:47:52 +01001099 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05001100 {"i915_gem_request", i915_gem_request_info, 0},
1101 {"i915_gem_seqno", i915_gem_seqno_info, 0},
Chris Wilsona6172a82009-02-11 14:26:38 +00001102 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05001103 {"i915_gem_interrupt", i915_interrupt_info, 0},
Chris Wilson4066c0a2010-10-29 21:00:54 +01001104 {"i915_gem_hws", i915_hws_info, 0, (void *)RENDER_RING},
1105 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BLT_RING},
1106 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)BSD_RING},
Chris Wilsonc2c347a92010-10-27 15:11:53 +01001107 {"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RENDER_RING},
1108 {"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RENDER_RING},
1109 {"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)BSD_RING},
1110 {"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)BSD_RING},
1111 {"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)BLT_RING},
1112 {"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)BLT_RING},
Ben Gamari6911a9b2009-04-02 11:24:54 -07001113 {"i915_batchbuffers", i915_batchbuffer_info, 0},
Jesse Barnes63eeaf32009-06-18 16:56:52 -07001114 {"i915_error_state", i915_error_state, 0},
Jesse Barnesf97108d2010-01-29 11:27:07 -08001115 {"i915_rstdby_delays", i915_rstdby_delays, 0},
1116 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
1117 {"i915_delayfreq_table", i915_delayfreq_table, 0},
1118 {"i915_inttoext_table", i915_inttoext_table, 0},
1119 {"i915_drpc_info", i915_drpc_info, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -07001120 {"i915_emon_status", i915_emon_status, 0},
1121 {"i915_gfxec", i915_gfxec, 0},
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001122 {"i915_fbc_status", i915_fbc_status, 0},
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001123 {"i915_sr_status", i915_sr_status, 0},
Chris Wilson44834a62010-08-19 16:09:23 +01001124 {"i915_opregion", i915_opregion, 0},
Chris Wilson37811fc2010-08-25 22:45:57 +01001125 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05001126};
Ben Gamari27c202a2009-07-01 22:26:52 -04001127#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
Ben Gamari20172632009-02-17 20:08:50 -05001128
Ben Gamari27c202a2009-07-01 22:26:52 -04001129int i915_debugfs_init(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05001130{
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001131 int ret;
1132
1133 ret = i915_wedged_create(minor->debugfs_root, minor);
1134 if (ret)
1135 return ret;
1136
Ben Gamari27c202a2009-07-01 22:26:52 -04001137 return drm_debugfs_create_files(i915_debugfs_list,
1138 I915_DEBUGFS_ENTRIES,
Ben Gamari20172632009-02-17 20:08:50 -05001139 minor->debugfs_root, minor);
1140}
1141
Ben Gamari27c202a2009-07-01 22:26:52 -04001142void i915_debugfs_cleanup(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05001143{
Ben Gamari27c202a2009-07-01 22:26:52 -04001144 drm_debugfs_remove_files(i915_debugfs_list,
1145 I915_DEBUGFS_ENTRIES, minor);
Kristian Høgsberg33db6792009-11-11 12:19:16 -05001146 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
1147 1, minor);
Ben Gamari20172632009-02-17 20:08:50 -05001148}
1149
1150#endif /* CONFIG_DEBUG_FS */