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Zhangfei Gao536ac992010-09-20 10:51:28 -04001/* linux/arch/arm/plat-pxa/include/plat/sdhci.h
2 *
3 * Copyright 2010 Marvell
4 * Zhangfei Gao <zhangfei.gao@marvell.com>
5 *
6 * PXA Platform - SDHCI platform data definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __PLAT_PXA_SDHCI_H
14#define __PLAT_PXA_SDHCI_H
15
16/* pxa specific flag */
17/* Require clock free running */
Zhangfei Gaoa702c8a2011-06-08 17:41:57 +080018#define PXA_FLAG_ENABLE_CLOCK_GATING (1<<0)
19/* card always wired to host, like on-chip emmc */
20#define PXA_FLAG_CARD_PERMANENT (1<<1)
Philip Rakity15ec4462010-11-19 16:48:39 -050021/* Board design supports 8-bit data on SD/SDIO BUS */
22#define PXA_FLAG_SD_8_BIT_CAPABLE_SLOT (1<<2)
23
Zhangfei Gao536ac992010-09-20 10:51:28 -040024/*
25 * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI
Zhangfei Gao536ac992010-09-20 10:51:28 -040026 * @flags: flags for platform requirement
Zhangfei Gaoa702c8a2011-06-08 17:41:57 +080027 * @clk_delay_cycles:
28 * mmp2: each step is roughly 100ps, 5bits width
29 * pxa910: each step is 1ns, 4bits width
30 * @clk_delay_sel: select clk_delay, used on pxa910
31 * 0: choose feedback clk
32 * 1: choose feedback clk + delay value
33 * 2: choose internal clk
34 * @clk_delay_enable: enable clk_delay or not, used on pxa910
35 * @ext_cd_gpio: gpio pin used for external CD line
36 * @ext_cd_gpio_invert: invert values for external CD gpio line
37 * @max_speed: the maximum speed supported
38 * @host_caps: Standard MMC host capabilities bit field.
39 * @quirks: quirks of platfrom
40 * @pm_caps: pm_caps of platfrom
Zhangfei Gao536ac992010-09-20 10:51:28 -040041 */
42struct sdhci_pxa_platdata {
Zhangfei Gao536ac992010-09-20 10:51:28 -040043 unsigned int flags;
Zhangfei Gaoa702c8a2011-06-08 17:41:57 +080044 unsigned int clk_delay_cycles;
45 unsigned int clk_delay_sel;
46 bool clk_delay_enable;
47 unsigned int ext_cd_gpio;
48 bool ext_cd_gpio_invert;
49 unsigned int max_speed;
50 unsigned int host_caps;
51 unsigned int quirks;
52 unsigned int pm_caps;
53};
54
55struct sdhci_pxa {
56 u8 clk_enable;
57 u8 power_mode;
Zhangfei Gao536ac992010-09-20 10:51:28 -040058};
59
60#endif /* __PLAT_PXA_SDHCI_H */