Tony Lindgren | 8b8b091 | 2012-07-10 02:05:46 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Generic device tree based pinctrl driver for one register per pin |
| 3 | * type pinmux controllers |
| 4 | * |
| 5 | * Copyright (C) 2012 Texas Instruments, Inc. |
| 6 | * |
| 7 | * This file is licensed under the terms of the GNU General Public |
| 8 | * License version 2. This program is licensed "as is" without any |
| 9 | * warranty of any kind, whether express or implied. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/io.h> |
| 15 | #include <linux/slab.h> |
| 16 | #include <linux/err.h> |
| 17 | #include <linux/list.h> |
| 18 | |
| 19 | #include <linux/of.h> |
| 20 | #include <linux/of_device.h> |
| 21 | #include <linux/of_address.h> |
| 22 | |
| 23 | #include <linux/pinctrl/pinctrl.h> |
| 24 | #include <linux/pinctrl/pinmux.h> |
| 25 | |
| 26 | #include "core.h" |
| 27 | |
| 28 | #define DRIVER_NAME "pinctrl-single" |
Peter Ujfalusi | 9e605cb | 2012-09-11 11:54:24 +0300 | [diff] [blame^] | 29 | #define PCS_MUX_PINS_NAME "pinctrl-single,pins" |
| 30 | #define PCS_MUX_BITS_NAME "pinctrl-single,bits" |
Tony Lindgren | 8b8b091 | 2012-07-10 02:05:46 -0700 | [diff] [blame] | 31 | #define PCS_REG_NAME_LEN ((sizeof(unsigned long) * 2) + 1) |
| 32 | #define PCS_OFF_DISABLED ~0U |
| 33 | |
| 34 | /** |
| 35 | * struct pcs_pingroup - pingroups for a function |
| 36 | * @np: pingroup device node pointer |
| 37 | * @name: pingroup name |
| 38 | * @gpins: array of the pins in the group |
| 39 | * @ngpins: number of pins in the group |
| 40 | * @node: list node |
| 41 | */ |
| 42 | struct pcs_pingroup { |
| 43 | struct device_node *np; |
| 44 | const char *name; |
| 45 | int *gpins; |
| 46 | int ngpins; |
| 47 | struct list_head node; |
| 48 | }; |
| 49 | |
| 50 | /** |
| 51 | * struct pcs_func_vals - mux function register offset and value pair |
| 52 | * @reg: register virtual address |
| 53 | * @val: register value |
| 54 | */ |
| 55 | struct pcs_func_vals { |
| 56 | void __iomem *reg; |
| 57 | unsigned val; |
Peter Ujfalusi | 9e605cb | 2012-09-11 11:54:24 +0300 | [diff] [blame^] | 58 | unsigned mask; |
Tony Lindgren | 8b8b091 | 2012-07-10 02:05:46 -0700 | [diff] [blame] | 59 | }; |
| 60 | |
| 61 | /** |
| 62 | * struct pcs_function - pinctrl function |
| 63 | * @name: pinctrl function name |
| 64 | * @vals: register and vals array |
| 65 | * @nvals: number of entries in vals array |
| 66 | * @pgnames: array of pingroup names the function uses |
| 67 | * @npgnames: number of pingroup names the function uses |
| 68 | * @node: list node |
| 69 | */ |
| 70 | struct pcs_function { |
| 71 | const char *name; |
| 72 | struct pcs_func_vals *vals; |
| 73 | unsigned nvals; |
| 74 | const char **pgnames; |
| 75 | int npgnames; |
| 76 | struct list_head node; |
| 77 | }; |
| 78 | |
| 79 | /** |
| 80 | * struct pcs_data - wrapper for data needed by pinctrl framework |
| 81 | * @pa: pindesc array |
| 82 | * @cur: index to current element |
| 83 | * |
| 84 | * REVISIT: We should be able to drop this eventually by adding |
| 85 | * support for registering pins individually in the pinctrl |
| 86 | * framework for those drivers that don't need a static array. |
| 87 | */ |
| 88 | struct pcs_data { |
| 89 | struct pinctrl_pin_desc *pa; |
| 90 | int cur; |
| 91 | }; |
| 92 | |
| 93 | /** |
| 94 | * struct pcs_name - register name for a pin |
| 95 | * @name: name of the pinctrl register |
| 96 | * |
| 97 | * REVISIT: We may want to make names optional in the pinctrl |
| 98 | * framework as some drivers may not care about pin names to |
| 99 | * avoid kernel bloat. The pin names can be deciphered by user |
| 100 | * space tools using debugfs based on the register address and |
| 101 | * SoC packaging information. |
| 102 | */ |
| 103 | struct pcs_name { |
| 104 | char name[PCS_REG_NAME_LEN]; |
| 105 | }; |
| 106 | |
| 107 | /** |
| 108 | * struct pcs_device - pinctrl device instance |
| 109 | * @res: resources |
| 110 | * @base: virtual address of the controller |
| 111 | * @size: size of the ioremapped area |
| 112 | * @dev: device entry |
| 113 | * @pctl: pin controller device |
| 114 | * @mutex: mutex protecting the lists |
| 115 | * @width: bits per mux register |
| 116 | * @fmask: function register mask |
| 117 | * @fshift: function register shift |
| 118 | * @foff: value to turn mux off |
| 119 | * @fmax: max number of functions in fmask |
| 120 | * @names: array of register names for pins |
| 121 | * @pins: physical pins on the SoC |
| 122 | * @pgtree: pingroup index radix tree |
| 123 | * @ftree: function index radix tree |
| 124 | * @pingroups: list of pingroups |
| 125 | * @functions: list of functions |
| 126 | * @ngroups: number of pingroups |
| 127 | * @nfuncs: number of functions |
| 128 | * @desc: pin controller descriptor |
| 129 | * @read: register read function to use |
| 130 | * @write: register write function to use |
| 131 | */ |
| 132 | struct pcs_device { |
| 133 | struct resource *res; |
| 134 | void __iomem *base; |
| 135 | unsigned size; |
| 136 | struct device *dev; |
| 137 | struct pinctrl_dev *pctl; |
| 138 | struct mutex mutex; |
| 139 | unsigned width; |
| 140 | unsigned fmask; |
| 141 | unsigned fshift; |
| 142 | unsigned foff; |
| 143 | unsigned fmax; |
Peter Ujfalusi | 9e605cb | 2012-09-11 11:54:24 +0300 | [diff] [blame^] | 144 | bool bits_per_mux; |
Tony Lindgren | 8b8b091 | 2012-07-10 02:05:46 -0700 | [diff] [blame] | 145 | struct pcs_name *names; |
| 146 | struct pcs_data pins; |
| 147 | struct radix_tree_root pgtree; |
| 148 | struct radix_tree_root ftree; |
| 149 | struct list_head pingroups; |
| 150 | struct list_head functions; |
| 151 | unsigned ngroups; |
| 152 | unsigned nfuncs; |
| 153 | struct pinctrl_desc desc; |
| 154 | unsigned (*read)(void __iomem *reg); |
| 155 | void (*write)(unsigned val, void __iomem *reg); |
| 156 | }; |
| 157 | |
| 158 | /* |
| 159 | * REVISIT: Reads and writes could eventually use regmap or something |
| 160 | * generic. But at least on omaps, some mux registers are performance |
| 161 | * critical as they may need to be remuxed every time before and after |
| 162 | * idle. Adding tests for register access width for every read and |
| 163 | * write like regmap is doing is not desired, and caching the registers |
| 164 | * does not help in this case. |
| 165 | */ |
| 166 | |
| 167 | static unsigned __maybe_unused pcs_readb(void __iomem *reg) |
| 168 | { |
| 169 | return readb(reg); |
| 170 | } |
| 171 | |
| 172 | static unsigned __maybe_unused pcs_readw(void __iomem *reg) |
| 173 | { |
| 174 | return readw(reg); |
| 175 | } |
| 176 | |
| 177 | static unsigned __maybe_unused pcs_readl(void __iomem *reg) |
| 178 | { |
| 179 | return readl(reg); |
| 180 | } |
| 181 | |
| 182 | static void __maybe_unused pcs_writeb(unsigned val, void __iomem *reg) |
| 183 | { |
| 184 | writeb(val, reg); |
| 185 | } |
| 186 | |
| 187 | static void __maybe_unused pcs_writew(unsigned val, void __iomem *reg) |
| 188 | { |
| 189 | writew(val, reg); |
| 190 | } |
| 191 | |
| 192 | static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg) |
| 193 | { |
| 194 | writel(val, reg); |
| 195 | } |
| 196 | |
| 197 | static int pcs_get_groups_count(struct pinctrl_dev *pctldev) |
| 198 | { |
| 199 | struct pcs_device *pcs; |
| 200 | |
| 201 | pcs = pinctrl_dev_get_drvdata(pctldev); |
| 202 | |
| 203 | return pcs->ngroups; |
| 204 | } |
| 205 | |
| 206 | static const char *pcs_get_group_name(struct pinctrl_dev *pctldev, |
| 207 | unsigned gselector) |
| 208 | { |
| 209 | struct pcs_device *pcs; |
| 210 | struct pcs_pingroup *group; |
| 211 | |
| 212 | pcs = pinctrl_dev_get_drvdata(pctldev); |
| 213 | group = radix_tree_lookup(&pcs->pgtree, gselector); |
| 214 | if (!group) { |
| 215 | dev_err(pcs->dev, "%s could not find pingroup%i\n", |
| 216 | __func__, gselector); |
| 217 | return NULL; |
| 218 | } |
| 219 | |
| 220 | return group->name; |
| 221 | } |
| 222 | |
| 223 | static int pcs_get_group_pins(struct pinctrl_dev *pctldev, |
| 224 | unsigned gselector, |
| 225 | const unsigned **pins, |
| 226 | unsigned *npins) |
| 227 | { |
| 228 | struct pcs_device *pcs; |
| 229 | struct pcs_pingroup *group; |
| 230 | |
| 231 | pcs = pinctrl_dev_get_drvdata(pctldev); |
| 232 | group = radix_tree_lookup(&pcs->pgtree, gselector); |
| 233 | if (!group) { |
| 234 | dev_err(pcs->dev, "%s could not find pingroup%i\n", |
| 235 | __func__, gselector); |
| 236 | return -EINVAL; |
| 237 | } |
| 238 | |
| 239 | *pins = group->gpins; |
| 240 | *npins = group->ngpins; |
| 241 | |
| 242 | return 0; |
| 243 | } |
| 244 | |
| 245 | static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev, |
| 246 | struct seq_file *s, |
| 247 | unsigned offset) |
| 248 | { |
| 249 | seq_printf(s, " " DRIVER_NAME); |
| 250 | } |
| 251 | |
| 252 | static void pcs_dt_free_map(struct pinctrl_dev *pctldev, |
| 253 | struct pinctrl_map *map, unsigned num_maps) |
| 254 | { |
| 255 | struct pcs_device *pcs; |
| 256 | |
| 257 | pcs = pinctrl_dev_get_drvdata(pctldev); |
| 258 | devm_kfree(pcs->dev, map); |
| 259 | } |
| 260 | |
| 261 | static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev, |
| 262 | struct device_node *np_config, |
| 263 | struct pinctrl_map **map, unsigned *num_maps); |
| 264 | |
| 265 | static struct pinctrl_ops pcs_pinctrl_ops = { |
| 266 | .get_groups_count = pcs_get_groups_count, |
| 267 | .get_group_name = pcs_get_group_name, |
| 268 | .get_group_pins = pcs_get_group_pins, |
| 269 | .pin_dbg_show = pcs_pin_dbg_show, |
| 270 | .dt_node_to_map = pcs_dt_node_to_map, |
| 271 | .dt_free_map = pcs_dt_free_map, |
| 272 | }; |
| 273 | |
| 274 | static int pcs_get_functions_count(struct pinctrl_dev *pctldev) |
| 275 | { |
| 276 | struct pcs_device *pcs; |
| 277 | |
| 278 | pcs = pinctrl_dev_get_drvdata(pctldev); |
| 279 | |
| 280 | return pcs->nfuncs; |
| 281 | } |
| 282 | |
| 283 | static const char *pcs_get_function_name(struct pinctrl_dev *pctldev, |
| 284 | unsigned fselector) |
| 285 | { |
| 286 | struct pcs_device *pcs; |
| 287 | struct pcs_function *func; |
| 288 | |
| 289 | pcs = pinctrl_dev_get_drvdata(pctldev); |
| 290 | func = radix_tree_lookup(&pcs->ftree, fselector); |
| 291 | if (!func) { |
| 292 | dev_err(pcs->dev, "%s could not find function%i\n", |
| 293 | __func__, fselector); |
| 294 | return NULL; |
| 295 | } |
| 296 | |
| 297 | return func->name; |
| 298 | } |
| 299 | |
| 300 | static int pcs_get_function_groups(struct pinctrl_dev *pctldev, |
| 301 | unsigned fselector, |
| 302 | const char * const **groups, |
| 303 | unsigned * const ngroups) |
| 304 | { |
| 305 | struct pcs_device *pcs; |
| 306 | struct pcs_function *func; |
| 307 | |
| 308 | pcs = pinctrl_dev_get_drvdata(pctldev); |
| 309 | func = radix_tree_lookup(&pcs->ftree, fselector); |
| 310 | if (!func) { |
| 311 | dev_err(pcs->dev, "%s could not find function%i\n", |
| 312 | __func__, fselector); |
| 313 | return -EINVAL; |
| 314 | } |
| 315 | *groups = func->pgnames; |
| 316 | *ngroups = func->npgnames; |
| 317 | |
| 318 | return 0; |
| 319 | } |
| 320 | |
| 321 | static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector, |
| 322 | unsigned group) |
| 323 | { |
| 324 | struct pcs_device *pcs; |
| 325 | struct pcs_function *func; |
| 326 | int i; |
| 327 | |
| 328 | pcs = pinctrl_dev_get_drvdata(pctldev); |
| 329 | func = radix_tree_lookup(&pcs->ftree, fselector); |
| 330 | if (!func) |
| 331 | return -EINVAL; |
| 332 | |
| 333 | dev_dbg(pcs->dev, "enabling %s function%i\n", |
| 334 | func->name, fselector); |
| 335 | |
| 336 | for (i = 0; i < func->nvals; i++) { |
| 337 | struct pcs_func_vals *vals; |
Peter Ujfalusi | 9e605cb | 2012-09-11 11:54:24 +0300 | [diff] [blame^] | 338 | unsigned val, mask; |
Tony Lindgren | 8b8b091 | 2012-07-10 02:05:46 -0700 | [diff] [blame] | 339 | |
| 340 | vals = &func->vals[i]; |
| 341 | val = pcs->read(vals->reg); |
Peter Ujfalusi | 9e605cb | 2012-09-11 11:54:24 +0300 | [diff] [blame^] | 342 | if (!vals->mask) |
| 343 | mask = pcs->fmask; |
| 344 | else |
| 345 | mask = pcs->fmask & vals->mask; |
| 346 | |
| 347 | val &= ~mask; |
| 348 | val |= (vals->val & mask); |
Tony Lindgren | 8b8b091 | 2012-07-10 02:05:46 -0700 | [diff] [blame] | 349 | pcs->write(val, vals->reg); |
| 350 | } |
| 351 | |
| 352 | return 0; |
| 353 | } |
| 354 | |
| 355 | static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector, |
| 356 | unsigned group) |
| 357 | { |
| 358 | struct pcs_device *pcs; |
| 359 | struct pcs_function *func; |
| 360 | int i; |
| 361 | |
| 362 | pcs = pinctrl_dev_get_drvdata(pctldev); |
| 363 | func = radix_tree_lookup(&pcs->ftree, fselector); |
| 364 | if (!func) { |
| 365 | dev_err(pcs->dev, "%s could not find function%i\n", |
| 366 | __func__, fselector); |
| 367 | return; |
| 368 | } |
| 369 | |
| 370 | /* |
| 371 | * Ignore disable if function-off is not specified. Some hardware |
| 372 | * does not have clearly defined disable function. For pin specific |
| 373 | * off modes, you can use alternate named states as described in |
| 374 | * pinctrl-bindings.txt. |
| 375 | */ |
| 376 | if (pcs->foff == PCS_OFF_DISABLED) { |
| 377 | dev_dbg(pcs->dev, "ignoring disable for %s function%i\n", |
| 378 | func->name, fselector); |
| 379 | return; |
| 380 | } |
| 381 | |
| 382 | dev_dbg(pcs->dev, "disabling function%i %s\n", |
| 383 | fselector, func->name); |
| 384 | |
| 385 | for (i = 0; i < func->nvals; i++) { |
| 386 | struct pcs_func_vals *vals; |
| 387 | unsigned val; |
| 388 | |
| 389 | vals = &func->vals[i]; |
| 390 | val = pcs->read(vals->reg); |
| 391 | val &= ~pcs->fmask; |
| 392 | val |= pcs->foff << pcs->fshift; |
| 393 | pcs->write(val, vals->reg); |
| 394 | } |
| 395 | } |
| 396 | |
| 397 | static int pcs_request_gpio(struct pinctrl_dev *pctldev, |
| 398 | struct pinctrl_gpio_range *range, unsigned offset) |
| 399 | { |
| 400 | return -ENOTSUPP; |
| 401 | } |
| 402 | |
| 403 | static struct pinmux_ops pcs_pinmux_ops = { |
| 404 | .get_functions_count = pcs_get_functions_count, |
| 405 | .get_function_name = pcs_get_function_name, |
| 406 | .get_function_groups = pcs_get_function_groups, |
| 407 | .enable = pcs_enable, |
| 408 | .disable = pcs_disable, |
| 409 | .gpio_request_enable = pcs_request_gpio, |
| 410 | }; |
| 411 | |
| 412 | static int pcs_pinconf_get(struct pinctrl_dev *pctldev, |
| 413 | unsigned pin, unsigned long *config) |
| 414 | { |
| 415 | return -ENOTSUPP; |
| 416 | } |
| 417 | |
| 418 | static int pcs_pinconf_set(struct pinctrl_dev *pctldev, |
| 419 | unsigned pin, unsigned long config) |
| 420 | { |
| 421 | return -ENOTSUPP; |
| 422 | } |
| 423 | |
| 424 | static int pcs_pinconf_group_get(struct pinctrl_dev *pctldev, |
| 425 | unsigned group, unsigned long *config) |
| 426 | { |
| 427 | return -ENOTSUPP; |
| 428 | } |
| 429 | |
| 430 | static int pcs_pinconf_group_set(struct pinctrl_dev *pctldev, |
| 431 | unsigned group, unsigned long config) |
| 432 | { |
| 433 | return -ENOTSUPP; |
| 434 | } |
| 435 | |
| 436 | static void pcs_pinconf_dbg_show(struct pinctrl_dev *pctldev, |
| 437 | struct seq_file *s, unsigned offset) |
| 438 | { |
| 439 | } |
| 440 | |
| 441 | static void pcs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, |
| 442 | struct seq_file *s, unsigned selector) |
| 443 | { |
| 444 | } |
| 445 | |
| 446 | static struct pinconf_ops pcs_pinconf_ops = { |
| 447 | .pin_config_get = pcs_pinconf_get, |
| 448 | .pin_config_set = pcs_pinconf_set, |
| 449 | .pin_config_group_get = pcs_pinconf_group_get, |
| 450 | .pin_config_group_set = pcs_pinconf_group_set, |
| 451 | .pin_config_dbg_show = pcs_pinconf_dbg_show, |
| 452 | .pin_config_group_dbg_show = pcs_pinconf_group_dbg_show, |
| 453 | }; |
| 454 | |
| 455 | /** |
| 456 | * pcs_add_pin() - add a pin to the static per controller pin array |
| 457 | * @pcs: pcs driver instance |
| 458 | * @offset: register offset from base |
| 459 | */ |
| 460 | static int __devinit pcs_add_pin(struct pcs_device *pcs, unsigned offset) |
| 461 | { |
| 462 | struct pinctrl_pin_desc *pin; |
| 463 | struct pcs_name *pn; |
| 464 | int i; |
| 465 | |
| 466 | i = pcs->pins.cur; |
| 467 | if (i >= pcs->desc.npins) { |
| 468 | dev_err(pcs->dev, "too many pins, max %i\n", |
| 469 | pcs->desc.npins); |
| 470 | return -ENOMEM; |
| 471 | } |
| 472 | |
| 473 | pin = &pcs->pins.pa[i]; |
| 474 | pn = &pcs->names[i]; |
| 475 | sprintf(pn->name, "%lx", |
| 476 | (unsigned long)pcs->res->start + offset); |
| 477 | pin->name = pn->name; |
| 478 | pin->number = i; |
| 479 | pcs->pins.cur++; |
| 480 | |
| 481 | return i; |
| 482 | } |
| 483 | |
| 484 | /** |
| 485 | * pcs_allocate_pin_table() - adds all the pins for the pinctrl driver |
| 486 | * @pcs: pcs driver instance |
| 487 | * |
| 488 | * In case of errors, resources are freed in pcs_free_resources. |
| 489 | * |
| 490 | * If your hardware needs holes in the address space, then just set |
| 491 | * up multiple driver instances. |
| 492 | */ |
| 493 | static int __devinit pcs_allocate_pin_table(struct pcs_device *pcs) |
| 494 | { |
| 495 | int mux_bytes, nr_pins, i; |
| 496 | |
| 497 | mux_bytes = pcs->width / BITS_PER_BYTE; |
| 498 | nr_pins = pcs->size / mux_bytes; |
| 499 | |
| 500 | dev_dbg(pcs->dev, "allocating %i pins\n", nr_pins); |
| 501 | pcs->pins.pa = devm_kzalloc(pcs->dev, |
| 502 | sizeof(*pcs->pins.pa) * nr_pins, |
| 503 | GFP_KERNEL); |
| 504 | if (!pcs->pins.pa) |
| 505 | return -ENOMEM; |
| 506 | |
| 507 | pcs->names = devm_kzalloc(pcs->dev, |
| 508 | sizeof(struct pcs_name) * nr_pins, |
| 509 | GFP_KERNEL); |
| 510 | if (!pcs->names) |
| 511 | return -ENOMEM; |
| 512 | |
| 513 | pcs->desc.pins = pcs->pins.pa; |
| 514 | pcs->desc.npins = nr_pins; |
| 515 | |
| 516 | for (i = 0; i < pcs->desc.npins; i++) { |
| 517 | unsigned offset; |
| 518 | int res; |
| 519 | |
| 520 | offset = i * mux_bytes; |
| 521 | res = pcs_add_pin(pcs, offset); |
| 522 | if (res < 0) { |
| 523 | dev_err(pcs->dev, "error adding pins: %i\n", res); |
| 524 | return res; |
| 525 | } |
| 526 | } |
| 527 | |
| 528 | return 0; |
| 529 | } |
| 530 | |
| 531 | /** |
| 532 | * pcs_add_function() - adds a new function to the function list |
| 533 | * @pcs: pcs driver instance |
| 534 | * @np: device node of the mux entry |
| 535 | * @name: name of the function |
| 536 | * @vals: array of mux register value pairs used by the function |
| 537 | * @nvals: number of mux register value pairs |
| 538 | * @pgnames: array of pingroup names for the function |
| 539 | * @npgnames: number of pingroup names |
| 540 | */ |
| 541 | static struct pcs_function *pcs_add_function(struct pcs_device *pcs, |
| 542 | struct device_node *np, |
| 543 | const char *name, |
| 544 | struct pcs_func_vals *vals, |
| 545 | unsigned nvals, |
| 546 | const char **pgnames, |
| 547 | unsigned npgnames) |
| 548 | { |
| 549 | struct pcs_function *function; |
| 550 | |
| 551 | function = devm_kzalloc(pcs->dev, sizeof(*function), GFP_KERNEL); |
| 552 | if (!function) |
| 553 | return NULL; |
| 554 | |
| 555 | function->name = name; |
| 556 | function->vals = vals; |
| 557 | function->nvals = nvals; |
| 558 | function->pgnames = pgnames; |
| 559 | function->npgnames = npgnames; |
| 560 | |
| 561 | mutex_lock(&pcs->mutex); |
| 562 | list_add_tail(&function->node, &pcs->functions); |
| 563 | radix_tree_insert(&pcs->ftree, pcs->nfuncs, function); |
| 564 | pcs->nfuncs++; |
| 565 | mutex_unlock(&pcs->mutex); |
| 566 | |
| 567 | return function; |
| 568 | } |
| 569 | |
| 570 | static void pcs_remove_function(struct pcs_device *pcs, |
| 571 | struct pcs_function *function) |
| 572 | { |
| 573 | int i; |
| 574 | |
| 575 | mutex_lock(&pcs->mutex); |
| 576 | for (i = 0; i < pcs->nfuncs; i++) { |
| 577 | struct pcs_function *found; |
| 578 | |
| 579 | found = radix_tree_lookup(&pcs->ftree, i); |
| 580 | if (found == function) |
| 581 | radix_tree_delete(&pcs->ftree, i); |
| 582 | } |
| 583 | list_del(&function->node); |
| 584 | mutex_unlock(&pcs->mutex); |
| 585 | } |
| 586 | |
| 587 | /** |
| 588 | * pcs_add_pingroup() - add a pingroup to the pingroup list |
| 589 | * @pcs: pcs driver instance |
| 590 | * @np: device node of the mux entry |
| 591 | * @name: name of the pingroup |
| 592 | * @gpins: array of the pins that belong to the group |
| 593 | * @ngpins: number of pins in the group |
| 594 | */ |
| 595 | static int pcs_add_pingroup(struct pcs_device *pcs, |
| 596 | struct device_node *np, |
| 597 | const char *name, |
| 598 | int *gpins, |
| 599 | int ngpins) |
| 600 | { |
| 601 | struct pcs_pingroup *pingroup; |
| 602 | |
| 603 | pingroup = devm_kzalloc(pcs->dev, sizeof(*pingroup), GFP_KERNEL); |
| 604 | if (!pingroup) |
| 605 | return -ENOMEM; |
| 606 | |
| 607 | pingroup->name = name; |
| 608 | pingroup->np = np; |
| 609 | pingroup->gpins = gpins; |
| 610 | pingroup->ngpins = ngpins; |
| 611 | |
| 612 | mutex_lock(&pcs->mutex); |
| 613 | list_add_tail(&pingroup->node, &pcs->pingroups); |
| 614 | radix_tree_insert(&pcs->pgtree, pcs->ngroups, pingroup); |
| 615 | pcs->ngroups++; |
| 616 | mutex_unlock(&pcs->mutex); |
| 617 | |
| 618 | return 0; |
| 619 | } |
| 620 | |
| 621 | /** |
| 622 | * pcs_get_pin_by_offset() - get a pin index based on the register offset |
| 623 | * @pcs: pcs driver instance |
| 624 | * @offset: register offset from the base |
| 625 | * |
| 626 | * Note that this is OK as long as the pins are in a static array. |
| 627 | */ |
| 628 | static int pcs_get_pin_by_offset(struct pcs_device *pcs, unsigned offset) |
| 629 | { |
| 630 | unsigned index; |
| 631 | |
| 632 | if (offset >= pcs->size) { |
| 633 | dev_err(pcs->dev, "mux offset out of range: 0x%x (0x%x)\n", |
| 634 | offset, pcs->size); |
| 635 | return -EINVAL; |
| 636 | } |
| 637 | |
| 638 | index = offset / (pcs->width / BITS_PER_BYTE); |
| 639 | |
| 640 | return index; |
| 641 | } |
| 642 | |
| 643 | /** |
| 644 | * smux_parse_one_pinctrl_entry() - parses a device tree mux entry |
| 645 | * @pcs: pinctrl driver instance |
| 646 | * @np: device node of the mux entry |
| 647 | * @map: map entry |
| 648 | * @pgnames: pingroup names |
| 649 | * |
| 650 | * Note that this binding currently supports only sets of one register + value. |
| 651 | * |
| 652 | * Also note that this driver tries to avoid understanding pin and function |
| 653 | * names because of the extra bloat they would cause especially in the case of |
| 654 | * a large number of pins. This driver just sets what is specified for the board |
| 655 | * in the .dts file. Further user space debugging tools can be developed to |
| 656 | * decipher the pin and function names using debugfs. |
| 657 | * |
| 658 | * If you are concerned about the boot time, set up the static pins in |
| 659 | * the bootloader, and only set up selected pins as device tree entries. |
| 660 | */ |
| 661 | static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs, |
| 662 | struct device_node *np, |
| 663 | struct pinctrl_map **map, |
| 664 | const char **pgnames) |
| 665 | { |
| 666 | struct pcs_func_vals *vals; |
| 667 | const __be32 *mux; |
Peter Ujfalusi | 9e605cb | 2012-09-11 11:54:24 +0300 | [diff] [blame^] | 668 | int size, params, rows, *pins, index = 0, found = 0, res = -ENOMEM; |
Tony Lindgren | 8b8b091 | 2012-07-10 02:05:46 -0700 | [diff] [blame] | 669 | struct pcs_function *function; |
| 670 | |
Peter Ujfalusi | 9e605cb | 2012-09-11 11:54:24 +0300 | [diff] [blame^] | 671 | if (pcs->bits_per_mux) { |
| 672 | params = 3; |
| 673 | mux = of_get_property(np, PCS_MUX_BITS_NAME, &size); |
| 674 | } else { |
| 675 | params = 2; |
| 676 | mux = of_get_property(np, PCS_MUX_PINS_NAME, &size); |
| 677 | } |
| 678 | |
| 679 | if (!mux) { |
| 680 | dev_err(pcs->dev, "no valid property for %s\n", np->name); |
| 681 | return -EINVAL; |
| 682 | } |
| 683 | |
| 684 | if (size < (sizeof(*mux) * params)) { |
| 685 | dev_err(pcs->dev, "bad data for %s\n", np->name); |
Tony Lindgren | 8b8b091 | 2012-07-10 02:05:46 -0700 | [diff] [blame] | 686 | return -EINVAL; |
| 687 | } |
| 688 | |
| 689 | size /= sizeof(*mux); /* Number of elements in array */ |
Peter Ujfalusi | 9e605cb | 2012-09-11 11:54:24 +0300 | [diff] [blame^] | 690 | rows = size / params; |
Tony Lindgren | 8b8b091 | 2012-07-10 02:05:46 -0700 | [diff] [blame] | 691 | |
| 692 | vals = devm_kzalloc(pcs->dev, sizeof(*vals) * rows, GFP_KERNEL); |
| 693 | if (!vals) |
| 694 | return -ENOMEM; |
| 695 | |
| 696 | pins = devm_kzalloc(pcs->dev, sizeof(*pins) * rows, GFP_KERNEL); |
| 697 | if (!pins) |
| 698 | goto free_vals; |
| 699 | |
| 700 | while (index < size) { |
| 701 | unsigned offset, val; |
| 702 | int pin; |
| 703 | |
| 704 | offset = be32_to_cpup(mux + index++); |
| 705 | val = be32_to_cpup(mux + index++); |
| 706 | vals[found].reg = pcs->base + offset; |
| 707 | vals[found].val = val; |
Peter Ujfalusi | 9e605cb | 2012-09-11 11:54:24 +0300 | [diff] [blame^] | 708 | if (params == 3) { |
| 709 | val = be32_to_cpup(mux + index++); |
| 710 | vals[found].mask = val; |
| 711 | } |
Tony Lindgren | 8b8b091 | 2012-07-10 02:05:46 -0700 | [diff] [blame] | 712 | |
| 713 | pin = pcs_get_pin_by_offset(pcs, offset); |
| 714 | if (pin < 0) { |
| 715 | dev_err(pcs->dev, |
| 716 | "could not add functions for %s %ux\n", |
| 717 | np->name, offset); |
| 718 | break; |
| 719 | } |
| 720 | pins[found++] = pin; |
| 721 | } |
| 722 | |
| 723 | pgnames[0] = np->name; |
| 724 | function = pcs_add_function(pcs, np, np->name, vals, found, pgnames, 1); |
| 725 | if (!function) |
| 726 | goto free_pins; |
| 727 | |
| 728 | res = pcs_add_pingroup(pcs, np, np->name, pins, found); |
| 729 | if (res < 0) |
| 730 | goto free_function; |
| 731 | |
| 732 | (*map)->type = PIN_MAP_TYPE_MUX_GROUP; |
| 733 | (*map)->data.mux.group = np->name; |
| 734 | (*map)->data.mux.function = np->name; |
| 735 | |
| 736 | return 0; |
| 737 | |
| 738 | free_function: |
| 739 | pcs_remove_function(pcs, function); |
| 740 | |
| 741 | free_pins: |
| 742 | devm_kfree(pcs->dev, pins); |
| 743 | |
| 744 | free_vals: |
| 745 | devm_kfree(pcs->dev, vals); |
| 746 | |
| 747 | return res; |
| 748 | } |
| 749 | /** |
| 750 | * pcs_dt_node_to_map() - allocates and parses pinctrl maps |
| 751 | * @pctldev: pinctrl instance |
| 752 | * @np_config: device tree pinmux entry |
| 753 | * @map: array of map entries |
| 754 | * @num_maps: number of maps |
| 755 | */ |
| 756 | static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev, |
| 757 | struct device_node *np_config, |
| 758 | struct pinctrl_map **map, unsigned *num_maps) |
| 759 | { |
| 760 | struct pcs_device *pcs; |
| 761 | const char **pgnames; |
| 762 | int ret; |
| 763 | |
| 764 | pcs = pinctrl_dev_get_drvdata(pctldev); |
| 765 | |
| 766 | *map = devm_kzalloc(pcs->dev, sizeof(**map), GFP_KERNEL); |
| 767 | if (!map) |
| 768 | return -ENOMEM; |
| 769 | |
| 770 | *num_maps = 0; |
| 771 | |
| 772 | pgnames = devm_kzalloc(pcs->dev, sizeof(*pgnames), GFP_KERNEL); |
| 773 | if (!pgnames) { |
| 774 | ret = -ENOMEM; |
| 775 | goto free_map; |
| 776 | } |
| 777 | |
| 778 | ret = pcs_parse_one_pinctrl_entry(pcs, np_config, map, pgnames); |
| 779 | if (ret < 0) { |
| 780 | dev_err(pcs->dev, "no pins entries for %s\n", |
| 781 | np_config->name); |
| 782 | goto free_pgnames; |
| 783 | } |
| 784 | *num_maps = 1; |
| 785 | |
| 786 | return 0; |
| 787 | |
| 788 | free_pgnames: |
| 789 | devm_kfree(pcs->dev, pgnames); |
| 790 | free_map: |
| 791 | devm_kfree(pcs->dev, *map); |
| 792 | |
| 793 | return ret; |
| 794 | } |
| 795 | |
| 796 | /** |
| 797 | * pcs_free_funcs() - free memory used by functions |
| 798 | * @pcs: pcs driver instance |
| 799 | */ |
| 800 | static void pcs_free_funcs(struct pcs_device *pcs) |
| 801 | { |
| 802 | struct list_head *pos, *tmp; |
| 803 | int i; |
| 804 | |
| 805 | mutex_lock(&pcs->mutex); |
| 806 | for (i = 0; i < pcs->nfuncs; i++) { |
| 807 | struct pcs_function *func; |
| 808 | |
| 809 | func = radix_tree_lookup(&pcs->ftree, i); |
| 810 | if (!func) |
| 811 | continue; |
| 812 | radix_tree_delete(&pcs->ftree, i); |
| 813 | } |
| 814 | list_for_each_safe(pos, tmp, &pcs->functions) { |
| 815 | struct pcs_function *function; |
| 816 | |
| 817 | function = list_entry(pos, struct pcs_function, node); |
| 818 | list_del(&function->node); |
| 819 | } |
| 820 | mutex_unlock(&pcs->mutex); |
| 821 | } |
| 822 | |
| 823 | /** |
| 824 | * pcs_free_pingroups() - free memory used by pingroups |
| 825 | * @pcs: pcs driver instance |
| 826 | */ |
| 827 | static void pcs_free_pingroups(struct pcs_device *pcs) |
| 828 | { |
| 829 | struct list_head *pos, *tmp; |
| 830 | int i; |
| 831 | |
| 832 | mutex_lock(&pcs->mutex); |
| 833 | for (i = 0; i < pcs->ngroups; i++) { |
| 834 | struct pcs_pingroup *pingroup; |
| 835 | |
| 836 | pingroup = radix_tree_lookup(&pcs->pgtree, i); |
| 837 | if (!pingroup) |
| 838 | continue; |
| 839 | radix_tree_delete(&pcs->pgtree, i); |
| 840 | } |
| 841 | list_for_each_safe(pos, tmp, &pcs->pingroups) { |
| 842 | struct pcs_pingroup *pingroup; |
| 843 | |
| 844 | pingroup = list_entry(pos, struct pcs_pingroup, node); |
| 845 | list_del(&pingroup->node); |
| 846 | } |
| 847 | mutex_unlock(&pcs->mutex); |
| 848 | } |
| 849 | |
| 850 | /** |
| 851 | * pcs_free_resources() - free memory used by this driver |
| 852 | * @pcs: pcs driver instance |
| 853 | */ |
| 854 | static void pcs_free_resources(struct pcs_device *pcs) |
| 855 | { |
| 856 | if (pcs->pctl) |
| 857 | pinctrl_unregister(pcs->pctl); |
| 858 | |
| 859 | pcs_free_funcs(pcs); |
| 860 | pcs_free_pingroups(pcs); |
| 861 | } |
| 862 | |
| 863 | #define PCS_GET_PROP_U32(name, reg, err) \ |
| 864 | do { \ |
| 865 | ret = of_property_read_u32(np, name, reg); \ |
| 866 | if (ret) { \ |
| 867 | dev_err(pcs->dev, err); \ |
| 868 | return ret; \ |
| 869 | } \ |
| 870 | } while (0); |
| 871 | |
| 872 | static struct of_device_id pcs_of_match[]; |
| 873 | |
| 874 | static int __devinit pcs_probe(struct platform_device *pdev) |
| 875 | { |
| 876 | struct device_node *np = pdev->dev.of_node; |
| 877 | const struct of_device_id *match; |
| 878 | struct resource *res; |
| 879 | struct pcs_device *pcs; |
| 880 | int ret; |
| 881 | |
| 882 | match = of_match_device(pcs_of_match, &pdev->dev); |
| 883 | if (!match) |
| 884 | return -EINVAL; |
| 885 | |
| 886 | pcs = devm_kzalloc(&pdev->dev, sizeof(*pcs), GFP_KERNEL); |
| 887 | if (!pcs) { |
| 888 | dev_err(&pdev->dev, "could not allocate\n"); |
| 889 | return -ENOMEM; |
| 890 | } |
| 891 | pcs->dev = &pdev->dev; |
| 892 | mutex_init(&pcs->mutex); |
| 893 | INIT_LIST_HEAD(&pcs->pingroups); |
| 894 | INIT_LIST_HEAD(&pcs->functions); |
| 895 | |
| 896 | PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width, |
| 897 | "register width not specified\n"); |
| 898 | |
| 899 | PCS_GET_PROP_U32("pinctrl-single,function-mask", &pcs->fmask, |
| 900 | "function register mask not specified\n"); |
| 901 | pcs->fshift = ffs(pcs->fmask) - 1; |
| 902 | pcs->fmax = pcs->fmask >> pcs->fshift; |
| 903 | |
| 904 | ret = of_property_read_u32(np, "pinctrl-single,function-off", |
| 905 | &pcs->foff); |
| 906 | if (ret) |
| 907 | pcs->foff = PCS_OFF_DISABLED; |
| 908 | |
Peter Ujfalusi | 9e605cb | 2012-09-11 11:54:24 +0300 | [diff] [blame^] | 909 | pcs->bits_per_mux = of_property_read_bool(np, |
| 910 | "pinctrl-single,bit-per-mux"); |
| 911 | |
Tony Lindgren | 8b8b091 | 2012-07-10 02:05:46 -0700 | [diff] [blame] | 912 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 913 | if (!res) { |
| 914 | dev_err(pcs->dev, "could not get resource\n"); |
| 915 | return -ENODEV; |
| 916 | } |
| 917 | |
| 918 | pcs->res = devm_request_mem_region(pcs->dev, res->start, |
| 919 | resource_size(res), DRIVER_NAME); |
| 920 | if (!pcs->res) { |
| 921 | dev_err(pcs->dev, "could not get mem_region\n"); |
| 922 | return -EBUSY; |
| 923 | } |
| 924 | |
| 925 | pcs->size = resource_size(pcs->res); |
| 926 | pcs->base = devm_ioremap(pcs->dev, pcs->res->start, pcs->size); |
| 927 | if (!pcs->base) { |
| 928 | dev_err(pcs->dev, "could not ioremap\n"); |
| 929 | return -ENODEV; |
| 930 | } |
| 931 | |
| 932 | INIT_RADIX_TREE(&pcs->pgtree, GFP_KERNEL); |
| 933 | INIT_RADIX_TREE(&pcs->ftree, GFP_KERNEL); |
| 934 | platform_set_drvdata(pdev, pcs); |
| 935 | |
| 936 | switch (pcs->width) { |
| 937 | case 8: |
| 938 | pcs->read = pcs_readb; |
| 939 | pcs->write = pcs_writeb; |
| 940 | break; |
| 941 | case 16: |
| 942 | pcs->read = pcs_readw; |
| 943 | pcs->write = pcs_writew; |
| 944 | break; |
| 945 | case 32: |
| 946 | pcs->read = pcs_readl; |
| 947 | pcs->write = pcs_writel; |
| 948 | break; |
| 949 | default: |
| 950 | break; |
| 951 | } |
| 952 | |
| 953 | pcs->desc.name = DRIVER_NAME; |
| 954 | pcs->desc.pctlops = &pcs_pinctrl_ops; |
| 955 | pcs->desc.pmxops = &pcs_pinmux_ops; |
| 956 | pcs->desc.confops = &pcs_pinconf_ops; |
| 957 | pcs->desc.owner = THIS_MODULE; |
| 958 | |
| 959 | ret = pcs_allocate_pin_table(pcs); |
| 960 | if (ret < 0) |
| 961 | goto free; |
| 962 | |
| 963 | pcs->pctl = pinctrl_register(&pcs->desc, pcs->dev, pcs); |
| 964 | if (!pcs->pctl) { |
| 965 | dev_err(pcs->dev, "could not register single pinctrl driver\n"); |
| 966 | ret = -EINVAL; |
| 967 | goto free; |
| 968 | } |
| 969 | |
| 970 | dev_info(pcs->dev, "%i pins at pa %p size %u\n", |
| 971 | pcs->desc.npins, pcs->base, pcs->size); |
| 972 | |
| 973 | return 0; |
| 974 | |
| 975 | free: |
| 976 | pcs_free_resources(pcs); |
| 977 | |
| 978 | return ret; |
| 979 | } |
| 980 | |
| 981 | static int __devexit pcs_remove(struct platform_device *pdev) |
| 982 | { |
| 983 | struct pcs_device *pcs = platform_get_drvdata(pdev); |
| 984 | |
| 985 | if (!pcs) |
| 986 | return 0; |
| 987 | |
| 988 | pcs_free_resources(pcs); |
| 989 | |
| 990 | return 0; |
| 991 | } |
| 992 | |
| 993 | static struct of_device_id pcs_of_match[] __devinitdata = { |
| 994 | { .compatible = DRIVER_NAME, }, |
| 995 | { }, |
| 996 | }; |
| 997 | MODULE_DEVICE_TABLE(of, pcs_of_match); |
| 998 | |
| 999 | static struct platform_driver pcs_driver = { |
| 1000 | .probe = pcs_probe, |
| 1001 | .remove = __devexit_p(pcs_remove), |
| 1002 | .driver = { |
| 1003 | .owner = THIS_MODULE, |
| 1004 | .name = DRIVER_NAME, |
| 1005 | .of_match_table = pcs_of_match, |
| 1006 | }, |
| 1007 | }; |
| 1008 | |
| 1009 | module_platform_driver(pcs_driver); |
| 1010 | |
| 1011 | MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>"); |
| 1012 | MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver"); |
| 1013 | MODULE_LICENSE("GPL v2"); |