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Pierre Ossmand129bce2006-03-24 03:18:17 -08001/*
2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
3 *
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
Pierre Ossmand129bce2006-03-24 03:18:17 -080011#include <linux/delay.h>
12#include <linux/highmem.h>
13#include <linux/pci.h>
14#include <linux/dma-mapping.h>
15
16#include <linux/mmc/host.h>
17#include <linux/mmc/protocol.h>
18
19#include <asm/scatterlist.h>
20
21#include "sdhci.h"
22
23#define DRIVER_NAME "sdhci"
Pierre Ossman2c5f3942006-06-30 02:22:32 -070024#define DRIVER_VERSION "0.12"
Pierre Ossmand129bce2006-03-24 03:18:17 -080025
26#define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
27
Pierre Ossmand129bce2006-03-24 03:18:17 -080028#define DBG(f, x...) \
Russell Kingc6563172006-03-29 09:30:20 +010029 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
Pierre Ossmand129bce2006-03-24 03:18:17 -080030
Pierre Ossman67435272006-06-30 02:22:31 -070031static unsigned int debug_nodma = 0;
32static unsigned int debug_forcedma = 0;
Pierre Ossmandf673b22006-06-30 02:22:31 -070033static unsigned int debug_quirks = 0;
Pierre Ossman67435272006-06-30 02:22:31 -070034
Pierre Ossman645289d2006-06-30 02:22:33 -070035#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0)
Pierre Ossman98608072006-06-30 02:22:34 -070036#define SDHCI_QUIRK_FORCE_DMA (1<<1)
Pierre Ossman645289d2006-06-30 02:22:33 -070037
Pierre Ossmand129bce2006-03-24 03:18:17 -080038static const struct pci_device_id pci_ids[] __devinitdata = {
Pierre Ossman645289d2006-06-30 02:22:33 -070039 {
40 .vendor = PCI_VENDOR_ID_RICOH,
41 .device = PCI_DEVICE_ID_RICOH_R5C822,
42 .subvendor = PCI_VENDOR_ID_IBM,
43 .subdevice = PCI_ANY_ID,
Pierre Ossman98608072006-06-30 02:22:34 -070044 .driver_data = SDHCI_QUIRK_CLOCK_BEFORE_RESET |
45 SDHCI_QUIRK_FORCE_DMA,
46 },
47
48 {
49 .vendor = PCI_VENDOR_ID_RICOH,
50 .device = PCI_DEVICE_ID_RICOH_R5C822,
51 .subvendor = PCI_ANY_ID,
52 .subdevice = PCI_ANY_ID,
53 .driver_data = SDHCI_QUIRK_FORCE_DMA,
54 },
55
56 {
57 .vendor = PCI_VENDOR_ID_TI,
58 .device = PCI_DEVICE_ID_TI_XX21_XX11_SD,
59 .subvendor = PCI_ANY_ID,
60 .subdevice = PCI_ANY_ID,
61 .driver_data = SDHCI_QUIRK_FORCE_DMA,
Pierre Ossman645289d2006-06-30 02:22:33 -070062 },
63
64 { /* Generic SD host controller */
65 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
66 },
67
Pierre Ossmand129bce2006-03-24 03:18:17 -080068 { /* end: all zeroes */ },
69};
70
71MODULE_DEVICE_TABLE(pci, pci_ids);
72
73static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
74static void sdhci_finish_data(struct sdhci_host *);
75
76static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
77static void sdhci_finish_command(struct sdhci_host *);
78
79static void sdhci_dumpregs(struct sdhci_host *host)
80{
81 printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
82
83 printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
84 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
85 readw(host->ioaddr + SDHCI_HOST_VERSION));
86 printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
87 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
88 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
89 printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
90 readl(host->ioaddr + SDHCI_ARGUMENT),
91 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
92 printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
93 readl(host->ioaddr + SDHCI_PRESENT_STATE),
94 readb(host->ioaddr + SDHCI_HOST_CONTROL));
95 printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
96 readb(host->ioaddr + SDHCI_POWER_CONTROL),
97 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
98 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
99 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
100 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
101 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
102 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
103 readl(host->ioaddr + SDHCI_INT_STATUS));
104 printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
105 readl(host->ioaddr + SDHCI_INT_ENABLE),
106 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
107 printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
108 readw(host->ioaddr + SDHCI_ACMD12_ERR),
109 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
110 printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n",
111 readl(host->ioaddr + SDHCI_CAPABILITIES),
112 readl(host->ioaddr + SDHCI_MAX_CURRENT));
113
114 printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
115}
116
117/*****************************************************************************\
118 * *
119 * Low level functions *
120 * *
121\*****************************************************************************/
122
123static void sdhci_reset(struct sdhci_host *host, u8 mask)
124{
Pierre Ossmane16514d82006-06-30 02:22:24 -0700125 unsigned long timeout;
126
Pierre Ossmand129bce2006-03-24 03:18:17 -0800127 writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
128
Pierre Ossmane16514d82006-06-30 02:22:24 -0700129 if (mask & SDHCI_RESET_ALL)
Pierre Ossmand129bce2006-03-24 03:18:17 -0800130 host->clock = 0;
131
Pierre Ossmane16514d82006-06-30 02:22:24 -0700132 /* Wait max 100 ms */
133 timeout = 100;
134
135 /* hw clears the bit when it's done */
136 while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
137 if (timeout == 0) {
138 printk(KERN_ERR "%s: Reset 0x%x never completed. "
139 "Please report this to " BUGMAIL ".\n",
140 mmc_hostname(host->mmc), (int)mask);
141 sdhci_dumpregs(host);
142 return;
143 }
144 timeout--;
145 mdelay(1);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800146 }
147}
148
149static void sdhci_init(struct sdhci_host *host)
150{
151 u32 intmask;
152
153 sdhci_reset(host, SDHCI_RESET_ALL);
154
Pierre Ossman3192a282006-06-30 02:22:26 -0700155 intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
156 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
157 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
158 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100159 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
Pierre Ossman3192a282006-06-30 02:22:26 -0700160 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
Pierre Ossmand129bce2006-03-24 03:18:17 -0800161
162 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
163 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800164}
165
166static void sdhci_activate_led(struct sdhci_host *host)
167{
168 u8 ctrl;
169
170 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
171 ctrl |= SDHCI_CTRL_LED;
172 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
173}
174
175static void sdhci_deactivate_led(struct sdhci_host *host)
176{
177 u8 ctrl;
178
179 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
180 ctrl &= ~SDHCI_CTRL_LED;
181 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
182}
183
184/*****************************************************************************\
185 * *
186 * Core functions *
187 * *
188\*****************************************************************************/
189
190static inline char* sdhci_kmap_sg(struct sdhci_host* host)
191{
192 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
193 return host->mapped_sg + host->cur_sg->offset;
194}
195
196static inline void sdhci_kunmap_sg(struct sdhci_host* host)
197{
198 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
199}
200
201static inline int sdhci_next_sg(struct sdhci_host* host)
202{
203 /*
204 * Skip to next SG entry.
205 */
206 host->cur_sg++;
207 host->num_sg--;
208
209 /*
210 * Any entries left?
211 */
212 if (host->num_sg > 0) {
213 host->offset = 0;
214 host->remain = host->cur_sg->length;
215 }
216
217 return host->num_sg;
218}
219
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100220static void sdhci_read_block_pio(struct sdhci_host *host)
Pierre Ossmand129bce2006-03-24 03:18:17 -0800221{
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100222 int blksize, chunk_remain;
223 u32 data;
Pierre Ossmand129bce2006-03-24 03:18:17 -0800224 char *buffer;
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100225 int size;
Pierre Ossmand129bce2006-03-24 03:18:17 -0800226
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100227 DBG("PIO reading\n");
Pierre Ossmand129bce2006-03-24 03:18:17 -0800228
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100229 blksize = host->data->blksz;
230 chunk_remain = 0;
231 data = 0;
Pierre Ossmand129bce2006-03-24 03:18:17 -0800232
233 buffer = sdhci_kmap_sg(host) + host->offset;
234
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100235 while (blksize) {
236 if (chunk_remain == 0) {
237 data = readl(host->ioaddr + SDHCI_BUFFER);
238 chunk_remain = min(blksize, 4);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800239 }
240
Pierre Ossmand129bce2006-03-24 03:18:17 -0800241 size = min(host->size, host->remain);
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100242 size = min(size, chunk_remain);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800243
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100244 chunk_remain -= size;
245 blksize -= size;
Pierre Ossmand129bce2006-03-24 03:18:17 -0800246 host->offset += size;
247 host->remain -= size;
Pierre Ossmand129bce2006-03-24 03:18:17 -0800248 host->size -= size;
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100249 while (size) {
250 *buffer = data & 0xFF;
251 buffer++;
252 data >>= 8;
253 size--;
254 }
Pierre Ossmand129bce2006-03-24 03:18:17 -0800255
256 if (host->remain == 0) {
257 sdhci_kunmap_sg(host);
258 if (sdhci_next_sg(host) == 0) {
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100259 BUG_ON(blksize != 0);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800260 return;
261 }
262 buffer = sdhci_kmap_sg(host);
263 }
264 }
265
266 sdhci_kunmap_sg(host);
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100267}
Pierre Ossmand129bce2006-03-24 03:18:17 -0800268
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100269static void sdhci_write_block_pio(struct sdhci_host *host)
270{
271 int blksize, chunk_remain;
272 u32 data;
273 char *buffer;
274 int bytes, size;
275
276 DBG("PIO writing\n");
277
278 blksize = host->data->blksz;
279 chunk_remain = 4;
280 data = 0;
281
282 bytes = 0;
283 buffer = sdhci_kmap_sg(host) + host->offset;
284
285 while (blksize) {
286 size = min(host->size, host->remain);
287 size = min(size, chunk_remain);
288
289 chunk_remain -= size;
290 blksize -= size;
291 host->offset += size;
292 host->remain -= size;
293 host->size -= size;
294 while (size) {
295 data >>= 8;
296 data |= (u32)*buffer << 24;
297 buffer++;
298 size--;
299 }
300
301 if (chunk_remain == 0) {
302 writel(data, host->ioaddr + SDHCI_BUFFER);
303 chunk_remain = min(blksize, 4);
304 }
305
306 if (host->remain == 0) {
307 sdhci_kunmap_sg(host);
308 if (sdhci_next_sg(host) == 0) {
309 BUG_ON(blksize != 0);
310 return;
311 }
312 buffer = sdhci_kmap_sg(host);
313 }
314 }
315
316 sdhci_kunmap_sg(host);
317}
318
319static void sdhci_transfer_pio(struct sdhci_host *host)
320{
321 u32 mask;
322
323 BUG_ON(!host->data);
324
325 if (host->size == 0)
326 return;
327
328 if (host->data->flags & MMC_DATA_READ)
329 mask = SDHCI_DATA_AVAILABLE;
330 else
331 mask = SDHCI_SPACE_AVAILABLE;
332
333 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
334 if (host->data->flags & MMC_DATA_READ)
335 sdhci_read_block_pio(host);
336 else
337 sdhci_write_block_pio(host);
338
339 if (host->size == 0)
340 break;
341
342 BUG_ON(host->num_sg == 0);
343 }
344
345 DBG("PIO transfer complete.\n");
Pierre Ossmand129bce2006-03-24 03:18:17 -0800346}
347
348static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
349{
Pierre Ossman1c8cde92006-06-30 02:22:25 -0700350 u8 count;
351 unsigned target_timeout, current_timeout;
Pierre Ossmand129bce2006-03-24 03:18:17 -0800352
353 WARN_ON(host->data);
354
Pierre Ossmanc7fa9962006-06-30 02:22:25 -0700355 if (data == NULL)
Pierre Ossmand129bce2006-03-24 03:18:17 -0800356 return;
Pierre Ossmand129bce2006-03-24 03:18:17 -0800357
358 DBG("blksz %04x blks %04x flags %08x\n",
Russell Kinga3fd4a12006-06-04 17:51:15 +0100359 data->blksz, data->blocks, data->flags);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800360 DBG("tsac %d ms nsac %d clk\n",
361 data->timeout_ns / 1000000, data->timeout_clks);
362
Pierre Ossmanbab76962006-07-02 16:51:35 +0100363 /* Sanity checks */
364 BUG_ON(data->blksz * data->blocks > 524288);
Pierre Ossman1d676e02006-07-02 16:52:10 +0100365 BUG_ON(data->blksz > host->max_block);
366 BUG_ON(data->blocks > 65535);
Pierre Ossmanbab76962006-07-02 16:51:35 +0100367
Pierre Ossman1c8cde92006-06-30 02:22:25 -0700368 /* timeout in us */
369 target_timeout = data->timeout_ns / 1000 +
370 data->timeout_clks / host->clock;
371
372 /*
373 * Figure out needed cycles.
374 * We do this in steps in order to fit inside a 32 bit int.
375 * The first step is the minimum timeout, which will have a
376 * minimum resolution of 6 bits:
377 * (1) 2^13*1000 > 2^22,
378 * (2) host->timeout_clk < 2^16
379 * =>
380 * (1) / (2) > 2^6
381 */
382 count = 0;
383 current_timeout = (1 << 13) * 1000 / host->timeout_clk;
384 while (current_timeout < target_timeout) {
385 count++;
386 current_timeout <<= 1;
387 if (count >= 0xF)
388 break;
389 }
390
391 if (count >= 0xF) {
392 printk(KERN_WARNING "%s: Too large timeout requested!\n",
393 mmc_hostname(host->mmc));
394 count = 0xE;
395 }
396
397 writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
398
Pierre Ossmand129bce2006-03-24 03:18:17 -0800399 if (host->flags & SDHCI_USE_DMA) {
400 int count;
401
402 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
403 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
404 BUG_ON(count != 1);
405
406 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
407 } else {
Russell Kinga3fd4a12006-06-04 17:51:15 +0100408 host->size = data->blksz * data->blocks;
Pierre Ossmand129bce2006-03-24 03:18:17 -0800409
410 host->cur_sg = data->sg;
411 host->num_sg = data->sg_len;
412
413 host->offset = 0;
414 host->remain = host->cur_sg->length;
415 }
Pierre Ossmanc7fa9962006-06-30 02:22:25 -0700416
Pierre Ossmanbab76962006-07-02 16:51:35 +0100417 /* We do not handle DMA boundaries, so set it to max (512 KiB) */
418 writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
419 host->ioaddr + SDHCI_BLOCK_SIZE);
Pierre Ossmanc7fa9962006-06-30 02:22:25 -0700420 writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
421}
422
423static void sdhci_set_transfer_mode(struct sdhci_host *host,
424 struct mmc_data *data)
425{
426 u16 mode;
427
428 WARN_ON(host->data);
429
430 if (data == NULL)
431 return;
432
433 mode = SDHCI_TRNS_BLK_CNT_EN;
434 if (data->blocks > 1)
435 mode |= SDHCI_TRNS_MULTI;
436 if (data->flags & MMC_DATA_READ)
437 mode |= SDHCI_TRNS_READ;
438 if (host->flags & SDHCI_USE_DMA)
439 mode |= SDHCI_TRNS_DMA;
440
441 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800442}
443
444static void sdhci_finish_data(struct sdhci_host *host)
445{
446 struct mmc_data *data;
Pierre Ossmand129bce2006-03-24 03:18:17 -0800447 u16 blocks;
448
449 BUG_ON(!host->data);
450
451 data = host->data;
452 host->data = NULL;
453
454 if (host->flags & SDHCI_USE_DMA) {
455 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
456 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800457 }
458
459 /*
460 * Controller doesn't count down when in single block mode.
461 */
462 if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
463 blocks = 0;
464 else
465 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
Russell Kinga3fd4a12006-06-04 17:51:15 +0100466 data->bytes_xfered = data->blksz * (data->blocks - blocks);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800467
468 if ((data->error == MMC_ERR_NONE) && blocks) {
469 printk(KERN_ERR "%s: Controller signalled completion even "
470 "though there were blocks left. Please report this "
471 "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
472 data->error = MMC_ERR_FAILED;
473 }
474
475 if (host->size != 0) {
476 printk(KERN_ERR "%s: %d bytes were left untransferred. "
477 "Please report this to " BUGMAIL ".\n",
478 mmc_hostname(host->mmc), host->size);
479 data->error = MMC_ERR_FAILED;
480 }
481
482 DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
483
484 if (data->stop) {
485 /*
486 * The controller needs a reset of internal state machines
487 * upon error conditions.
488 */
489 if (data->error != MMC_ERR_NONE) {
490 sdhci_reset(host, SDHCI_RESET_CMD);
491 sdhci_reset(host, SDHCI_RESET_DATA);
492 }
493
494 sdhci_send_command(host, data->stop);
495 } else
496 tasklet_schedule(&host->finish_tasklet);
497}
498
499static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
500{
501 int flags;
Pierre Ossmanfd2208d2006-06-30 02:22:28 -0700502 u32 mask;
Pierre Ossman7cb2c762006-06-30 02:22:23 -0700503 unsigned long timeout;
Pierre Ossmand129bce2006-03-24 03:18:17 -0800504
505 WARN_ON(host->cmd);
506
507 DBG("Sending cmd (%x)\n", cmd->opcode);
508
509 /* Wait max 10 ms */
Pierre Ossman7cb2c762006-06-30 02:22:23 -0700510 timeout = 10;
Pierre Ossmanfd2208d2006-06-30 02:22:28 -0700511
512 mask = SDHCI_CMD_INHIBIT;
513 if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
514 mask |= SDHCI_DATA_INHIBIT;
515
516 /* We shouldn't wait for data inihibit for stop commands, even
517 though they might use busy signaling */
518 if (host->mrq->data && (cmd == host->mrq->data->stop))
519 mask &= ~SDHCI_DATA_INHIBIT;
520
521 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
Pierre Ossman7cb2c762006-06-30 02:22:23 -0700522 if (timeout == 0) {
Pierre Ossmand129bce2006-03-24 03:18:17 -0800523 printk(KERN_ERR "%s: Controller never released "
Pierre Ossmanfd2208d2006-06-30 02:22:28 -0700524 "inhibit bit(s). Please report this to "
Pierre Ossmand129bce2006-03-24 03:18:17 -0800525 BUGMAIL ".\n", mmc_hostname(host->mmc));
526 sdhci_dumpregs(host);
527 cmd->error = MMC_ERR_FAILED;
528 tasklet_schedule(&host->finish_tasklet);
529 return;
530 }
Pierre Ossman7cb2c762006-06-30 02:22:23 -0700531 timeout--;
532 mdelay(1);
533 }
Pierre Ossmand129bce2006-03-24 03:18:17 -0800534
535 mod_timer(&host->timer, jiffies + 10 * HZ);
536
537 host->cmd = cmd;
538
539 sdhci_prepare_data(host, cmd->data);
540
541 writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
542
Pierre Ossmanc7fa9962006-06-30 02:22:25 -0700543 sdhci_set_transfer_mode(host, cmd->data);
544
Pierre Ossmand129bce2006-03-24 03:18:17 -0800545 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
546 printk(KERN_ERR "%s: Unsupported response type! "
547 "Please report this to " BUGMAIL ".\n",
548 mmc_hostname(host->mmc));
549 cmd->error = MMC_ERR_INVALID;
550 tasklet_schedule(&host->finish_tasklet);
551 return;
552 }
553
554 if (!(cmd->flags & MMC_RSP_PRESENT))
555 flags = SDHCI_CMD_RESP_NONE;
556 else if (cmd->flags & MMC_RSP_136)
557 flags = SDHCI_CMD_RESP_LONG;
558 else if (cmd->flags & MMC_RSP_BUSY)
559 flags = SDHCI_CMD_RESP_SHORT_BUSY;
560 else
561 flags = SDHCI_CMD_RESP_SHORT;
562
563 if (cmd->flags & MMC_RSP_CRC)
564 flags |= SDHCI_CMD_CRC;
565 if (cmd->flags & MMC_RSP_OPCODE)
566 flags |= SDHCI_CMD_INDEX;
567 if (cmd->data)
568 flags |= SDHCI_CMD_DATA;
569
570 writel(SDHCI_MAKE_CMD(cmd->opcode, flags),
571 host->ioaddr + SDHCI_COMMAND);
572}
573
574static void sdhci_finish_command(struct sdhci_host *host)
575{
576 int i;
577
578 BUG_ON(host->cmd == NULL);
579
580 if (host->cmd->flags & MMC_RSP_PRESENT) {
581 if (host->cmd->flags & MMC_RSP_136) {
582 /* CRC is stripped so we need to do some shifting. */
583 for (i = 0;i < 4;i++) {
584 host->cmd->resp[i] = readl(host->ioaddr +
585 SDHCI_RESPONSE + (3-i)*4) << 8;
586 if (i != 3)
587 host->cmd->resp[i] |=
588 readb(host->ioaddr +
589 SDHCI_RESPONSE + (3-i)*4-1);
590 }
591 } else {
592 host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
593 }
594 }
595
596 host->cmd->error = MMC_ERR_NONE;
597
598 DBG("Ending cmd (%x)\n", host->cmd->opcode);
599
Pierre Ossman3192a282006-06-30 02:22:26 -0700600 if (host->cmd->data)
Pierre Ossmand129bce2006-03-24 03:18:17 -0800601 host->data = host->cmd->data;
Pierre Ossman3192a282006-06-30 02:22:26 -0700602 else
Pierre Ossmand129bce2006-03-24 03:18:17 -0800603 tasklet_schedule(&host->finish_tasklet);
604
605 host->cmd = NULL;
606}
607
608static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
609{
610 int div;
611 u16 clk;
Pierre Ossman7cb2c762006-06-30 02:22:23 -0700612 unsigned long timeout;
Pierre Ossmand129bce2006-03-24 03:18:17 -0800613
614 if (clock == host->clock)
615 return;
616
617 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
618
619 if (clock == 0)
620 goto out;
621
622 for (div = 1;div < 256;div *= 2) {
623 if ((host->max_clk / div) <= clock)
624 break;
625 }
626 div >>= 1;
627
628 clk = div << SDHCI_DIVIDER_SHIFT;
629 clk |= SDHCI_CLOCK_INT_EN;
630 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
631
632 /* Wait max 10 ms */
Pierre Ossman7cb2c762006-06-30 02:22:23 -0700633 timeout = 10;
634 while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
635 & SDHCI_CLOCK_INT_STABLE)) {
636 if (timeout == 0) {
Pierre Ossmand129bce2006-03-24 03:18:17 -0800637 printk(KERN_ERR "%s: Internal clock never stabilised. "
638 "Please report this to " BUGMAIL ".\n",
639 mmc_hostname(host->mmc));
640 sdhci_dumpregs(host);
641 return;
642 }
Pierre Ossman7cb2c762006-06-30 02:22:23 -0700643 timeout--;
644 mdelay(1);
645 }
Pierre Ossmand129bce2006-03-24 03:18:17 -0800646
647 clk |= SDHCI_CLOCK_CARD_EN;
648 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
649
650out:
651 host->clock = clock;
652}
653
Pierre Ossman146ad662006-06-30 02:22:23 -0700654static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
655{
656 u8 pwr;
657
658 if (host->power == power)
659 return;
660
661 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
662
663 if (power == (unsigned short)-1)
664 goto out;
665
666 pwr = SDHCI_POWER_ON;
667
668 switch (power) {
669 case MMC_VDD_170:
670 case MMC_VDD_180:
671 case MMC_VDD_190:
672 pwr |= SDHCI_POWER_180;
673 break;
674 case MMC_VDD_290:
675 case MMC_VDD_300:
676 case MMC_VDD_310:
677 pwr |= SDHCI_POWER_300;
678 break;
679 case MMC_VDD_320:
680 case MMC_VDD_330:
681 case MMC_VDD_340:
682 pwr |= SDHCI_POWER_330;
683 break;
684 default:
685 BUG();
686 }
687
688 writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
689
690out:
691 host->power = power;
692}
693
Pierre Ossmand129bce2006-03-24 03:18:17 -0800694/*****************************************************************************\
695 * *
696 * MMC callbacks *
697 * *
698\*****************************************************************************/
699
700static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
701{
702 struct sdhci_host *host;
703 unsigned long flags;
704
705 host = mmc_priv(mmc);
706
707 spin_lock_irqsave(&host->lock, flags);
708
709 WARN_ON(host->mrq != NULL);
710
711 sdhci_activate_led(host);
712
713 host->mrq = mrq;
714
715 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
716 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
717 tasklet_schedule(&host->finish_tasklet);
718 } else
719 sdhci_send_command(host, mrq->cmd);
720
721 spin_unlock_irqrestore(&host->lock, flags);
722}
723
724static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
725{
726 struct sdhci_host *host;
727 unsigned long flags;
728 u8 ctrl;
729
730 host = mmc_priv(mmc);
731
732 spin_lock_irqsave(&host->lock, flags);
733
Pierre Ossmand129bce2006-03-24 03:18:17 -0800734 /*
735 * Reset the chip on each power off.
736 * Should clear out any weird states.
737 */
738 if (ios->power_mode == MMC_POWER_OFF) {
739 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800740 sdhci_init(host);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800741 }
742
743 sdhci_set_clock(host, ios->clock);
744
745 if (ios->power_mode == MMC_POWER_OFF)
Pierre Ossman146ad662006-06-30 02:22:23 -0700746 sdhci_set_power(host, -1);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800747 else
Pierre Ossman146ad662006-06-30 02:22:23 -0700748 sdhci_set_power(host, ios->vdd);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800749
750 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
751 if (ios->bus_width == MMC_BUS_WIDTH_4)
752 ctrl |= SDHCI_CTRL_4BITBUS;
753 else
754 ctrl &= ~SDHCI_CTRL_4BITBUS;
755 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
756
757 spin_unlock_irqrestore(&host->lock, flags);
758}
759
760static int sdhci_get_ro(struct mmc_host *mmc)
761{
762 struct sdhci_host *host;
763 unsigned long flags;
764 int present;
765
766 host = mmc_priv(mmc);
767
768 spin_lock_irqsave(&host->lock, flags);
769
770 present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
771
772 spin_unlock_irqrestore(&host->lock, flags);
773
774 return !(present & SDHCI_WRITE_PROTECT);
775}
776
777static struct mmc_host_ops sdhci_ops = {
778 .request = sdhci_request,
779 .set_ios = sdhci_set_ios,
780 .get_ro = sdhci_get_ro,
781};
782
783/*****************************************************************************\
784 * *
785 * Tasklets *
786 * *
787\*****************************************************************************/
788
789static void sdhci_tasklet_card(unsigned long param)
790{
791 struct sdhci_host *host;
792 unsigned long flags;
793
794 host = (struct sdhci_host*)param;
795
796 spin_lock_irqsave(&host->lock, flags);
797
798 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
799 if (host->mrq) {
800 printk(KERN_ERR "%s: Card removed during transfer!\n",
801 mmc_hostname(host->mmc));
802 printk(KERN_ERR "%s: Resetting controller.\n",
803 mmc_hostname(host->mmc));
804
805 sdhci_reset(host, SDHCI_RESET_CMD);
806 sdhci_reset(host, SDHCI_RESET_DATA);
807
808 host->mrq->cmd->error = MMC_ERR_FAILED;
809 tasklet_schedule(&host->finish_tasklet);
810 }
811 }
812
813 spin_unlock_irqrestore(&host->lock, flags);
814
815 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
816}
817
818static void sdhci_tasklet_finish(unsigned long param)
819{
820 struct sdhci_host *host;
821 unsigned long flags;
822 struct mmc_request *mrq;
823
824 host = (struct sdhci_host*)param;
825
826 spin_lock_irqsave(&host->lock, flags);
827
828 del_timer(&host->timer);
829
830 mrq = host->mrq;
831
832 DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
833
834 /*
835 * The controller needs a reset of internal state machines
836 * upon error conditions.
837 */
838 if ((mrq->cmd->error != MMC_ERR_NONE) ||
839 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
840 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
Pierre Ossman645289d2006-06-30 02:22:33 -0700841
842 /* Some controllers need this kick or reset won't work here */
843 if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
844 unsigned int clock;
845
846 /* This is to force an update */
847 clock = host->clock;
848 host->clock = 0;
849 sdhci_set_clock(host, clock);
850 }
851
852 /* Spec says we should do both at the same time, but Ricoh
853 controllers do not like that. */
Pierre Ossmand129bce2006-03-24 03:18:17 -0800854 sdhci_reset(host, SDHCI_RESET_CMD);
855 sdhci_reset(host, SDHCI_RESET_DATA);
856 }
857
858 host->mrq = NULL;
859 host->cmd = NULL;
860 host->data = NULL;
861
862 sdhci_deactivate_led(host);
863
864 spin_unlock_irqrestore(&host->lock, flags);
865
866 mmc_request_done(host->mmc, mrq);
867}
868
869static void sdhci_timeout_timer(unsigned long data)
870{
871 struct sdhci_host *host;
872 unsigned long flags;
873
874 host = (struct sdhci_host*)data;
875
876 spin_lock_irqsave(&host->lock, flags);
877
878 if (host->mrq) {
879 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
880 "Please report this to " BUGMAIL ".\n",
881 mmc_hostname(host->mmc));
882 sdhci_dumpregs(host);
883
884 if (host->data) {
885 host->data->error = MMC_ERR_TIMEOUT;
886 sdhci_finish_data(host);
887 } else {
888 if (host->cmd)
889 host->cmd->error = MMC_ERR_TIMEOUT;
890 else
891 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
892
893 tasklet_schedule(&host->finish_tasklet);
894 }
895 }
896
897 spin_unlock_irqrestore(&host->lock, flags);
898}
899
900/*****************************************************************************\
901 * *
902 * Interrupt handling *
903 * *
904\*****************************************************************************/
905
906static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
907{
908 BUG_ON(intmask == 0);
909
910 if (!host->cmd) {
911 printk(KERN_ERR "%s: Got command interrupt even though no "
912 "command operation was in progress.\n",
913 mmc_hostname(host->mmc));
914 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
915 mmc_hostname(host->mmc));
916 sdhci_dumpregs(host);
917 return;
918 }
919
920 if (intmask & SDHCI_INT_RESPONSE)
921 sdhci_finish_command(host);
922 else {
923 if (intmask & SDHCI_INT_TIMEOUT)
924 host->cmd->error = MMC_ERR_TIMEOUT;
925 else if (intmask & SDHCI_INT_CRC)
926 host->cmd->error = MMC_ERR_BADCRC;
927 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
928 host->cmd->error = MMC_ERR_FAILED;
929 else
930 host->cmd->error = MMC_ERR_INVALID;
931
932 tasklet_schedule(&host->finish_tasklet);
933 }
934}
935
936static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
937{
938 BUG_ON(intmask == 0);
939
940 if (!host->data) {
941 /*
942 * A data end interrupt is sent together with the response
943 * for the stop command.
944 */
945 if (intmask & SDHCI_INT_DATA_END)
946 return;
947
948 printk(KERN_ERR "%s: Got data interrupt even though no "
949 "data operation was in progress.\n",
950 mmc_hostname(host->mmc));
951 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
952 mmc_hostname(host->mmc));
953 sdhci_dumpregs(host);
954
955 return;
956 }
957
958 if (intmask & SDHCI_INT_DATA_TIMEOUT)
959 host->data->error = MMC_ERR_TIMEOUT;
960 else if (intmask & SDHCI_INT_DATA_CRC)
961 host->data->error = MMC_ERR_BADCRC;
962 else if (intmask & SDHCI_INT_DATA_END_BIT)
963 host->data->error = MMC_ERR_FAILED;
964
965 if (host->data->error != MMC_ERR_NONE)
966 sdhci_finish_data(host);
967 else {
Pierre Ossmana406f5a2006-07-02 16:50:59 +0100968 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
Pierre Ossmand129bce2006-03-24 03:18:17 -0800969 sdhci_transfer_pio(host);
970
971 if (intmask & SDHCI_INT_DATA_END)
972 sdhci_finish_data(host);
973 }
974}
975
976static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs)
977{
978 irqreturn_t result;
979 struct sdhci_host* host = dev_id;
980 u32 intmask;
981
982 spin_lock(&host->lock);
983
984 intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
985
986 if (!intmask) {
987 result = IRQ_NONE;
988 goto out;
989 }
990
991 DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
992
Pierre Ossman3192a282006-06-30 02:22:26 -0700993 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
994 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
995 host->ioaddr + SDHCI_INT_STATUS);
Pierre Ossmand129bce2006-03-24 03:18:17 -0800996 tasklet_schedule(&host->card_tasklet);
Pierre Ossman3192a282006-06-30 02:22:26 -0700997 }
998
999 intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
Pierre Ossmand129bce2006-03-24 03:18:17 -08001000
1001 if (intmask & SDHCI_INT_CMD_MASK) {
Pierre Ossmand129bce2006-03-24 03:18:17 -08001002 writel(intmask & SDHCI_INT_CMD_MASK,
1003 host->ioaddr + SDHCI_INT_STATUS);
Pierre Ossman3192a282006-06-30 02:22:26 -07001004 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
Pierre Ossmand129bce2006-03-24 03:18:17 -08001005 }
1006
1007 if (intmask & SDHCI_INT_DATA_MASK) {
Pierre Ossmand129bce2006-03-24 03:18:17 -08001008 writel(intmask & SDHCI_INT_DATA_MASK,
1009 host->ioaddr + SDHCI_INT_STATUS);
Pierre Ossman3192a282006-06-30 02:22:26 -07001010 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
Pierre Ossmand129bce2006-03-24 03:18:17 -08001011 }
1012
1013 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1014
Pierre Ossmand129bce2006-03-24 03:18:17 -08001015 if (intmask & SDHCI_INT_BUS_POWER) {
Pierre Ossman3192a282006-06-30 02:22:26 -07001016 printk(KERN_ERR "%s: Card is consuming too much power!\n",
Pierre Ossmand129bce2006-03-24 03:18:17 -08001017 mmc_hostname(host->mmc));
Pierre Ossman3192a282006-06-30 02:22:26 -07001018 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
Pierre Ossmand129bce2006-03-24 03:18:17 -08001019 }
1020
Pierre Ossman3192a282006-06-30 02:22:26 -07001021 intmask &= SDHCI_INT_BUS_POWER;
1022
1023 if (intmask) {
1024 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x. Please "
Pierre Ossmand129bce2006-03-24 03:18:17 -08001025 "report this to " BUGMAIL ".\n",
Pierre Ossman3192a282006-06-30 02:22:26 -07001026 mmc_hostname(host->mmc), intmask);
Pierre Ossmand129bce2006-03-24 03:18:17 -08001027 sdhci_dumpregs(host);
1028
Pierre Ossmand129bce2006-03-24 03:18:17 -08001029 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
Pierre Ossman3192a282006-06-30 02:22:26 -07001030 }
Pierre Ossmand129bce2006-03-24 03:18:17 -08001031
1032 result = IRQ_HANDLED;
1033
1034out:
1035 spin_unlock(&host->lock);
1036
1037 return result;
1038}
1039
1040/*****************************************************************************\
1041 * *
1042 * Suspend/resume *
1043 * *
1044\*****************************************************************************/
1045
1046#ifdef CONFIG_PM
1047
1048static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
1049{
1050 struct sdhci_chip *chip;
1051 int i, ret;
1052
1053 chip = pci_get_drvdata(pdev);
1054 if (!chip)
1055 return 0;
1056
1057 DBG("Suspending...\n");
1058
1059 for (i = 0;i < chip->num_slots;i++) {
1060 if (!chip->hosts[i])
1061 continue;
1062 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
1063 if (ret) {
1064 for (i--;i >= 0;i--)
1065 mmc_resume_host(chip->hosts[i]->mmc);
1066 return ret;
1067 }
1068 }
1069
1070 pci_save_state(pdev);
1071 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1072 pci_disable_device(pdev);
1073 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1074
1075 return 0;
1076}
1077
1078static int sdhci_resume (struct pci_dev *pdev)
1079{
1080 struct sdhci_chip *chip;
1081 int i, ret;
1082
1083 chip = pci_get_drvdata(pdev);
1084 if (!chip)
1085 return 0;
1086
1087 DBG("Resuming...\n");
1088
1089 pci_set_power_state(pdev, PCI_D0);
1090 pci_restore_state(pdev);
1091 pci_enable_device(pdev);
1092
1093 for (i = 0;i < chip->num_slots;i++) {
1094 if (!chip->hosts[i])
1095 continue;
1096 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1097 pci_set_master(pdev);
1098 sdhci_init(chip->hosts[i]);
1099 ret = mmc_resume_host(chip->hosts[i]->mmc);
1100 if (ret)
1101 return ret;
1102 }
1103
1104 return 0;
1105}
1106
1107#else /* CONFIG_PM */
1108
1109#define sdhci_suspend NULL
1110#define sdhci_resume NULL
1111
1112#endif /* CONFIG_PM */
1113
1114/*****************************************************************************\
1115 * *
1116 * Device probing/removal *
1117 * *
1118\*****************************************************************************/
1119
1120static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1121{
1122 int ret;
Pierre Ossman4a965502006-06-30 02:22:29 -07001123 unsigned int version;
Pierre Ossmand129bce2006-03-24 03:18:17 -08001124 struct sdhci_chip *chip;
1125 struct mmc_host *mmc;
1126 struct sdhci_host *host;
1127
1128 u8 first_bar;
1129 unsigned int caps;
1130
1131 chip = pci_get_drvdata(pdev);
1132 BUG_ON(!chip);
1133
1134 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1135 if (ret)
1136 return ret;
1137
1138 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1139
1140 if (first_bar > 5) {
1141 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1142 return -ENODEV;
1143 }
1144
1145 if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1146 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1147 return -ENODEV;
1148 }
1149
1150 if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1151 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
1152 return -ENODEV;
1153 }
1154
Pierre Ossman67435272006-06-30 02:22:31 -07001155 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1156 printk(KERN_ERR DRIVER_NAME ": Vendor specific interface. Aborting.\n");
1157 return -ENODEV;
1158 }
1159
1160 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1161 printk(KERN_ERR DRIVER_NAME ": Unknown interface. Aborting.\n");
1162 return -ENODEV;
1163 }
1164
Pierre Ossmand129bce2006-03-24 03:18:17 -08001165 mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1166 if (!mmc)
1167 return -ENOMEM;
1168
1169 host = mmc_priv(mmc);
1170 host->mmc = mmc;
1171
1172 host->bar = first_bar + slot;
1173
1174 host->addr = pci_resource_start(pdev, host->bar);
1175 host->irq = pdev->irq;
1176
1177 DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1178
1179 snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1180
1181 ret = pci_request_region(pdev, host->bar, host->slot_descr);
1182 if (ret)
1183 goto free;
1184
1185 host->ioaddr = ioremap_nocache(host->addr,
1186 pci_resource_len(pdev, host->bar));
1187 if (!host->ioaddr) {
1188 ret = -ENOMEM;
1189 goto release;
1190 }
1191
Pierre Ossmand96649e2006-06-30 02:22:30 -07001192 sdhci_reset(host, SDHCI_RESET_ALL);
1193
Pierre Ossman4a965502006-06-30 02:22:29 -07001194 version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1195 version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
1196 if (version != 0) {
1197 printk(KERN_ERR "%s: Unknown controller version (%d). "
1198 "Cowardly refusing to continue.\n", host->slot_descr,
1199 version);
1200 ret = -ENODEV;
1201 goto unmap;
1202 }
1203
Pierre Ossmand129bce2006-03-24 03:18:17 -08001204 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1205
Pierre Ossman67435272006-06-30 02:22:31 -07001206 if (debug_nodma)
1207 DBG("DMA forced off\n");
1208 else if (debug_forcedma) {
1209 DBG("DMA forced on\n");
1210 host->flags |= SDHCI_USE_DMA;
Pierre Ossman98608072006-06-30 02:22:34 -07001211 } else if (chip->quirks & SDHCI_QUIRK_FORCE_DMA)
1212 host->flags |= SDHCI_USE_DMA;
1213 else if ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA)
Pierre Ossman67435272006-06-30 02:22:31 -07001214 DBG("Controller doesn't have DMA interface\n");
1215 else if (!(caps & SDHCI_CAN_DO_DMA))
1216 DBG("Controller doesn't have DMA capability\n");
1217 else
Pierre Ossmand129bce2006-03-24 03:18:17 -08001218 host->flags |= SDHCI_USE_DMA;
1219
1220 if (host->flags & SDHCI_USE_DMA) {
1221 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1222 printk(KERN_WARNING "%s: No suitable DMA available. "
1223 "Falling back to PIO.\n", host->slot_descr);
1224 host->flags &= ~SDHCI_USE_DMA;
1225 }
1226 }
1227
1228 if (host->flags & SDHCI_USE_DMA)
1229 pci_set_master(pdev);
1230 else /* XXX: Hack to get MMC layer to avoid highmem */
1231 pdev->dma_mask = 0;
1232
Pierre Ossman8ef1a142006-06-30 02:22:21 -07001233 host->max_clk =
1234 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1235 if (host->max_clk == 0) {
1236 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1237 "frequency.\n", host->slot_descr);
1238 ret = -ENODEV;
1239 goto unmap;
1240 }
Pierre Ossmand129bce2006-03-24 03:18:17 -08001241 host->max_clk *= 1000000;
1242
Pierre Ossman1c8cde92006-06-30 02:22:25 -07001243 host->timeout_clk =
1244 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1245 if (host->timeout_clk == 0) {
1246 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1247 "frequency.\n", host->slot_descr);
1248 ret = -ENODEV;
1249 goto unmap;
1250 }
1251 if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1252 host->timeout_clk *= 1000;
1253
Pierre Ossman1d676e02006-07-02 16:52:10 +01001254 host->max_block = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1255 if (host->max_block >= 3) {
1256 printk(KERN_ERR "%s: Invalid maximum block size.\n",
1257 host->slot_descr);
1258 ret = -ENODEV;
1259 goto unmap;
1260 }
1261 host->max_block = 512 << host->max_block;
1262
Pierre Ossmand129bce2006-03-24 03:18:17 -08001263 /*
1264 * Set host parameters.
1265 */
1266 mmc->ops = &sdhci_ops;
1267 mmc->f_min = host->max_clk / 256;
1268 mmc->f_max = host->max_clk;
Pierre Ossmand129bce2006-03-24 03:18:17 -08001269 mmc->caps = MMC_CAP_4_BIT_DATA;
1270
Pierre Ossman146ad662006-06-30 02:22:23 -07001271 mmc->ocr_avail = 0;
1272 if (caps & SDHCI_CAN_VDD_330)
1273 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1274 else if (caps & SDHCI_CAN_VDD_300)
1275 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1276 else if (caps & SDHCI_CAN_VDD_180)
1277 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1278
1279 if (mmc->ocr_avail == 0) {
1280 printk(KERN_ERR "%s: Hardware doesn't report any "
1281 "support voltages.\n", host->slot_descr);
1282 ret = -ENODEV;
1283 goto unmap;
1284 }
1285
Pierre Ossmand129bce2006-03-24 03:18:17 -08001286 spin_lock_init(&host->lock);
1287
1288 /*
1289 * Maximum number of segments. Hardware cannot do scatter lists.
1290 */
1291 if (host->flags & SDHCI_USE_DMA)
1292 mmc->max_hw_segs = 1;
1293 else
1294 mmc->max_hw_segs = 16;
1295 mmc->max_phys_segs = 16;
1296
1297 /*
Pierre Ossmanbab76962006-07-02 16:51:35 +01001298 * Maximum number of sectors in one transfer. Limited by DMA boundary
1299 * size (512KiB), which means (512 KiB/512=) 1024 entries.
Pierre Ossmand129bce2006-03-24 03:18:17 -08001300 */
Pierre Ossmanbab76962006-07-02 16:51:35 +01001301 mmc->max_sectors = 1024;
Pierre Ossmand129bce2006-03-24 03:18:17 -08001302
1303 /*
1304 * Maximum segment size. Could be one segment with the maximum number
1305 * of sectors.
1306 */
1307 mmc->max_seg_size = mmc->max_sectors * 512;
1308
1309 /*
1310 * Init tasklets.
1311 */
1312 tasklet_init(&host->card_tasklet,
1313 sdhci_tasklet_card, (unsigned long)host);
1314 tasklet_init(&host->finish_tasklet,
1315 sdhci_tasklet_finish, (unsigned long)host);
1316
Andrew Mortone474c662006-06-12 22:10:22 +01001317 setup_timer(&host->timer, sdhci_timeout_timer, (long)host);
Pierre Ossmand129bce2006-03-24 03:18:17 -08001318
1319 ret = request_irq(host->irq, sdhci_irq, SA_SHIRQ,
1320 host->slot_descr, host);
1321 if (ret)
Pierre Ossman8ef1a142006-06-30 02:22:21 -07001322 goto untasklet;
Pierre Ossmand129bce2006-03-24 03:18:17 -08001323
1324 sdhci_init(host);
1325
1326#ifdef CONFIG_MMC_DEBUG
1327 sdhci_dumpregs(host);
1328#endif
1329
1330 host->chip = chip;
1331 chip->hosts[slot] = host;
1332
1333 mmc_add_host(mmc);
1334
1335 printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1336 host->addr, host->irq,
1337 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1338
1339 return 0;
1340
Pierre Ossman8ef1a142006-06-30 02:22:21 -07001341untasklet:
Pierre Ossmand129bce2006-03-24 03:18:17 -08001342 tasklet_kill(&host->card_tasklet);
1343 tasklet_kill(&host->finish_tasklet);
Pierre Ossman8ef1a142006-06-30 02:22:21 -07001344unmap:
Pierre Ossmand129bce2006-03-24 03:18:17 -08001345 iounmap(host->ioaddr);
1346release:
1347 pci_release_region(pdev, host->bar);
1348free:
1349 mmc_free_host(mmc);
1350
1351 return ret;
1352}
1353
1354static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1355{
1356 struct sdhci_chip *chip;
1357 struct mmc_host *mmc;
1358 struct sdhci_host *host;
1359
1360 chip = pci_get_drvdata(pdev);
1361 host = chip->hosts[slot];
1362 mmc = host->mmc;
1363
1364 chip->hosts[slot] = NULL;
1365
1366 mmc_remove_host(mmc);
1367
1368 sdhci_reset(host, SDHCI_RESET_ALL);
1369
1370 free_irq(host->irq, host);
1371
1372 del_timer_sync(&host->timer);
1373
1374 tasklet_kill(&host->card_tasklet);
1375 tasklet_kill(&host->finish_tasklet);
1376
1377 iounmap(host->ioaddr);
1378
1379 pci_release_region(pdev, host->bar);
1380
1381 mmc_free_host(mmc);
1382}
1383
1384static int __devinit sdhci_probe(struct pci_dev *pdev,
1385 const struct pci_device_id *ent)
1386{
1387 int ret, i;
Pierre Ossman51f82bc2006-06-30 02:22:22 -07001388 u8 slots, rev;
Pierre Ossmand129bce2006-03-24 03:18:17 -08001389 struct sdhci_chip *chip;
1390
1391 BUG_ON(pdev == NULL);
1392 BUG_ON(ent == NULL);
1393
Pierre Ossman51f82bc2006-06-30 02:22:22 -07001394 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1395
1396 printk(KERN_INFO DRIVER_NAME
1397 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1398 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1399 (int)rev);
Pierre Ossmand129bce2006-03-24 03:18:17 -08001400
1401 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1402 if (ret)
1403 return ret;
1404
1405 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1406 DBG("found %d slot(s)\n", slots);
1407 if (slots == 0)
1408 return -ENODEV;
1409
1410 ret = pci_enable_device(pdev);
1411 if (ret)
1412 return ret;
1413
1414 chip = kzalloc(sizeof(struct sdhci_chip) +
1415 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1416 if (!chip) {
1417 ret = -ENOMEM;
1418 goto err;
1419 }
1420
1421 chip->pdev = pdev;
Pierre Ossmandf673b22006-06-30 02:22:31 -07001422 chip->quirks = ent->driver_data;
1423
1424 if (debug_quirks)
1425 chip->quirks = debug_quirks;
Pierre Ossmand129bce2006-03-24 03:18:17 -08001426
1427 chip->num_slots = slots;
1428 pci_set_drvdata(pdev, chip);
1429
1430 for (i = 0;i < slots;i++) {
1431 ret = sdhci_probe_slot(pdev, i);
1432 if (ret) {
1433 for (i--;i >= 0;i--)
1434 sdhci_remove_slot(pdev, i);
1435 goto free;
1436 }
1437 }
1438
1439 return 0;
1440
1441free:
1442 pci_set_drvdata(pdev, NULL);
1443 kfree(chip);
1444
1445err:
1446 pci_disable_device(pdev);
1447 return ret;
1448}
1449
1450static void __devexit sdhci_remove(struct pci_dev *pdev)
1451{
1452 int i;
1453 struct sdhci_chip *chip;
1454
1455 chip = pci_get_drvdata(pdev);
1456
1457 if (chip) {
1458 for (i = 0;i < chip->num_slots;i++)
1459 sdhci_remove_slot(pdev, i);
1460
1461 pci_set_drvdata(pdev, NULL);
1462
1463 kfree(chip);
1464 }
1465
1466 pci_disable_device(pdev);
1467}
1468
1469static struct pci_driver sdhci_driver = {
1470 .name = DRIVER_NAME,
1471 .id_table = pci_ids,
1472 .probe = sdhci_probe,
1473 .remove = __devexit_p(sdhci_remove),
1474 .suspend = sdhci_suspend,
1475 .resume = sdhci_resume,
1476};
1477
1478/*****************************************************************************\
1479 * *
1480 * Driver init/exit *
1481 * *
1482\*****************************************************************************/
1483
1484static int __init sdhci_drv_init(void)
1485{
1486 printk(KERN_INFO DRIVER_NAME
1487 ": Secure Digital Host Controller Interface driver, "
1488 DRIVER_VERSION "\n");
1489 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1490
1491 return pci_register_driver(&sdhci_driver);
1492}
1493
1494static void __exit sdhci_drv_exit(void)
1495{
1496 DBG("Exiting\n");
1497
1498 pci_unregister_driver(&sdhci_driver);
1499}
1500
1501module_init(sdhci_drv_init);
1502module_exit(sdhci_drv_exit);
1503
Pierre Ossman67435272006-06-30 02:22:31 -07001504module_param(debug_nodma, uint, 0444);
1505module_param(debug_forcedma, uint, 0444);
Pierre Ossmandf673b22006-06-30 02:22:31 -07001506module_param(debug_quirks, uint, 0444);
Pierre Ossman67435272006-06-30 02:22:31 -07001507
Pierre Ossmand129bce2006-03-24 03:18:17 -08001508MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1509MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1510MODULE_VERSION(DRIVER_VERSION);
1511MODULE_LICENSE("GPL");
Pierre Ossman67435272006-06-30 02:22:31 -07001512
1513MODULE_PARM_DESC(debug_nodma, "Forcefully disable DMA transfers. (default 0)");
1514MODULE_PARM_DESC(debug_forcedma, "Forcefully enable DMA transfers. (default 0)");
Pierre Ossmandf673b22006-06-30 02:22:31 -07001515MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");