blob: fcd7802d8a711b761eac654dcde2cd806f3dedbe [file] [log] [blame]
Jerome Glisse771fe6b2009-06-05 14:42:42 +02001/*
2 * Copyright 2009 Jerome Glisse.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
20 *
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
23 * of the Software.
24 *
25 */
26/*
27 * Authors:
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Dave Airlie
30 */
31#include <linux/seq_file.h>
32#include <asm/atomic.h>
33#include <linux/wait.h>
34#include <linux/list.h>
35#include <linux/kref.h>
36#include "drmP.h"
37#include "drm.h"
38#include "radeon_reg.h"
39#include "radeon.h"
40
41int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
42{
43 unsigned long irq_flags;
44
45 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
46 if (fence->emited) {
47 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
48 return 0;
49 }
50 fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
51 if (!rdev->cp.ready) {
52 /* FIXME: cp is not running assume everythings is done right
53 * away
54 */
55 WREG32(rdev->fence_drv.scratch_reg, fence->seq);
Jerome Glisse3ce0a232009-09-08 10:10:24 +100056 } else
Jerome Glisse771fe6b2009-06-05 14:42:42 +020057 radeon_fence_ring_emit(rdev, fence);
Jerome Glisse3ce0a232009-09-08 10:10:24 +100058
Jerome Glisse771fe6b2009-06-05 14:42:42 +020059 fence->emited = true;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020060 list_del(&fence->list);
61 list_add_tail(&fence->list, &rdev->fence_drv.emited);
62 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
63 return 0;
64}
65
66static bool radeon_fence_poll_locked(struct radeon_device *rdev)
67{
68 struct radeon_fence *fence;
69 struct list_head *i, *n;
70 uint32_t seq;
71 bool wake = false;
Jerome Glisse225758d2010-03-09 14:45:10 +000072 unsigned long cjiffies;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020073
Jerome Glisse771fe6b2009-06-05 14:42:42 +020074 seq = RREG32(rdev->fence_drv.scratch_reg);
Jerome Glisse225758d2010-03-09 14:45:10 +000075 if (seq != rdev->fence_drv.last_seq) {
76 rdev->fence_drv.last_seq = seq;
77 rdev->fence_drv.last_jiffies = jiffies;
78 rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
79 } else {
80 cjiffies = jiffies;
81 if (time_after(cjiffies, rdev->fence_drv.last_jiffies)) {
82 cjiffies -= rdev->fence_drv.last_jiffies;
83 if (time_after(rdev->fence_drv.last_timeout, cjiffies)) {
84 /* update the timeout */
85 rdev->fence_drv.last_timeout -= cjiffies;
86 } else {
87 /* the 500ms timeout is elapsed we should test
88 * for GPU lockup
89 */
90 rdev->fence_drv.last_timeout = 1;
91 }
92 } else {
93 /* wrap around update last jiffies, we will just wait
94 * a little longer
95 */
96 rdev->fence_drv.last_jiffies = cjiffies;
97 }
98 return false;
99 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200100 n = NULL;
101 list_for_each(i, &rdev->fence_drv.emited) {
102 fence = list_entry(i, struct radeon_fence, list);
103 if (fence->seq == seq) {
104 n = i;
105 break;
106 }
107 }
108 /* all fence previous to this one are considered as signaled */
109 if (n) {
110 i = n;
111 do {
112 n = i->prev;
113 list_del(i);
114 list_add_tail(i, &rdev->fence_drv.signaled);
115 fence = list_entry(i, struct radeon_fence, list);
116 fence->signaled = true;
117 i = n;
118 } while (i != &rdev->fence_drv.emited);
119 wake = true;
120 }
121 return wake;
122}
123
124static void radeon_fence_destroy(struct kref *kref)
125{
126 unsigned long irq_flags;
127 struct radeon_fence *fence;
128
129 fence = container_of(kref, struct radeon_fence, kref);
130 write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
131 list_del(&fence->list);
132 fence->emited = false;
133 write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
134 kfree(fence);
135}
136
137int radeon_fence_create(struct radeon_device *rdev, struct radeon_fence **fence)
138{
139 unsigned long irq_flags;
140
141 *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
142 if ((*fence) == NULL) {
143 return -ENOMEM;
144 }
145 kref_init(&((*fence)->kref));
146 (*fence)->rdev = rdev;
147 (*fence)->emited = false;
148 (*fence)->signaled = false;
149 (*fence)->seq = 0;
150 INIT_LIST_HEAD(&(*fence)->list);
151
152 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
153 list_add_tail(&(*fence)->list, &rdev->fence_drv.created);
154 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
155 return 0;
156}
157
158
159bool radeon_fence_signaled(struct radeon_fence *fence)
160{
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200161 unsigned long irq_flags;
162 bool signaled = false;
163
Darren Jenkins3655d542009-12-30 12:20:05 +1100164 if (!fence)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200165 return true;
Darren Jenkins3655d542009-12-30 12:20:05 +1100166
167 if (fence->rdev->gpu_lockup)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200168 return true;
Darren Jenkins3655d542009-12-30 12:20:05 +1100169
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200170 write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
171 signaled = fence->signaled;
172 /* if we are shuting down report all fence as signaled */
173 if (fence->rdev->shutdown) {
174 signaled = true;
175 }
176 if (!fence->emited) {
177 WARN(1, "Querying an unemited fence : %p !\n", fence);
178 signaled = true;
179 }
180 if (!signaled) {
181 radeon_fence_poll_locked(fence->rdev);
182 signaled = fence->signaled;
183 }
184 write_unlock_irqrestore(&fence->rdev->fence_drv.lock, irq_flags);
185 return signaled;
186}
187
Jerome Glisse3ce0a232009-09-08 10:10:24 +1000188int radeon_fence_wait(struct radeon_fence *fence, bool intr)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200189{
190 struct radeon_device *rdev;
Jerome Glisse225758d2010-03-09 14:45:10 +0000191 unsigned long irq_flags, timeout;
192 u32 seq;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200193 int r;
194
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200195 if (fence == NULL) {
196 WARN(1, "Querying an invalid fence : %p !\n", fence);
197 return 0;
198 }
199 rdev = fence->rdev;
200 if (radeon_fence_signaled(fence)) {
201 return 0;
202 }
Jerome Glisse225758d2010-03-09 14:45:10 +0000203 timeout = rdev->fence_drv.last_timeout;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200204retry:
Jerome Glisse225758d2010-03-09 14:45:10 +0000205 /* save current sequence used to check for GPU lockup */
206 seq = rdev->fence_drv.last_seq;
Jerome Glisse3ce0a232009-09-08 10:10:24 +1000207 if (intr) {
Dave Airlie1614f8b2009-12-01 16:04:56 +1000208 radeon_irq_kms_sw_irq_get(rdev);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200209 r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
210 radeon_fence_signaled(fence), timeout);
Dave Airlie1614f8b2009-12-01 16:04:56 +1000211 radeon_irq_kms_sw_irq_put(rdev);
Jerome Glisse90aca4d2010-03-09 14:45:12 +0000212 if (unlikely(r < 0)) {
Thomas Hellstrom5cc6fba2009-12-07 18:36:19 +0100213 return r;
Jerome Glisse90aca4d2010-03-09 14:45:12 +0000214 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200215 } else {
Dave Airlie1614f8b2009-12-01 16:04:56 +1000216 radeon_irq_kms_sw_irq_get(rdev);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200217 r = wait_event_timeout(rdev->fence_drv.queue,
218 radeon_fence_signaled(fence), timeout);
Dave Airlie1614f8b2009-12-01 16:04:56 +1000219 radeon_irq_kms_sw_irq_put(rdev);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200220 }
221 if (unlikely(!radeon_fence_signaled(fence))) {
Jerome Glisse225758d2010-03-09 14:45:10 +0000222 /* we were interrupted for some reason and fence isn't
223 * isn't signaled yet, resume wait
224 */
225 if (r) {
226 timeout = r;
227 goto retry;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200228 }
Jerome Glisse225758d2010-03-09 14:45:10 +0000229 /* don't protect read access to rdev->fence_drv.last_seq
230 * if we experiencing a lockup the value doesn't change
231 */
232 if (seq == rdev->fence_drv.last_seq && radeon_gpu_is_lockup(rdev)) {
233 /* good news we believe it's a lockup */
Jerome Glisse90aca4d2010-03-09 14:45:12 +0000234 WARN(1, "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n", fence->seq, seq);
Jerome Glisse225758d2010-03-09 14:45:10 +0000235 /* FIXME: what should we do ? marking everyone
236 * as signaled for now
237 */
Jerome Glisse90aca4d2010-03-09 14:45:12 +0000238 rdev->gpu_lockup = true;
Jerome Glisse225758d2010-03-09 14:45:10 +0000239 WREG32(rdev->fence_drv.scratch_reg, fence->seq);
Jerome Glisse90aca4d2010-03-09 14:45:12 +0000240 r = radeon_gpu_reset(rdev);
241 if (r)
242 return r;
243 rdev->gpu_lockup = false;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200244 }
Jerome Glisse225758d2010-03-09 14:45:10 +0000245 timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
246 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
247 rdev->fence_drv.last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
248 rdev->fence_drv.last_jiffies = jiffies;
249 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200250 goto retry;
251 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200252 return 0;
253}
254
255int radeon_fence_wait_next(struct radeon_device *rdev)
256{
257 unsigned long irq_flags;
258 struct radeon_fence *fence;
259 int r;
260
261 if (rdev->gpu_lockup) {
262 return 0;
263 }
264 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
265 if (list_empty(&rdev->fence_drv.emited)) {
266 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
267 return 0;
268 }
269 fence = list_entry(rdev->fence_drv.emited.next,
270 struct radeon_fence, list);
271 radeon_fence_ref(fence);
272 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
273 r = radeon_fence_wait(fence, false);
274 radeon_fence_unref(&fence);
275 return r;
276}
277
278int radeon_fence_wait_last(struct radeon_device *rdev)
279{
280 unsigned long irq_flags;
281 struct radeon_fence *fence;
282 int r;
283
284 if (rdev->gpu_lockup) {
285 return 0;
286 }
287 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
288 if (list_empty(&rdev->fence_drv.emited)) {
289 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
290 return 0;
291 }
292 fence = list_entry(rdev->fence_drv.emited.prev,
293 struct radeon_fence, list);
294 radeon_fence_ref(fence);
295 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
296 r = radeon_fence_wait(fence, false);
297 radeon_fence_unref(&fence);
298 return r;
299}
300
301struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
302{
303 kref_get(&fence->kref);
304 return fence;
305}
306
307void radeon_fence_unref(struct radeon_fence **fence)
308{
309 struct radeon_fence *tmp = *fence;
310
311 *fence = NULL;
312 if (tmp) {
313 kref_put(&tmp->kref, &radeon_fence_destroy);
314 }
315}
316
317void radeon_fence_process(struct radeon_device *rdev)
318{
319 unsigned long irq_flags;
320 bool wake;
321
322 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
323 wake = radeon_fence_poll_locked(rdev);
324 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
325 if (wake) {
326 wake_up_all(&rdev->fence_drv.queue);
327 }
328}
329
330int radeon_fence_driver_init(struct radeon_device *rdev)
331{
332 unsigned long irq_flags;
333 int r;
334
335 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
336 r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
337 if (r) {
Jerome Glisse0a0c7592009-12-11 20:36:19 +0100338 dev_err(rdev->dev, "fence failed to get scratch register\n");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200339 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
340 return r;
341 }
342 WREG32(rdev->fence_drv.scratch_reg, 0);
343 atomic_set(&rdev->fence_drv.seq, 0);
344 INIT_LIST_HEAD(&rdev->fence_drv.created);
345 INIT_LIST_HEAD(&rdev->fence_drv.emited);
346 INIT_LIST_HEAD(&rdev->fence_drv.signaled);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200347 init_waitqueue_head(&rdev->fence_drv.queue);
Jerome Glisse0a0c7592009-12-11 20:36:19 +0100348 rdev->fence_drv.initialized = true;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200349 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
350 if (radeon_debugfs_fence_init(rdev)) {
Jerome Glisse0a0c7592009-12-11 20:36:19 +0100351 dev_err(rdev->dev, "fence debugfs file creation failed\n");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200352 }
353 return 0;
354}
355
356void radeon_fence_driver_fini(struct radeon_device *rdev)
357{
358 unsigned long irq_flags;
359
Jerome Glisse0a0c7592009-12-11 20:36:19 +0100360 if (!rdev->fence_drv.initialized)
361 return;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200362 wake_up_all(&rdev->fence_drv.queue);
363 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
364 radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
365 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
Jerome Glisse0a0c7592009-12-11 20:36:19 +0100366 rdev->fence_drv.initialized = false;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200367}
368
369
370/*
371 * Fence debugfs
372 */
373#if defined(CONFIG_DEBUG_FS)
374static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
375{
376 struct drm_info_node *node = (struct drm_info_node *)m->private;
377 struct drm_device *dev = node->minor->dev;
378 struct radeon_device *rdev = dev->dev_private;
379 struct radeon_fence *fence;
380
381 seq_printf(m, "Last signaled fence 0x%08X\n",
382 RREG32(rdev->fence_drv.scratch_reg));
383 if (!list_empty(&rdev->fence_drv.emited)) {
384 fence = list_entry(rdev->fence_drv.emited.prev,
385 struct radeon_fence, list);
386 seq_printf(m, "Last emited fence %p with 0x%08X\n",
387 fence, fence->seq);
388 }
389 return 0;
390}
391
392static struct drm_info_list radeon_debugfs_fence_list[] = {
393 {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
394};
395#endif
396
397int radeon_debugfs_fence_init(struct radeon_device *rdev)
398{
399#if defined(CONFIG_DEBUG_FS)
400 return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
401#else
402 return 0;
403#endif
404}