blob: f5ddd35507965598818af3a28a2d7899cec877e0 [file] [log] [blame]
Rob Clark16ea9752013-01-08 15:04:28 -06001/*
2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18/* LCDC DRM driver, based on da8xx-fb */
19
20#include "tilcdc_drv.h"
21#include "tilcdc_regs.h"
22#include "tilcdc_tfp410.h"
Rob Clark6e8de0b2013-01-22 16:02:21 -060023#include "tilcdc_slave.h"
Rob Clark0d4bbaf2012-12-18 17:34:16 -060024#include "tilcdc_panel.h"
Rob Clark16ea9752013-01-08 15:04:28 -060025
26#include "drm_fb_helper.h"
27
28static LIST_HEAD(module_list);
29
30void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
31 const struct tilcdc_module_ops *funcs)
32{
33 mod->name = name;
34 mod->funcs = funcs;
35 INIT_LIST_HEAD(&mod->list);
36 list_add(&mod->list, &module_list);
37}
38
39void tilcdc_module_cleanup(struct tilcdc_module *mod)
40{
41 list_del(&mod->list);
42}
43
44static struct of_device_id tilcdc_of_match[];
45
46static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
47 struct drm_file *file_priv, struct drm_mode_fb_cmd2 *mode_cmd)
48{
49 return drm_fb_cma_create(dev, file_priv, mode_cmd);
50}
51
52static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
53{
54 struct tilcdc_drm_private *priv = dev->dev_private;
55 if (priv->fbdev)
56 drm_fbdev_cma_hotplug_event(priv->fbdev);
57}
58
59static const struct drm_mode_config_funcs mode_config_funcs = {
60 .fb_create = tilcdc_fb_create,
61 .output_poll_changed = tilcdc_fb_output_poll_changed,
62};
63
64static int modeset_init(struct drm_device *dev)
65{
66 struct tilcdc_drm_private *priv = dev->dev_private;
67 struct tilcdc_module *mod;
68
69 drm_mode_config_init(dev);
70
71 priv->crtc = tilcdc_crtc_create(dev);
72
73 list_for_each_entry(mod, &module_list, list) {
74 DBG("loading module: %s", mod->name);
75 mod->funcs->modeset_init(mod, dev);
76 }
77
Sachin Kamat9e488542013-03-02 15:53:06 +053078 if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) {
Rob Clark16ea9752013-01-08 15:04:28 -060079 /* oh nos! */
80 dev_err(dev->dev, "no encoders/connectors found\n");
Ezequiel Garciaa3cb4452014-09-02 09:51:15 -030081 drm_mode_config_cleanup(dev);
Rob Clark16ea9752013-01-08 15:04:28 -060082 return -ENXIO;
83 }
84
85 dev->mode_config.min_width = 0;
86 dev->mode_config.min_height = 0;
87 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
88 dev->mode_config.max_height = 2048;
89 dev->mode_config.funcs = &mode_config_funcs;
90
91 return 0;
92}
93
94#ifdef CONFIG_CPU_FREQ
95static int cpufreq_transition(struct notifier_block *nb,
96 unsigned long val, void *data)
97{
98 struct tilcdc_drm_private *priv = container_of(nb,
99 struct tilcdc_drm_private, freq_transition);
100 if (val == CPUFREQ_POSTCHANGE) {
101 if (priv->lcd_fck_rate != clk_get_rate(priv->clk)) {
102 priv->lcd_fck_rate = clk_get_rate(priv->clk);
103 tilcdc_crtc_update_clk(priv->crtc);
104 }
105 }
106
107 return 0;
108}
109#endif
110
111/*
112 * DRM operations:
113 */
114
115static int tilcdc_unload(struct drm_device *dev)
116{
117 struct tilcdc_drm_private *priv = dev->dev_private;
118 struct tilcdc_module *mod, *cur;
119
Guido Martínezed643812014-06-17 11:17:07 -0300120 drm_fbdev_cma_fini(priv->fbdev);
Rob Clark16ea9752013-01-08 15:04:28 -0600121 drm_kms_helper_poll_fini(dev);
122 drm_mode_config_cleanup(dev);
123 drm_vblank_cleanup(dev);
124
125 pm_runtime_get_sync(dev->dev);
126 drm_irq_uninstall(dev);
127 pm_runtime_put_sync(dev->dev);
128
129#ifdef CONFIG_CPU_FREQ
130 cpufreq_unregister_notifier(&priv->freq_transition,
131 CPUFREQ_TRANSITION_NOTIFIER);
132#endif
133
134 if (priv->clk)
135 clk_put(priv->clk);
136
137 if (priv->mmio)
138 iounmap(priv->mmio);
139
140 flush_workqueue(priv->wq);
141 destroy_workqueue(priv->wq);
142
143 dev->dev_private = NULL;
144
145 pm_runtime_disable(dev->dev);
146
147 list_for_each_entry_safe(mod, cur, &module_list, list) {
148 DBG("destroying module: %s", mod->name);
149 mod->funcs->destroy(mod);
150 }
151
152 kfree(priv);
153
154 return 0;
155}
156
157static int tilcdc_load(struct drm_device *dev, unsigned long flags)
158{
159 struct platform_device *pdev = dev->platformdev;
160 struct device_node *node = pdev->dev.of_node;
161 struct tilcdc_drm_private *priv;
162 struct resource *res;
163 int ret;
164
165 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
166 if (!priv) {
167 dev_err(dev->dev, "failed to allocate private data\n");
168 return -ENOMEM;
169 }
170
171 dev->dev_private = priv;
172
173 priv->wq = alloc_ordered_workqueue("tilcdc", 0);
Ezequiel Garciaa3cb4452014-09-02 09:51:15 -0300174 if (!priv->wq) {
175 ret = -ENOMEM;
176 goto fail_free_priv;
177 }
Rob Clark16ea9752013-01-08 15:04:28 -0600178
179 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
180 if (!res) {
181 dev_err(dev->dev, "failed to get memory resource\n");
182 ret = -EINVAL;
Ezequiel Garciaa3cb4452014-09-02 09:51:15 -0300183 goto fail_free_wq;
Rob Clark16ea9752013-01-08 15:04:28 -0600184 }
185
186 priv->mmio = ioremap_nocache(res->start, resource_size(res));
187 if (!priv->mmio) {
188 dev_err(dev->dev, "failed to ioremap\n");
189 ret = -ENOMEM;
Ezequiel Garciaa3cb4452014-09-02 09:51:15 -0300190 goto fail_free_wq;
Rob Clark16ea9752013-01-08 15:04:28 -0600191 }
192
193 priv->clk = clk_get(dev->dev, "fck");
194 if (IS_ERR(priv->clk)) {
195 dev_err(dev->dev, "failed to get functional clock\n");
196 ret = -ENODEV;
Ezequiel Garciaa3cb4452014-09-02 09:51:15 -0300197 goto fail_iounmap;
Rob Clark16ea9752013-01-08 15:04:28 -0600198 }
199
200 priv->disp_clk = clk_get(dev->dev, "dpll_disp_ck");
201 if (IS_ERR(priv->clk)) {
202 dev_err(dev->dev, "failed to get display clock\n");
203 ret = -ENODEV;
Ezequiel Garciaa3cb4452014-09-02 09:51:15 -0300204 goto fail_put_clk;
Rob Clark16ea9752013-01-08 15:04:28 -0600205 }
206
207#ifdef CONFIG_CPU_FREQ
208 priv->lcd_fck_rate = clk_get_rate(priv->clk);
209 priv->freq_transition.notifier_call = cpufreq_transition;
210 ret = cpufreq_register_notifier(&priv->freq_transition,
211 CPUFREQ_TRANSITION_NOTIFIER);
212 if (ret) {
213 dev_err(dev->dev, "failed to register cpufreq notifier\n");
Ezequiel Garciaa3cb4452014-09-02 09:51:15 -0300214 goto fail_put_disp_clk;
Rob Clark16ea9752013-01-08 15:04:28 -0600215 }
216#endif
217
218 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
219 priv->max_bandwidth = 1280 * 1024 * 60;
220
221 pm_runtime_enable(dev->dev);
222
223 /* Determine LCD IP Version */
224 pm_runtime_get_sync(dev->dev);
225 switch (tilcdc_read(dev, LCDC_PID_REG)) {
226 case 0x4c100102:
227 priv->rev = 1;
228 break;
229 case 0x4f200800:
230 case 0x4f201000:
231 priv->rev = 2;
232 break;
233 default:
234 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
235 "defaulting to LCD revision 1\n",
236 tilcdc_read(dev, LCDC_PID_REG));
237 priv->rev = 1;
238 break;
239 }
240
241 pm_runtime_put_sync(dev->dev);
242
243 ret = modeset_init(dev);
244 if (ret < 0) {
245 dev_err(dev->dev, "failed to initialize mode setting\n");
Ezequiel Garciaa3cb4452014-09-02 09:51:15 -0300246 goto fail_cpufreq_unregister;
Rob Clark16ea9752013-01-08 15:04:28 -0600247 }
248
249 ret = drm_vblank_init(dev, 1);
250 if (ret < 0) {
251 dev_err(dev->dev, "failed to initialize vblank\n");
Ezequiel Garciaa3cb4452014-09-02 09:51:15 -0300252 goto fail_mode_config_cleanup;
Rob Clark16ea9752013-01-08 15:04:28 -0600253 }
254
255 pm_runtime_get_sync(dev->dev);
256 ret = drm_irq_install(dev);
257 pm_runtime_put_sync(dev->dev);
258 if (ret < 0) {
259 dev_err(dev->dev, "failed to install IRQ handler\n");
Ezequiel Garciaa3cb4452014-09-02 09:51:15 -0300260 goto fail_vblank_cleanup;
Rob Clark16ea9752013-01-08 15:04:28 -0600261 }
262
263 platform_set_drvdata(pdev, dev);
264
265 priv->fbdev = drm_fbdev_cma_init(dev, 16,
266 dev->mode_config.num_crtc,
267 dev->mode_config.num_connector);
Ezequiel Garciaa3cb4452014-09-02 09:51:15 -0300268 if (IS_ERR(priv->fbdev)) {
269 ret = PTR_ERR(priv->fbdev);
270 goto fail_irq_uninstall;
271 }
Rob Clark16ea9752013-01-08 15:04:28 -0600272
273 drm_kms_helper_poll_init(dev);
274
275 return 0;
276
Ezequiel Garciaa3cb4452014-09-02 09:51:15 -0300277fail_irq_uninstall:
278 pm_runtime_get_sync(dev->dev);
279 drm_irq_uninstall(dev);
280 pm_runtime_put_sync(dev->dev);
281
282fail_vblank_cleanup:
283 drm_vblank_cleanup(dev);
284
285fail_mode_config_cleanup:
286 drm_mode_config_cleanup(dev);
287
288fail_cpufreq_unregister:
289 pm_runtime_disable(dev->dev);
290#ifdef CONFIG_CPU_FREQ
291 cpufreq_unregister_notifier(&priv->freq_transition,
292 CPUFREQ_TRANSITION_NOTIFIER);
293fail_put_disp_clk:
294 clk_put(priv->disp_clk);
295#endif
296
297fail_put_clk:
298 clk_put(priv->clk);
299
300fail_iounmap:
301 iounmap(priv->mmio);
302
303fail_free_wq:
304 flush_workqueue(priv->wq);
305 destroy_workqueue(priv->wq);
306
307fail_free_priv:
308 dev->dev_private = NULL;
309 kfree(priv);
Rob Clark16ea9752013-01-08 15:04:28 -0600310 return ret;
311}
312
313static void tilcdc_preclose(struct drm_device *dev, struct drm_file *file)
314{
315 struct tilcdc_drm_private *priv = dev->dev_private;
316
317 tilcdc_crtc_cancel_page_flip(priv->crtc, file);
318}
319
320static void tilcdc_lastclose(struct drm_device *dev)
321{
322 struct tilcdc_drm_private *priv = dev->dev_private;
323 drm_fbdev_cma_restore_mode(priv->fbdev);
324}
325
326static irqreturn_t tilcdc_irq(DRM_IRQ_ARGS)
327{
328 struct drm_device *dev = arg;
329 struct tilcdc_drm_private *priv = dev->dev_private;
330 return tilcdc_crtc_irq(priv->crtc);
331}
332
333static void tilcdc_irq_preinstall(struct drm_device *dev)
334{
335 tilcdc_clear_irqstatus(dev, 0xffffffff);
336}
337
338static int tilcdc_irq_postinstall(struct drm_device *dev)
339{
340 struct tilcdc_drm_private *priv = dev->dev_private;
341
342 /* enable FIFO underflow irq: */
Sachin Kamata50b24f2013-03-02 15:53:07 +0530343 if (priv->rev == 1)
Rob Clark16ea9752013-01-08 15:04:28 -0600344 tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_UNDERFLOW_INT_ENA);
Sachin Kamata50b24f2013-03-02 15:53:07 +0530345 else
Rob Clark16ea9752013-01-08 15:04:28 -0600346 tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_UNDERFLOW_INT_ENA);
Rob Clark16ea9752013-01-08 15:04:28 -0600347
348 return 0;
349}
350
351static void tilcdc_irq_uninstall(struct drm_device *dev)
352{
353 struct tilcdc_drm_private *priv = dev->dev_private;
354
355 /* disable irqs that we might have enabled: */
356 if (priv->rev == 1) {
357 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
358 LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA);
359 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA);
360 } else {
361 tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,
362 LCDC_V2_UNDERFLOW_INT_ENA | LCDC_V2_PL_INT_ENA |
363 LCDC_V2_END_OF_FRAME0_INT_ENA | LCDC_V2_END_OF_FRAME1_INT_ENA |
364 LCDC_FRAME_DONE);
365 }
366
367}
368
369static void enable_vblank(struct drm_device *dev, bool enable)
370{
371 struct tilcdc_drm_private *priv = dev->dev_private;
372 u32 reg, mask;
373
374 if (priv->rev == 1) {
375 reg = LCDC_DMA_CTRL_REG;
376 mask = LCDC_V1_END_OF_FRAME_INT_ENA;
377 } else {
378 reg = LCDC_INT_ENABLE_SET_REG;
379 mask = LCDC_V2_END_OF_FRAME0_INT_ENA |
380 LCDC_V2_END_OF_FRAME1_INT_ENA | LCDC_FRAME_DONE;
381 }
382
383 if (enable)
384 tilcdc_set(dev, reg, mask);
385 else
386 tilcdc_clear(dev, reg, mask);
387}
388
389static int tilcdc_enable_vblank(struct drm_device *dev, int crtc)
390{
391 enable_vblank(dev, true);
392 return 0;
393}
394
395static void tilcdc_disable_vblank(struct drm_device *dev, int crtc)
396{
397 enable_vblank(dev, false);
398}
399
400#if defined(CONFIG_DEBUG_FS) || defined(CONFIG_PM_SLEEP)
401static const struct {
402 const char *name;
403 uint8_t rev;
404 uint8_t save;
405 uint32_t reg;
Sachin Kamat32501452013-03-02 15:53:08 +0530406} registers[] = {
Rob Clark16ea9752013-01-08 15:04:28 -0600407#define REG(rev, save, reg) { #reg, rev, save, reg }
408 /* exists in revision 1: */
409 REG(1, false, LCDC_PID_REG),
410 REG(1, true, LCDC_CTRL_REG),
411 REG(1, false, LCDC_STAT_REG),
412 REG(1, true, LCDC_RASTER_CTRL_REG),
413 REG(1, true, LCDC_RASTER_TIMING_0_REG),
414 REG(1, true, LCDC_RASTER_TIMING_1_REG),
415 REG(1, true, LCDC_RASTER_TIMING_2_REG),
416 REG(1, true, LCDC_DMA_CTRL_REG),
417 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG),
418 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG),
419 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG),
420 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG),
421 /* new in revision 2: */
422 REG(2, false, LCDC_RAW_STAT_REG),
423 REG(2, false, LCDC_MASKED_STAT_REG),
424 REG(2, false, LCDC_INT_ENABLE_SET_REG),
425 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
426 REG(2, false, LCDC_END_OF_INT_IND_REG),
427 REG(2, true, LCDC_CLK_ENABLE_REG),
428 REG(2, true, LCDC_INT_ENABLE_SET_REG),
429#undef REG
430};
431#endif
432
433#ifdef CONFIG_DEBUG_FS
434static int tilcdc_regs_show(struct seq_file *m, void *arg)
435{
436 struct drm_info_node *node = (struct drm_info_node *) m->private;
437 struct drm_device *dev = node->minor->dev;
438 struct tilcdc_drm_private *priv = dev->dev_private;
439 unsigned i;
440
441 pm_runtime_get_sync(dev->dev);
442
443 seq_printf(m, "revision: %d\n", priv->rev);
444
445 for (i = 0; i < ARRAY_SIZE(registers); i++)
446 if (priv->rev >= registers[i].rev)
447 seq_printf(m, "%s:\t %08x\n", registers[i].name,
448 tilcdc_read(dev, registers[i].reg));
449
450 pm_runtime_put_sync(dev->dev);
451
452 return 0;
453}
454
455static int tilcdc_mm_show(struct seq_file *m, void *arg)
456{
457 struct drm_info_node *node = (struct drm_info_node *) m->private;
458 struct drm_device *dev = node->minor->dev;
459 return drm_mm_dump_table(m, dev->mm_private);
460}
461
462static struct drm_info_list tilcdc_debugfs_list[] = {
463 { "regs", tilcdc_regs_show, 0 },
464 { "mm", tilcdc_mm_show, 0 },
465 { "fb", drm_fb_cma_debugfs_show, 0 },
466};
467
468static int tilcdc_debugfs_init(struct drm_minor *minor)
469{
470 struct drm_device *dev = minor->dev;
471 struct tilcdc_module *mod;
472 int ret;
473
474 ret = drm_debugfs_create_files(tilcdc_debugfs_list,
475 ARRAY_SIZE(tilcdc_debugfs_list),
476 minor->debugfs_root, minor);
477
478 list_for_each_entry(mod, &module_list, list)
479 if (mod->funcs->debugfs_init)
480 mod->funcs->debugfs_init(mod, minor);
481
482 if (ret) {
483 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
484 return ret;
485 }
486
487 return ret;
488}
489
490static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
491{
492 struct tilcdc_module *mod;
493 drm_debugfs_remove_files(tilcdc_debugfs_list,
494 ARRAY_SIZE(tilcdc_debugfs_list), minor);
495
496 list_for_each_entry(mod, &module_list, list)
497 if (mod->funcs->debugfs_cleanup)
498 mod->funcs->debugfs_cleanup(mod, minor);
499}
500#endif
501
502static const struct file_operations fops = {
503 .owner = THIS_MODULE,
504 .open = drm_open,
505 .release = drm_release,
506 .unlocked_ioctl = drm_ioctl,
507#ifdef CONFIG_COMPAT
508 .compat_ioctl = drm_compat_ioctl,
509#endif
510 .poll = drm_poll,
511 .read = drm_read,
512 .fasync = drm_fasync,
513 .llseek = no_llseek,
514 .mmap = drm_gem_cma_mmap,
515};
516
517static struct drm_driver tilcdc_driver = {
518 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET,
519 .load = tilcdc_load,
520 .unload = tilcdc_unload,
521 .preclose = tilcdc_preclose,
522 .lastclose = tilcdc_lastclose,
523 .irq_handler = tilcdc_irq,
524 .irq_preinstall = tilcdc_irq_preinstall,
525 .irq_postinstall = tilcdc_irq_postinstall,
526 .irq_uninstall = tilcdc_irq_uninstall,
527 .get_vblank_counter = drm_vblank_count,
528 .enable_vblank = tilcdc_enable_vblank,
529 .disable_vblank = tilcdc_disable_vblank,
530 .gem_free_object = drm_gem_cma_free_object,
531 .gem_vm_ops = &drm_gem_cma_vm_ops,
532 .dumb_create = drm_gem_cma_dumb_create,
533 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
534 .dumb_destroy = drm_gem_cma_dumb_destroy,
535#ifdef CONFIG_DEBUG_FS
536 .debugfs_init = tilcdc_debugfs_init,
537 .debugfs_cleanup = tilcdc_debugfs_cleanup,
538#endif
539 .fops = &fops,
540 .name = "tilcdc",
541 .desc = "TI LCD Controller DRM",
542 .date = "20121205",
543 .major = 1,
544 .minor = 0,
545};
546
547/*
548 * Power management:
549 */
550
551#ifdef CONFIG_PM_SLEEP
552static int tilcdc_pm_suspend(struct device *dev)
553{
554 struct drm_device *ddev = dev_get_drvdata(dev);
555 struct tilcdc_drm_private *priv = ddev->dev_private;
556 unsigned i, n = 0;
557
558 drm_kms_helper_poll_disable(ddev);
559
560 /* Save register state: */
561 for (i = 0; i < ARRAY_SIZE(registers); i++)
562 if (registers[i].save && (priv->rev >= registers[i].rev))
563 priv->saved_register[n++] = tilcdc_read(ddev, registers[i].reg);
564
565 return 0;
566}
567
568static int tilcdc_pm_resume(struct device *dev)
569{
570 struct drm_device *ddev = dev_get_drvdata(dev);
571 struct tilcdc_drm_private *priv = ddev->dev_private;
572 unsigned i, n = 0;
573
574 /* Restore register state: */
575 for (i = 0; i < ARRAY_SIZE(registers); i++)
576 if (registers[i].save && (priv->rev >= registers[i].rev))
577 tilcdc_write(ddev, registers[i].reg, priv->saved_register[n++]);
578
579 drm_kms_helper_poll_enable(ddev);
580
581 return 0;
582}
583#endif
584
585static const struct dev_pm_ops tilcdc_pm_ops = {
586 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
587};
588
589/*
590 * Platform driver:
591 */
592
593static int tilcdc_pdev_probe(struct platform_device *pdev)
594{
595 /* bail out early if no DT data: */
596 if (!pdev->dev.of_node) {
597 dev_err(&pdev->dev, "device-tree data is missing\n");
598 return -ENXIO;
599 }
600
601 return drm_platform_init(&tilcdc_driver, pdev);
602}
603
604static int tilcdc_pdev_remove(struct platform_device *pdev)
605{
606 drm_platform_exit(&tilcdc_driver, pdev);
607
608 return 0;
609}
610
611static struct of_device_id tilcdc_of_match[] = {
612 { .compatible = "ti,am33xx-tilcdc", },
613 { },
614};
615MODULE_DEVICE_TABLE(of, tilcdc_of_match);
616
617static struct platform_driver tilcdc_platform_driver = {
618 .probe = tilcdc_pdev_probe,
619 .remove = tilcdc_pdev_remove,
620 .driver = {
621 .owner = THIS_MODULE,
622 .name = "tilcdc",
623 .pm = &tilcdc_pm_ops,
624 .of_match_table = tilcdc_of_match,
625 },
626};
627
628static int __init tilcdc_drm_init(void)
629{
630 DBG("init");
631 tilcdc_tfp410_init();
Rob Clark6e8de0b2013-01-22 16:02:21 -0600632 tilcdc_slave_init();
Rob Clark0d4bbaf2012-12-18 17:34:16 -0600633 tilcdc_panel_init();
Rob Clark16ea9752013-01-08 15:04:28 -0600634 return platform_driver_register(&tilcdc_platform_driver);
635}
636
637static void __exit tilcdc_drm_fini(void)
638{
639 DBG("fini");
Rob Clark16ea9752013-01-08 15:04:28 -0600640 platform_driver_unregister(&tilcdc_platform_driver);
Guido Martínezaaee1af2014-06-17 11:17:08 -0300641 tilcdc_panel_fini();
642 tilcdc_slave_fini();
643 tilcdc_tfp410_fini();
Rob Clark16ea9752013-01-08 15:04:28 -0600644}
645
Rob Clark6e8de0b2013-01-22 16:02:21 -0600646late_initcall(tilcdc_drm_init);
Rob Clark16ea9752013-01-08 15:04:28 -0600647module_exit(tilcdc_drm_fini);
648
649MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
650MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
651MODULE_LICENSE("GPL");