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Max Filippov28570e82012-11-19 08:30:15 +04001/*
2 * arch/xtensa/include/asm/traps.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2012 Tensilica Inc.
9 */
10#ifndef _XTENSA_TRAPS_H
11#define _XTENSA_TRAPS_H
12
13#include <asm/ptrace.h>
14
15/*
16 * handler must be either of the following:
17 * void (*)(struct pt_regs *regs);
18 * void (*)(struct pt_regs *regs, unsigned long exccause);
19 */
20extern void * __init trap_set_handler(int cause, void *handler);
21extern void do_unhandled(struct pt_regs *regs, unsigned long exccause);
22
Max Filippov2d6f82f2013-02-03 05:39:22 +040023static inline void spill_registers(void)
24{
Max Filippovc9f87222014-01-22 08:04:43 +040025#if XCHAL_NUM_AREGS > 16
Max Filippov2d6f82f2013-02-03 05:39:22 +040026 __asm__ __volatile__ (
Max Filippovc9f87222014-01-22 08:04:43 +040027 " call12 1f\n"
28 " _j 2f\n"
29 " retw\n"
30 " .align 4\n"
31 "1:\n"
32 " _entry a1, 48\n"
33 " addi a12, a0, 3\n"
34#if XCHAL_NUM_AREGS > 32
35 " .rept (" __stringify(XCHAL_NUM_AREGS) " - 32) / 12\n"
36 " _entry a1, 48\n"
37 " mov a12, a0\n"
38 " .endr\n"
Max Filippov2d6f82f2013-02-03 05:39:22 +040039#endif
Max Filippovc9f87222014-01-22 08:04:43 +040040 " _entry a1, 48\n"
41#if XCHAL_NUM_AREGS % 12 == 0
42 " mov a8, a8\n"
43#elif XCHAL_NUM_AREGS % 12 == 4
44 " mov a12, a12\n"
45#elif XCHAL_NUM_AREGS % 12 == 8
46 " mov a4, a4\n"
47#endif
48 " retw\n"
49 "2:\n"
50 : : : "a12", "a13", "memory");
51#else
52 __asm__ __volatile__ (
53 " mov a12, a12\n"
54 : : : "memory");
55#endif
Max Filippov2d6f82f2013-02-03 05:39:22 +040056}
57
Max Filippov28570e82012-11-19 08:30:15 +040058#endif /* _XTENSA_TRAPS_H */