blob: b9cd7a4deeca67d7e201bd8bd137478aad36525d [file] [log] [blame]
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +00001/*
2 * Based on arch/arm/mm/flush.c
3 *
4 * Copyright (C) 1995-2002 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/export.h>
21#include <linux/mm.h>
22#include <linux/pagemap.h>
23
24#include <asm/cacheflush.h>
25#include <asm/cachetype.h>
26#include <asm/tlbflush.h>
27
28#include "mm.h"
29
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000030void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
31 unsigned long end)
32{
33 if (vma->vm_flags & VM_EXEC)
34 __flush_icache_all();
35}
36
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +000037static void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
38 unsigned long uaddr, void *kaddr,
39 unsigned long len)
40{
41 if (vma->vm_flags & VM_EXEC) {
42 unsigned long addr = (unsigned long)kaddr;
43 if (icache_is_aliasing()) {
44 __flush_dcache_area(kaddr, len);
45 __flush_icache_all();
46 } else {
47 flush_icache_range(addr, addr + len);
48 }
49 }
50}
51
52/*
53 * Copy user data from/to a page which is mapped into a different processes
54 * address space. Really, we want to allow our "user space" model to handle
55 * this.
56 *
57 * Note that this code needs to run on the current CPU.
58 */
59void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
60 unsigned long uaddr, void *dst, const void *src,
61 unsigned long len)
62{
63#ifdef CONFIG_SMP
64 preempt_disable();
65#endif
66 memcpy(dst, src, len);
67 flush_ptrace_access(vma, page, uaddr, dst, len);
68#ifdef CONFIG_SMP
69 preempt_enable();
70#endif
71}
72
73void __flush_dcache_page(struct page *page)
74{
75 __flush_dcache_area(page_address(page), PAGE_SIZE);
76}
77
78void __sync_icache_dcache(pte_t pte, unsigned long addr)
79{
80 unsigned long pfn;
81 struct page *page;
82
83 pfn = pte_pfn(pte);
84 if (!pfn_valid(pfn))
85 return;
86
87 page = pfn_to_page(pfn);
88 if (!test_and_set_bit(PG_dcache_clean, &page->flags)) {
89 __flush_dcache_page(page);
90 __flush_icache_all();
91 } else if (icache_is_aivivt()) {
92 __flush_icache_all();
93 }
94}
95
96/*
Catalin Marinas84ddb8b2013-05-01 12:23:05 +010097 * This function is called when a page has been modified by the kernel. Mark
98 * it as dirty for later flushing when mapped in user space (if executable,
99 * see __sync_icache_dcache).
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +0000100 */
101void flush_dcache_page(struct page *page)
102{
Catalin Marinas84ddb8b2013-05-01 12:23:05 +0100103 if (test_bit(PG_dcache_clean, &page->flags))
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +0000104 clear_bit(PG_dcache_clean, &page->flags);
Catalin Marinasf1a0c4a2012-03-05 11:49:28 +0000105}
106EXPORT_SYMBOL(flush_dcache_page);
107
108/*
109 * Additional functions defined in assembly.
110 */
111EXPORT_SYMBOL(flush_cache_all);
112EXPORT_SYMBOL(flush_icache_range);