blob: 411fe232adf1338b017b61b3de0d03c71106f465 [file] [log] [blame]
Linus Walleij2744e8a2011-05-02 20:50:54 +02001/*
2 * Interface the pinctrl subsystem
3 *
4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
6 * This interface is used in the core to keep track of pins.
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
10 * License terms: GNU General Public License (GPL) version 2
11 */
12#ifndef __LINUX_PINCTRL_PINCTRL_H
13#define __LINUX_PINCTRL_PINCTRL_H
14
15#ifdef CONFIG_PINCTRL
16
17#include <linux/radix-tree.h>
18#include <linux/spinlock.h>
19#include <linux/list.h>
20#include <linux/seq_file.h>
21
Stephen Warren46919ae2012-03-01 18:48:32 -070022#define PINCTRL_STATE_DEFAULT "default"
23
Linus Walleij2744e8a2011-05-02 20:50:54 +020024struct pinctrl_dev;
25struct pinmux_ops;
Linus Walleijae6b4d82011-10-19 18:14:33 +020026struct pinconf_ops;
Linus Walleij2744e8a2011-05-02 20:50:54 +020027struct gpio_chip;
28
29/**
30 * struct pinctrl_pin_desc - boards/machines provide information on their
31 * pins, pads or other muxable units in this struct
32 * @number: unique pin number from the global pin number space
33 * @name: a name for this pin
34 */
35struct pinctrl_pin_desc {
36 unsigned number;
37 const char *name;
38};
39
40/* Convenience macro to define a single named or anonymous pin descriptor */
41#define PINCTRL_PIN(a, b) { .number = a, .name = b }
42#define PINCTRL_PIN_ANON(a) { .number = a }
43
44/**
45 * struct pinctrl_gpio_range - each pin controller can provide subranges of
46 * the GPIO number space to be handled by the controller
47 * @node: list node for internal use
48 * @name: a name for the chip in this range
49 * @id: an ID number for the chip in this range
50 * @base: base offset of the GPIO range
Chanho Park3c739ad2011-11-11 18:47:58 +090051 * @pin_base: base pin number of the GPIO range
Linus Walleij2744e8a2011-05-02 20:50:54 +020052 * @npins: number of pins in the GPIO range, including the base number
53 * @gc: an optional pointer to a gpio_chip
54 */
55struct pinctrl_gpio_range {
56 struct list_head node;
57 const char *name;
58 unsigned int id;
59 unsigned int base;
Chanho Park3c739ad2011-11-11 18:47:58 +090060 unsigned int pin_base;
Linus Walleij2744e8a2011-05-02 20:50:54 +020061 unsigned int npins;
62 struct gpio_chip *gc;
63};
64
65/**
66 * struct pinctrl_ops - global pin control operations, to be implemented by
67 * pin controller drivers.
68 * @list_groups: list the number of selectable named groups available
69 * in this pinmux driver, the core will begin on 0 and call this
70 * repeatedly as long as it returns >= 0 to enumerate the groups
71 * @get_group_name: return the group name of the pin group
72 * @get_group_pins: return an array of pins corresponding to a certain
73 * group selector @pins, and the size of the array in @num_pins
74 * @pin_dbg_show: optional debugfs display hook that will provide per-device
75 * info for a certain pin in debugfs
76 */
77struct pinctrl_ops {
78 int (*list_groups) (struct pinctrl_dev *pctldev, unsigned selector);
79 const char *(*get_group_name) (struct pinctrl_dev *pctldev,
80 unsigned selector);
81 int (*get_group_pins) (struct pinctrl_dev *pctldev,
82 unsigned selector,
Stephen Warrena5818a82011-10-19 16:19:25 -060083 const unsigned **pins,
84 unsigned *num_pins);
Linus Walleij2744e8a2011-05-02 20:50:54 +020085 void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s,
86 unsigned offset);
87};
88
89/**
90 * struct pinctrl_desc - pin controller descriptor, register this to pin
91 * control subsystem
92 * @name: name for the pin controller
93 * @pins: an array of pin descriptors describing all the pins handled by
94 * this pin controller
95 * @npins: number of descriptors in the array, usually just ARRAY_SIZE()
96 * of the pins field above
Linus Walleij2744e8a2011-05-02 20:50:54 +020097 * @pctlops: pin control operation vtable, to support global concepts like
98 * grouping of pins, this is optional.
Linus Walleijae6b4d82011-10-19 18:14:33 +020099 * @pmxops: pinmux operations vtable, if you support pinmuxing in your driver
100 * @confops: pin config operations vtable, if you support pin configuration in
101 * your driver
Linus Walleij2744e8a2011-05-02 20:50:54 +0200102 * @owner: module providing the pin controller, used for refcounting
103 */
104struct pinctrl_desc {
105 const char *name;
106 struct pinctrl_pin_desc const *pins;
107 unsigned int npins;
Linus Walleij2744e8a2011-05-02 20:50:54 +0200108 struct pinctrl_ops *pctlops;
109 struct pinmux_ops *pmxops;
Linus Walleijae6b4d82011-10-19 18:14:33 +0200110 struct pinconf_ops *confops;
Linus Walleij2744e8a2011-05-02 20:50:54 +0200111 struct module *owner;
112};
113
114/* External interface to pin controller */
115extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
116 struct device *dev, void *driver_data);
117extern void pinctrl_unregister(struct pinctrl_dev *pctldev);
118extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin);
119extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
120 struct pinctrl_gpio_range *range);
121extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
122 struct pinctrl_gpio_range *range);
123extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev);
124extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
125#else
126
Barry Songe0e20752011-10-27 20:38:24 -0700127struct pinctrl_dev;
Linus Walleij2744e8a2011-05-02 20:50:54 +0200128
Linus Walleijae6b4d82011-10-19 18:14:33 +0200129/* Sufficiently stupid default functions when pinctrl is not in use */
Linus Walleij2744e8a2011-05-02 20:50:54 +0200130static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
131{
132 return pin >= 0;
133}
134
135#endif /* !CONFIG_PINCTRL */
136
137#endif /* __LINUX_PINCTRL_PINCTRL_H */