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Jonghwa Lee73118e62012-08-28 17:54:28 +09001/*
2 * clk-max77686.c - Clock driver for Maxim 77686
3 *
4 * Copyright (C) 2012 Samsung Electornics
5 * Jonghwa Lee <jonghwa3.lee@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#include <linux/kernel.h>
24#include <linux/slab.h>
25#include <linux/err.h>
26#include <linux/platform_device.h>
27#include <linux/mfd/max77686.h>
28#include <linux/mfd/max77686-private.h>
29#include <linux/clk-provider.h>
30#include <linux/mutex.h>
31#include <linux/clkdev.h>
32
33enum {
34 MAX77686_CLK_AP = 0,
35 MAX77686_CLK_CP,
36 MAX77686_CLK_PMIC,
37 MAX77686_CLKS_NUM,
38};
39
40struct max77686_clk {
41 struct max77686_dev *iodev;
42 u32 mask;
43 struct clk_hw hw;
44 struct clk_lookup *lookup;
45};
46
Axel Lin3fe296c2012-12-18 15:54:52 +080047static struct max77686_clk *to_max77686_clk(struct clk_hw *hw)
Jonghwa Lee73118e62012-08-28 17:54:28 +090048{
49 return container_of(hw, struct max77686_clk, hw);
50}
51
52static int max77686_clk_prepare(struct clk_hw *hw)
53{
Axel Lin3fe296c2012-12-18 15:54:52 +080054 struct max77686_clk *max77686 = to_max77686_clk(hw);
Jonghwa Lee73118e62012-08-28 17:54:28 +090055
Axel Lin3fe296c2012-12-18 15:54:52 +080056 return regmap_update_bits(max77686->iodev->regmap,
57 MAX77686_REG_32KHZ, max77686->mask,
58 max77686->mask);
Jonghwa Lee73118e62012-08-28 17:54:28 +090059}
60
61static void max77686_clk_unprepare(struct clk_hw *hw)
62{
Axel Lin3fe296c2012-12-18 15:54:52 +080063 struct max77686_clk *max77686 = to_max77686_clk(hw);
Jonghwa Lee73118e62012-08-28 17:54:28 +090064
65 regmap_update_bits(max77686->iodev->regmap,
66 MAX77686_REG_32KHZ, max77686->mask, ~max77686->mask);
67}
68
69static int max77686_clk_is_enabled(struct clk_hw *hw)
70{
Axel Lin3fe296c2012-12-18 15:54:52 +080071 struct max77686_clk *max77686 = to_max77686_clk(hw);
Jonghwa Lee73118e62012-08-28 17:54:28 +090072 int ret;
73 u32 val;
74
Jonghwa Lee73118e62012-08-28 17:54:28 +090075 ret = regmap_read(max77686->iodev->regmap,
76 MAX77686_REG_32KHZ, &val);
77
78 if (ret < 0)
79 return -EINVAL;
80
81 return val & max77686->mask;
82}
83
84static struct clk_ops max77686_clk_ops = {
85 .prepare = max77686_clk_prepare,
86 .unprepare = max77686_clk_unprepare,
87 .is_enabled = max77686_clk_is_enabled,
88};
89
90static struct clk_init_data max77686_clks_init[MAX77686_CLKS_NUM] = {
91 [MAX77686_CLK_AP] = {
92 .name = "32khz_ap",
93 .ops = &max77686_clk_ops,
94 .flags = CLK_IS_ROOT,
95 },
96 [MAX77686_CLK_CP] = {
97 .name = "32khz_cp",
98 .ops = &max77686_clk_ops,
99 .flags = CLK_IS_ROOT,
100 },
101 [MAX77686_CLK_PMIC] = {
102 .name = "32khz_pmic",
103 .ops = &max77686_clk_ops,
104 .flags = CLK_IS_ROOT,
105 },
106};
107
108static int max77686_clk_register(struct device *dev,
109 struct max77686_clk *max77686)
110{
111 struct clk *clk;
112 struct clk_hw *hw = &max77686->hw;
113
114 clk = clk_register(dev, hw);
115
116 if (IS_ERR(clk))
117 return -ENOMEM;
118
119 max77686->lookup = devm_kzalloc(dev, sizeof(struct clk_lookup),
120 GFP_KERNEL);
Axel Lin9f58b9b2012-12-18 15:43:45 +0800121 if (!max77686->lookup)
Jonghwa Lee73118e62012-08-28 17:54:28 +0900122 return -ENOMEM;
123
124 max77686->lookup->con_id = hw->init->name;
125 max77686->lookup->clk = clk;
126
127 clkdev_add(max77686->lookup);
128
129 return 0;
130}
131
Bill Pemberton018ae932012-11-19 13:22:52 -0500132static int max77686_clk_probe(struct platform_device *pdev)
Jonghwa Lee73118e62012-08-28 17:54:28 +0900133{
134 struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
135 struct max77686_clk **max77686_clks;
136 int i, ret;
137
138 max77686_clks = devm_kzalloc(&pdev->dev, sizeof(struct max77686_clk *)
139 * MAX77686_CLKS_NUM, GFP_KERNEL);
Axel Lin9f58b9b2012-12-18 15:43:45 +0800140 if (!max77686_clks)
Jonghwa Lee73118e62012-08-28 17:54:28 +0900141 return -ENOMEM;
142
143 for (i = 0; i < MAX77686_CLKS_NUM; i++) {
144 max77686_clks[i] = devm_kzalloc(&pdev->dev,
145 sizeof(struct max77686_clk), GFP_KERNEL);
Axel Lin9f58b9b2012-12-18 15:43:45 +0800146 if (!max77686_clks[i])
Jonghwa Lee73118e62012-08-28 17:54:28 +0900147 return -ENOMEM;
148 }
149
150 for (i = 0; i < MAX77686_CLKS_NUM; i++) {
151 max77686_clks[i]->iodev = iodev;
152 max77686_clks[i]->mask = 1 << i;
153 max77686_clks[i]->hw.init = &max77686_clks_init[i];
154
155 ret = max77686_clk_register(&pdev->dev, max77686_clks[i]);
156 if (ret) {
157 switch (i) {
158 case MAX77686_CLK_AP:
159 dev_err(&pdev->dev, "Fail to register CLK_AP\n");
160 goto err_clk_ap;
161 break;
162 case MAX77686_CLK_CP:
163 dev_err(&pdev->dev, "Fail to register CLK_CP\n");
164 goto err_clk_cp;
165 break;
166 case MAX77686_CLK_PMIC:
167 dev_err(&pdev->dev, "Fail to register CLK_PMIC\n");
168 goto err_clk_pmic;
169 }
170 }
171 }
172
173 platform_set_drvdata(pdev, max77686_clks);
174
175 goto out;
176
177err_clk_pmic:
178 clkdev_drop(max77686_clks[MAX77686_CLK_CP]->lookup);
179 kfree(max77686_clks[MAX77686_CLK_CP]->hw.clk);
180err_clk_cp:
181 clkdev_drop(max77686_clks[MAX77686_CLK_AP]->lookup);
182 kfree(max77686_clks[MAX77686_CLK_AP]->hw.clk);
183err_clk_ap:
184out:
185 return ret;
186}
187
Bill Pemberton1fc7ad52012-11-19 13:25:43 -0500188static int max77686_clk_remove(struct platform_device *pdev)
Jonghwa Lee73118e62012-08-28 17:54:28 +0900189{
190 struct max77686_clk **max77686_clks = platform_get_drvdata(pdev);
191 int i;
192
193 for (i = 0; i < MAX77686_CLKS_NUM; i++) {
194 clkdev_drop(max77686_clks[i]->lookup);
195 kfree(max77686_clks[i]->hw.clk);
196 }
197 return 0;
198}
199
200static const struct platform_device_id max77686_clk_id[] = {
201 { "max77686-clk", 0},
202 { },
203};
204MODULE_DEVICE_TABLE(platform, max77686_clk_id);
205
206static struct platform_driver max77686_clk_driver = {
207 .driver = {
208 .name = "max77686-clk",
209 .owner = THIS_MODULE,
210 },
211 .probe = max77686_clk_probe,
Bill Pembertonf9cfa632012-11-19 13:19:59 -0500212 .remove = max77686_clk_remove,
Jonghwa Lee73118e62012-08-28 17:54:28 +0900213 .id_table = max77686_clk_id,
214};
215
216static int __init max77686_clk_init(void)
217{
218 return platform_driver_register(&max77686_clk_driver);
219}
220subsys_initcall(max77686_clk_init);
221
222static void __init max77686_clk_cleanup(void)
223{
224 platform_driver_unregister(&max77686_clk_driver);
225}
226module_exit(max77686_clk_cleanup);
227
228MODULE_DESCRIPTION("MAXIM 77686 Clock Driver");
229MODULE_AUTHOR("Jonghwa Lee <jonghwa3.lee@samsung.com>");
230MODULE_LICENSE("GPL");