blob: 82434018cbe81c3cd989de7f6586f88df57ddce1 [file] [log] [blame]
Jerome Glisse771fe6b2009-06-05 14:42:42 +02001/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
Jerome Glissec507f7e2012-05-09 15:34:58 +020027 * Christian König
Jerome Glisse771fe6b2009-06-05 14:42:42 +020028 */
29#include <linux/seq_file.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090030#include <linux/slab.h>
David Howells760285e2012-10-02 18:01:07 +010031#include <drm/drmP.h>
32#include <drm/radeon_drm.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020033#include "radeon_reg.h"
34#include "radeon.h"
35#include "atom.h"
36
Jerome Glissec507f7e2012-05-09 15:34:58 +020037/*
Alex Deucher75923282012-07-17 14:02:38 -040038 * IB
39 * IBs (Indirect Buffers) and areas of GPU accessible memory where
40 * commands are stored. You can put a pointer to the IB in the
41 * command ring and the hw will fetch the commands from the IB
42 * and execute them. Generally userspace acceleration drivers
43 * produce command buffers which are send to the kernel and
44 * put in IBs for execution by the requested ring.
Jerome Glissec507f7e2012-05-09 15:34:58 +020045 */
Lauri Kasanen1109ca02012-08-31 13:43:50 -040046static int radeon_debugfs_sa_init(struct radeon_device *rdev);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020047
Alex Deucher75923282012-07-17 14:02:38 -040048/**
49 * radeon_ib_get - request an IB (Indirect Buffer)
50 *
51 * @rdev: radeon_device pointer
52 * @ring: ring index the IB is associated with
53 * @ib: IB object returned
54 * @size: requested IB size
55 *
56 * Request an IB (all asics). IBs are allocated using the
57 * suballocator.
58 * Returns 0 on success, error on failure.
59 */
Jerome Glisse69e130a2011-12-21 12:13:46 -050060int radeon_ib_get(struct radeon_device *rdev, int ring,
Christian König4bf3dd92012-08-06 18:57:44 +020061 struct radeon_ib *ib, struct radeon_vm *vm,
62 unsigned size)
Jerome Glisse771fe6b2009-06-05 14:42:42 +020063{
Christian König220907d2012-05-10 16:46:43 +020064 int i, r;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020065
Jerome Glissef2e39222012-05-09 15:35:02 +020066 r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, &ib->sa_bo, size, 256, true);
Jerome Glisse771fe6b2009-06-05 14:42:42 +020067 if (r) {
Jerome Glissec507f7e2012-05-09 15:34:58 +020068 dev_err(rdev->dev, "failed to get a new IB (%d)\n", r);
Jerome Glissec507f7e2012-05-09 15:34:58 +020069 return r;
70 }
Jerome Glisseb15ba512011-11-15 11:48:34 -050071
Christian König220907d2012-05-10 16:46:43 +020072 r = radeon_semaphore_create(rdev, &ib->semaphore);
73 if (r) {
74 return r;
75 }
76
Christian König876dc9f2012-05-08 14:24:01 +020077 ib->ring = ring;
78 ib->fence = NULL;
Jerome Glissef2e39222012-05-09 15:35:02 +020079 ib->ptr = radeon_sa_bo_cpu_addr(ib->sa_bo);
Christian König4bf3dd92012-08-06 18:57:44 +020080 ib->vm = vm;
81 if (vm) {
Christian Königca19f212012-09-11 16:09:59 +020082 /* ib pool is bound at RADEON_VA_IB_OFFSET in virtual address
83 * space and soffset is the offset inside the pool bo
Christian König4bf3dd92012-08-06 18:57:44 +020084 */
Christian Königca19f212012-09-11 16:09:59 +020085 ib->gpu_addr = ib->sa_bo->soffset + RADEON_VA_IB_OFFSET;
Christian König4bf3dd92012-08-06 18:57:44 +020086 } else {
87 ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo);
88 }
Jerome Glissef2e39222012-05-09 15:35:02 +020089 ib->is_const_ib = false;
Christian König220907d2012-05-10 16:46:43 +020090 for (i = 0; i < RADEON_NUM_RINGS; ++i)
91 ib->sync_to[i] = NULL;
Jerome Glissec507f7e2012-05-09 15:34:58 +020092
93 return 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020094}
95
Alex Deucher75923282012-07-17 14:02:38 -040096/**
97 * radeon_ib_free - free an IB (Indirect Buffer)
98 *
99 * @rdev: radeon_device pointer
100 * @ib: IB object to free
101 *
102 * Free an IB (all asics).
103 */
Jerome Glissef2e39222012-05-09 15:35:02 +0200104void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200105{
Christian König220907d2012-05-10 16:46:43 +0200106 radeon_semaphore_free(rdev, &ib->semaphore, ib->fence);
Jerome Glissef2e39222012-05-09 15:35:02 +0200107 radeon_sa_bo_free(rdev, &ib->sa_bo, ib->fence);
108 radeon_fence_unref(&ib->fence);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200109}
110
Alex Deucher75923282012-07-17 14:02:38 -0400111/**
Alex Deucher43f12142013-02-01 17:32:42 +0100112 * radeon_ib_sync_to - sync to fence before executing the IB
113 *
114 * @ib: IB object to add fence to
115 * @fence: fence to sync to
116 *
117 * Sync to the fence before executing the IB
118 */
119void radeon_ib_sync_to(struct radeon_ib *ib, struct radeon_fence *fence)
120{
121 struct radeon_fence *other;
122
123 if (!fence)
124 return;
125
126 other = ib->sync_to[fence->ring];
127 ib->sync_to[fence->ring] = radeon_fence_later(fence, other);
128}
129
130/**
Alex Deucher75923282012-07-17 14:02:38 -0400131 * radeon_ib_schedule - schedule an IB (Indirect Buffer) on the ring
132 *
133 * @rdev: radeon_device pointer
134 * @ib: IB object to schedule
135 * @const_ib: Const IB to schedule (SI only)
136 *
137 * Schedule an IB on the associated ring (all asics).
138 * Returns 0 on success, error on failure.
139 *
140 * On SI, there are two parallel engines fed from the primary ring,
141 * the CE (Constant Engine) and the DE (Drawing Engine). Since
142 * resource descriptors have moved to memory, the CE allows you to
143 * prime the caches while the DE is updating register state so that
144 * the resource descriptors will be already in cache when the draw is
145 * processed. To accomplish this, the userspace driver submits two
146 * IBs, one for the CE and one for the DE. If there is a CE IB (called
147 * a CONST_IB), it will be put on the ring prior to the DE IB. Prior
148 * to SI there was just a DE IB.
149 */
Christian König4ef72562012-07-13 13:06:00 +0200150int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib,
151 struct radeon_ib *const_ib)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200152{
Christian König876dc9f2012-05-08 14:24:01 +0200153 struct radeon_ring *ring = &rdev->ring[ib->ring];
Christian König220907d2012-05-10 16:46:43 +0200154 bool need_sync = false;
155 int i, r = 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200156
Christian Könige32eb502011-10-23 12:56:27 +0200157 if (!ib->length_dw || !ring->ready) {
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200158 /* TODO: Nothings in the ib we should report. */
Jerome Glissec507f7e2012-05-09 15:34:58 +0200159 dev_err(rdev->dev, "couldn't schedule ib\n");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200160 return -EINVAL;
161 }
Dave Airlieecb114a2009-09-15 11:12:56 +1000162
Dave Airlie6cdf6582009-06-29 18:29:13 +1000163 /* 64 dwords should be enough for fence too */
Christian König220907d2012-05-10 16:46:43 +0200164 r = radeon_ring_lock(rdev, ring, 64 + RADEON_NUM_RINGS * 8);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200165 if (r) {
Jerome Glissec507f7e2012-05-09 15:34:58 +0200166 dev_err(rdev->dev, "scheduling IB failed (%d).\n", r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200167 return r;
168 }
Christian König220907d2012-05-10 16:46:43 +0200169 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
170 struct radeon_fence *fence = ib->sync_to[i];
171 if (radeon_fence_need_sync(fence, ib->ring)) {
172 need_sync = true;
173 radeon_semaphore_sync_rings(rdev, ib->semaphore,
174 fence->ring, ib->ring);
175 radeon_fence_note_sync(fence, ib->ring);
176 }
177 }
178 /* immediately free semaphore when we don't need to sync */
179 if (!need_sync) {
180 radeon_semaphore_free(rdev, &ib->semaphore, NULL);
181 }
Christian König9b40e5d2012-08-08 12:22:43 +0200182 /* if we can't remember our last VM flush then flush now! */
Jerome Glisse466476d2013-04-16 12:20:15 -0400183 /* XXX figure out why we have to flush for every IB */
184 if (ib->vm /*&& !ib->vm->last_flush*/) {
Alex Deucher498522b2012-10-02 14:43:38 -0400185 radeon_ring_vm_flush(rdev, ib->ring, ib->vm);
Christian König9b40e5d2012-08-08 12:22:43 +0200186 }
Christian König4ef72562012-07-13 13:06:00 +0200187 if (const_ib) {
188 radeon_ring_ib_execute(rdev, const_ib->ring, const_ib);
189 radeon_semaphore_free(rdev, &const_ib->semaphore, NULL);
190 }
Christian König876dc9f2012-05-08 14:24:01 +0200191 radeon_ring_ib_execute(rdev, ib->ring, ib);
192 r = radeon_fence_emit(rdev, &ib->fence, ib->ring);
193 if (r) {
194 dev_err(rdev->dev, "failed to emit fence for new IB (%d)\n", r);
195 radeon_ring_unlock_undo(rdev, ring);
196 return r;
197 }
Christian König4ef72562012-07-13 13:06:00 +0200198 if (const_ib) {
199 const_ib->fence = radeon_fence_ref(ib->fence);
200 }
Christian König9b40e5d2012-08-08 12:22:43 +0200201 /* we just flushed the VM, remember that */
202 if (ib->vm && !ib->vm->last_flush) {
203 ib->vm->last_flush = radeon_fence_ref(ib->fence);
204 }
Christian Könige32eb502011-10-23 12:56:27 +0200205 radeon_ring_unlock_commit(rdev, ring);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200206 return 0;
207}
208
Alex Deucher75923282012-07-17 14:02:38 -0400209/**
210 * radeon_ib_pool_init - Init the IB (Indirect Buffer) pool
211 *
212 * @rdev: radeon_device pointer
213 *
214 * Initialize the suballocator to manage a pool of memory
215 * for use as IBs (all asics).
216 * Returns 0 on success, error on failure.
217 */
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200218int radeon_ib_pool_init(struct radeon_device *rdev)
219{
Jerome Glissec507f7e2012-05-09 15:34:58 +0200220 int r;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200221
Jerome Glissec507f7e2012-05-09 15:34:58 +0200222 if (rdev->ib_pool_ready) {
Jerome Glisse9f022dd2009-09-11 15:35:22 +0200223 return 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200224 }
Jerome Glissec507f7e2012-05-09 15:34:58 +0200225 r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
Christian Königc3b7fe82012-05-09 15:34:56 +0200226 RADEON_IB_POOL_SIZE*64*1024,
227 RADEON_GEM_DOMAIN_GTT);
228 if (r) {
Christian Königc3b7fe82012-05-09 15:34:56 +0200229 return r;
230 }
Christian König2898c342012-07-05 11:55:34 +0200231
232 r = radeon_sa_bo_manager_start(rdev, &rdev->ring_tmp_bo);
233 if (r) {
234 return r;
235 }
236
Jerome Glissec507f7e2012-05-09 15:34:58 +0200237 rdev->ib_pool_ready = true;
238 if (radeon_debugfs_sa_init(rdev)) {
239 dev_err(rdev->dev, "failed to register debugfs file for SA\n");
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200240 }
Jerome Glisseb15ba512011-11-15 11:48:34 -0500241 return 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200242}
243
Alex Deucher75923282012-07-17 14:02:38 -0400244/**
245 * radeon_ib_pool_fini - Free the IB (Indirect Buffer) pool
246 *
247 * @rdev: radeon_device pointer
248 *
249 * Tear down the suballocator managing the pool of memory
250 * for use as IBs (all asics).
251 */
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200252void radeon_ib_pool_fini(struct radeon_device *rdev)
253{
Jerome Glissec507f7e2012-05-09 15:34:58 +0200254 if (rdev->ib_pool_ready) {
Christian König2898c342012-07-05 11:55:34 +0200255 radeon_sa_bo_manager_suspend(rdev, &rdev->ring_tmp_bo);
Jerome Glissec507f7e2012-05-09 15:34:58 +0200256 radeon_sa_bo_manager_fini(rdev, &rdev->ring_tmp_bo);
257 rdev->ib_pool_ready = false;
Alex Deucherca2af922010-05-06 11:02:24 -0400258 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200259}
260
Alex Deucher75923282012-07-17 14:02:38 -0400261/**
262 * radeon_ib_ring_tests - test IBs on the rings
263 *
264 * @rdev: radeon_device pointer
265 *
266 * Test an IB (Indirect Buffer) on each ring.
267 * If the test fails, disable the ring.
268 * Returns 0 on success, error if the primary GFX ring
269 * IB test fails.
270 */
Christian König7bd560e2012-05-02 15:11:12 +0200271int radeon_ib_ring_tests(struct radeon_device *rdev)
272{
273 unsigned i;
274 int r;
275
276 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
277 struct radeon_ring *ring = &rdev->ring[i];
278
279 if (!ring->ready)
280 continue;
281
282 r = radeon_ib_test(rdev, i, ring);
283 if (r) {
284 ring->ready = false;
285
286 if (i == RADEON_RING_TYPE_GFX_INDEX) {
287 /* oh, oh, that's really bad */
288 DRM_ERROR("radeon: failed testing IB on GFX ring (%d).\n", r);
289 rdev->accel_working = false;
290 return r;
291
292 } else {
293 /* still not good, but we can live with it */
294 DRM_ERROR("radeon: failed testing IB on ring %d (%d).\n", i, r);
295 }
296 }
297 }
298 return 0;
299}
300
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200301/*
Alex Deucher75923282012-07-17 14:02:38 -0400302 * Rings
303 * Most engines on the GPU are fed via ring buffers. Ring
304 * buffers are areas of GPU accessible memory that the host
305 * writes commands into and the GPU reads commands out of.
306 * There is a rptr (read pointer) that determines where the
307 * GPU is currently reading, and a wptr (write pointer)
308 * which determines where the host has written. When the
309 * pointers are equal, the ring is idle. When the host
310 * writes commands to the ring buffer, it increments the
311 * wptr. The GPU then starts fetching commands and executes
312 * them until the pointers are equal again.
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200313 */
Lauri Kasanen1109ca02012-08-31 13:43:50 -0400314static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
Jerome Glissec507f7e2012-05-09 15:34:58 +0200315
Alex Deucher75923282012-07-17 14:02:38 -0400316/**
317 * radeon_ring_write - write a value to the ring
318 *
319 * @ring: radeon_ring structure holding ring information
320 * @v: dword (dw) value to write
321 *
322 * Write a value to the requested ring buffer (all asics).
323 */
Jerome Glissec507f7e2012-05-09 15:34:58 +0200324void radeon_ring_write(struct radeon_ring *ring, uint32_t v)
325{
326#if DRM_DEBUG_CODE
327 if (ring->count_dw <= 0) {
Thomas Friebel8ad33cd2012-10-15 13:16:22 -0400328 DRM_ERROR("radeon: writing more dwords to the ring than expected!\n");
Jerome Glissec507f7e2012-05-09 15:34:58 +0200329 }
330#endif
331 ring->ring[ring->wptr++] = v;
332 ring->wptr &= ring->ptr_mask;
333 ring->count_dw--;
334 ring->ring_free_dw--;
335}
336
Alex Deucher75923282012-07-17 14:02:38 -0400337/**
338 * radeon_ring_supports_scratch_reg - check if the ring supports
339 * writing to scratch registers
340 *
341 * @rdev: radeon_device pointer
342 * @ring: radeon_ring structure holding ring information
343 *
344 * Check if a specific ring supports writing to scratch registers (all asics).
345 * Returns true if the ring supports writing to scratch regs, false if not.
346 */
Alex Deucher89d35802012-07-17 14:02:31 -0400347bool radeon_ring_supports_scratch_reg(struct radeon_device *rdev,
348 struct radeon_ring *ring)
349{
350 switch (ring->idx) {
351 case RADEON_RING_TYPE_GFX_INDEX:
352 case CAYMAN_RING_TYPE_CP1_INDEX:
353 case CAYMAN_RING_TYPE_CP2_INDEX:
354 return true;
355 default:
356 return false;
357 }
358}
359
Alex Deucher75923282012-07-17 14:02:38 -0400360/**
361 * radeon_ring_free_size - update the free size
362 *
363 * @rdev: radeon_device pointer
364 * @ring: radeon_ring structure holding ring information
365 *
366 * Update the free dw slots in the ring buffer (all asics).
367 */
Christian Könige32eb502011-10-23 12:56:27 +0200368void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200369{
Alex Deucher78c55602011-11-17 14:25:56 -0500370 u32 rptr;
371
Christian Königf2ba57b2013-04-08 12:41:29 +0200372 if (rdev->wb.enabled && ring != &rdev->ring[R600_RING_TYPE_UVD_INDEX])
Alex Deucher78c55602011-11-17 14:25:56 -0500373 rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]);
Christian König5596a9d2011-10-13 12:48:45 +0200374 else
Alex Deucher78c55602011-11-17 14:25:56 -0500375 rptr = RREG32(ring->rptr_reg);
376 ring->rptr = (rptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200377 /* This works because ring_size is a power of 2 */
Christian Könige32eb502011-10-23 12:56:27 +0200378 ring->ring_free_dw = (ring->rptr + (ring->ring_size / 4));
379 ring->ring_free_dw -= ring->wptr;
380 ring->ring_free_dw &= ring->ptr_mask;
381 if (!ring->ring_free_dw) {
382 ring->ring_free_dw = ring->ring_size / 4;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200383 }
384}
385
Alex Deucher75923282012-07-17 14:02:38 -0400386/**
387 * radeon_ring_alloc - allocate space on the ring buffer
388 *
389 * @rdev: radeon_device pointer
390 * @ring: radeon_ring structure holding ring information
391 * @ndw: number of dwords to allocate in the ring buffer
392 *
393 * Allocate @ndw dwords in the ring buffer (all asics).
394 * Returns 0 on success, error on failure.
395 */
Christian Könige32eb502011-10-23 12:56:27 +0200396int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200397{
398 int r;
399
Alex Deucherfd5d93a2013-01-30 14:24:09 -0500400 /* make sure we aren't trying to allocate more space than there is on the ring */
401 if (ndw > (ring->ring_size / 4))
402 return -ENOMEM;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200403 /* Align requested size with padding so unlock_commit can
404 * pad safely */
Jerome Glisse8444d5c2013-06-19 10:02:28 -0400405 radeon_ring_free_size(rdev, ring);
406 if (ring->ring_free_dw == (ring->ring_size / 4)) {
407 /* This is an empty ring update lockup info to avoid
408 * false positive.
409 */
410 radeon_ring_lockup_update(ring);
411 }
Christian Könige32eb502011-10-23 12:56:27 +0200412 ndw = (ndw + ring->align_mask) & ~ring->align_mask;
413 while (ndw > (ring->ring_free_dw - 1)) {
414 radeon_ring_free_size(rdev, ring);
415 if (ndw < ring->ring_free_dw) {
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200416 break;
417 }
Alex Deucher8b25ed32012-07-17 14:02:30 -0400418 r = radeon_fence_wait_next_locked(rdev, ring->idx);
Matthew Garrett91700f32010-04-30 15:24:17 -0400419 if (r)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200420 return r;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200421 }
Christian Könige32eb502011-10-23 12:56:27 +0200422 ring->count_dw = ndw;
423 ring->wptr_old = ring->wptr;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200424 return 0;
425}
426
Alex Deucher75923282012-07-17 14:02:38 -0400427/**
428 * radeon_ring_lock - lock the ring and allocate space on it
429 *
430 * @rdev: radeon_device pointer
431 * @ring: radeon_ring structure holding ring information
432 * @ndw: number of dwords to allocate in the ring buffer
433 *
434 * Lock the ring and allocate @ndw dwords in the ring buffer
435 * (all asics).
436 * Returns 0 on success, error on failure.
437 */
Christian Könige32eb502011-10-23 12:56:27 +0200438int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
Matthew Garrett91700f32010-04-30 15:24:17 -0400439{
440 int r;
441
Christian Königd6999bc2012-05-09 15:34:45 +0200442 mutex_lock(&rdev->ring_lock);
Christian Könige32eb502011-10-23 12:56:27 +0200443 r = radeon_ring_alloc(rdev, ring, ndw);
Matthew Garrett91700f32010-04-30 15:24:17 -0400444 if (r) {
Christian Königd6999bc2012-05-09 15:34:45 +0200445 mutex_unlock(&rdev->ring_lock);
Matthew Garrett91700f32010-04-30 15:24:17 -0400446 return r;
447 }
448 return 0;
449}
450
Alex Deucher75923282012-07-17 14:02:38 -0400451/**
452 * radeon_ring_commit - tell the GPU to execute the new
453 * commands on the ring buffer
454 *
455 * @rdev: radeon_device pointer
456 * @ring: radeon_ring structure holding ring information
457 *
458 * Update the wptr (write pointer) to tell the GPU to
459 * execute new commands on the ring buffer (all asics).
460 */
Christian Könige32eb502011-10-23 12:56:27 +0200461void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200462{
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200463 /* We pad to match fetch size */
Christian König07a71332012-07-07 12:11:32 +0200464 while (ring->wptr & ring->align_mask) {
Alex Deucher78c55602011-11-17 14:25:56 -0500465 radeon_ring_write(ring, ring->nop);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200466 }
467 DRM_MEMORYBARRIER();
Alex Deucher78c55602011-11-17 14:25:56 -0500468 WREG32(ring->wptr_reg, (ring->wptr << ring->ptr_reg_shift) & ring->ptr_reg_mask);
Christian Könige32eb502011-10-23 12:56:27 +0200469 (void)RREG32(ring->wptr_reg);
Matthew Garrett91700f32010-04-30 15:24:17 -0400470}
471
Alex Deucher75923282012-07-17 14:02:38 -0400472/**
473 * radeon_ring_unlock_commit - tell the GPU to execute the new
474 * commands on the ring buffer and unlock it
475 *
476 * @rdev: radeon_device pointer
477 * @ring: radeon_ring structure holding ring information
478 *
479 * Call radeon_ring_commit() then unlock the ring (all asics).
480 */
Christian Könige32eb502011-10-23 12:56:27 +0200481void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring)
Matthew Garrett91700f32010-04-30 15:24:17 -0400482{
Christian Könige32eb502011-10-23 12:56:27 +0200483 radeon_ring_commit(rdev, ring);
Christian Königd6999bc2012-05-09 15:34:45 +0200484 mutex_unlock(&rdev->ring_lock);
485}
486
Alex Deucher75923282012-07-17 14:02:38 -0400487/**
488 * radeon_ring_undo - reset the wptr
489 *
490 * @ring: radeon_ring structure holding ring information
491 *
Paul Bolle501f9d4c2012-11-20 22:31:06 +0100492 * Reset the driver's copy of the wptr (all asics).
Alex Deucher75923282012-07-17 14:02:38 -0400493 */
Christian Königd6999bc2012-05-09 15:34:45 +0200494void radeon_ring_undo(struct radeon_ring *ring)
495{
496 ring->wptr = ring->wptr_old;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200497}
498
Alex Deucher75923282012-07-17 14:02:38 -0400499/**
500 * radeon_ring_unlock_undo - reset the wptr and unlock the ring
501 *
502 * @ring: radeon_ring structure holding ring information
503 *
504 * Call radeon_ring_undo() then unlock the ring (all asics).
505 */
Christian Könige32eb502011-10-23 12:56:27 +0200506void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *ring)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200507{
Christian Königd6999bc2012-05-09 15:34:45 +0200508 radeon_ring_undo(ring);
509 mutex_unlock(&rdev->ring_lock);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200510}
511
Alex Deucher75923282012-07-17 14:02:38 -0400512/**
513 * radeon_ring_force_activity - add some nop packets to the ring
514 *
515 * @rdev: radeon_device pointer
516 * @ring: radeon_ring structure holding ring information
517 *
518 * Add some nop packets to the ring to force activity (all asics).
519 * Used for lockup detection to see if the rptr is advancing.
520 */
Christian König7b9ef162012-05-02 15:11:23 +0200521void radeon_ring_force_activity(struct radeon_device *rdev, struct radeon_ring *ring)
522{
523 int r;
524
Christian König7b9ef162012-05-02 15:11:23 +0200525 radeon_ring_free_size(rdev, ring);
526 if (ring->rptr == ring->wptr) {
527 r = radeon_ring_alloc(rdev, ring, 1);
528 if (!r) {
529 radeon_ring_write(ring, ring->nop);
530 radeon_ring_commit(rdev, ring);
531 }
532 }
Christian König7b9ef162012-05-02 15:11:23 +0200533}
534
Alex Deucher75923282012-07-17 14:02:38 -0400535/**
Paul Bolle501f9d4c2012-11-20 22:31:06 +0100536 * radeon_ring_lockup_update - update lockup variables
Alex Deucher75923282012-07-17 14:02:38 -0400537 *
538 * @ring: radeon_ring structure holding ring information
539 *
540 * Update the last rptr value and timestamp (all asics).
541 */
Christian König069211e2012-05-02 15:11:20 +0200542void radeon_ring_lockup_update(struct radeon_ring *ring)
543{
544 ring->last_rptr = ring->rptr;
545 ring->last_activity = jiffies;
546}
547
548/**
549 * radeon_ring_test_lockup() - check if ring is lockedup by recording information
550 * @rdev: radeon device structure
551 * @ring: radeon_ring structure holding ring information
552 *
553 * We don't need to initialize the lockup tracking information as we will either
554 * have CP rptr to a different value of jiffies wrap around which will force
555 * initialization of the lockup tracking informations.
556 *
557 * A possible false positivie is if we get call after while and last_cp_rptr ==
558 * the current CP rptr, even if it's unlikely it might happen. To avoid this
559 * if the elapsed time since last call is bigger than 2 second than we return
560 * false and update the tracking information. Due to this the caller must call
561 * radeon_ring_test_lockup several time in less than 2sec for lockup to be reported
562 * the fencing code should be cautious about that.
563 *
564 * Caller should write to the ring to force CP to do something so we don't get
565 * false positive when CP is just gived nothing to do.
566 *
567 **/
568bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
569{
570 unsigned long cjiffies, elapsed;
571 uint32_t rptr;
572
573 cjiffies = jiffies;
574 if (!time_after(cjiffies, ring->last_activity)) {
575 /* likely a wrap around */
576 radeon_ring_lockup_update(ring);
577 return false;
578 }
579 rptr = RREG32(ring->rptr_reg);
580 ring->rptr = (rptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift;
581 if (ring->rptr != ring->last_rptr) {
582 /* CP is still working no lockup */
583 radeon_ring_lockup_update(ring);
584 return false;
585 }
586 elapsed = jiffies_to_msecs(cjiffies - ring->last_activity);
Christian König3368ff02012-05-02 15:11:21 +0200587 if (radeon_lockup_timeout && elapsed >= radeon_lockup_timeout) {
Christian König069211e2012-05-02 15:11:20 +0200588 dev_err(rdev->dev, "GPU lockup CP stall for more than %lumsec\n", elapsed);
589 return true;
590 }
591 /* give a chance to the GPU ... */
592 return false;
593}
594
Christian König55d7c222012-07-09 11:52:44 +0200595/**
596 * radeon_ring_backup - Back up the content of a ring
597 *
598 * @rdev: radeon_device pointer
599 * @ring: the ring we want to back up
600 *
601 * Saves all unprocessed commits from a ring, returns the number of dwords saved.
602 */
603unsigned radeon_ring_backup(struct radeon_device *rdev, struct radeon_ring *ring,
604 uint32_t **data)
605{
606 unsigned size, ptr, i;
Christian König55d7c222012-07-09 11:52:44 +0200607
608 /* just in case lock the ring */
609 mutex_lock(&rdev->ring_lock);
610 *data = NULL;
611
Alex Deucher89d35802012-07-17 14:02:31 -0400612 if (ring->ring_obj == NULL) {
Christian König55d7c222012-07-09 11:52:44 +0200613 mutex_unlock(&rdev->ring_lock);
614 return 0;
615 }
616
617 /* it doesn't make sense to save anything if all fences are signaled */
Alex Deucher8b25ed32012-07-17 14:02:30 -0400618 if (!radeon_fence_count_emitted(rdev, ring->idx)) {
Christian König55d7c222012-07-09 11:52:44 +0200619 mutex_unlock(&rdev->ring_lock);
620 return 0;
621 }
622
623 /* calculate the number of dw on the ring */
Alex Deucher89d35802012-07-17 14:02:31 -0400624 if (ring->rptr_save_reg)
625 ptr = RREG32(ring->rptr_save_reg);
626 else if (rdev->wb.enabled)
627 ptr = le32_to_cpu(*ring->next_rptr_cpu_addr);
628 else {
629 /* no way to read back the next rptr */
630 mutex_unlock(&rdev->ring_lock);
631 return 0;
632 }
633
Christian König55d7c222012-07-09 11:52:44 +0200634 size = ring->wptr + (ring->ring_size / 4);
635 size -= ptr;
636 size &= ring->ptr_mask;
637 if (size == 0) {
638 mutex_unlock(&rdev->ring_lock);
639 return 0;
640 }
641
642 /* and then save the content of the ring */
Dan Carpenter1e179d4e2012-07-20 14:17:00 +0300643 *data = kmalloc_array(size, sizeof(uint32_t), GFP_KERNEL);
644 if (!*data) {
645 mutex_unlock(&rdev->ring_lock);
646 return 0;
647 }
Christian König55d7c222012-07-09 11:52:44 +0200648 for (i = 0; i < size; ++i) {
649 (*data)[i] = ring->ring[ptr++];
650 ptr &= ring->ptr_mask;
651 }
652
653 mutex_unlock(&rdev->ring_lock);
654 return size;
655}
656
657/**
658 * radeon_ring_restore - append saved commands to the ring again
659 *
660 * @rdev: radeon_device pointer
661 * @ring: ring to append commands to
662 * @size: number of dwords we want to write
663 * @data: saved commands
664 *
665 * Allocates space on the ring and restore the previously saved commands.
666 */
667int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring,
668 unsigned size, uint32_t *data)
669{
670 int i, r;
671
672 if (!size || !data)
673 return 0;
674
675 /* restore the saved ring content */
676 r = radeon_ring_lock(rdev, ring, size);
677 if (r)
678 return r;
679
680 for (i = 0; i < size; ++i) {
681 radeon_ring_write(ring, data[i]);
682 }
683
684 radeon_ring_unlock_commit(rdev, ring);
685 kfree(data);
686 return 0;
687}
688
Alex Deucher75923282012-07-17 14:02:38 -0400689/**
690 * radeon_ring_init - init driver ring struct.
691 *
692 * @rdev: radeon_device pointer
693 * @ring: radeon_ring structure holding ring information
694 * @ring_size: size of the ring
695 * @rptr_offs: offset of the rptr writeback location in the WB buffer
696 * @rptr_reg: MMIO offset of the rptr register
697 * @wptr_reg: MMIO offset of the wptr register
698 * @ptr_reg_shift: bit offset of the rptr/wptr values
699 * @ptr_reg_mask: bit mask of the rptr/wptr values
700 * @nop: nop packet for this ring
701 *
702 * Initialize the driver information for the selected ring (all asics).
703 * Returns 0 on success, error on failure.
704 */
Christian Könige32eb502011-10-23 12:56:27 +0200705int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size,
Alex Deucher78c55602011-11-17 14:25:56 -0500706 unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg,
707 u32 ptr_reg_shift, u32 ptr_reg_mask, u32 nop)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200708{
709 int r;
710
Christian Könige32eb502011-10-23 12:56:27 +0200711 ring->ring_size = ring_size;
712 ring->rptr_offs = rptr_offs;
713 ring->rptr_reg = rptr_reg;
714 ring->wptr_reg = wptr_reg;
Alex Deucher78c55602011-11-17 14:25:56 -0500715 ring->ptr_reg_shift = ptr_reg_shift;
716 ring->ptr_reg_mask = ptr_reg_mask;
717 ring->nop = nop;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200718 /* Allocate ring buffer */
Christian Könige32eb502011-10-23 12:56:27 +0200719 if (ring->ring_obj == NULL) {
720 r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true,
Alex Deucher40f5cf92012-05-10 18:33:13 -0400721 RADEON_GEM_DOMAIN_GTT,
722 NULL, &ring->ring_obj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200723 if (r) {
Jerome Glisse4c788672009-11-20 14:29:23 +0100724 dev_err(rdev->dev, "(%d) ring create failed\n", r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200725 return r;
726 }
Christian Könige32eb502011-10-23 12:56:27 +0200727 r = radeon_bo_reserve(ring->ring_obj, false);
Jerome Glisse4c788672009-11-20 14:29:23 +0100728 if (unlikely(r != 0))
729 return r;
Christian Könige32eb502011-10-23 12:56:27 +0200730 r = radeon_bo_pin(ring->ring_obj, RADEON_GEM_DOMAIN_GTT,
731 &ring->gpu_addr);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200732 if (r) {
Christian Könige32eb502011-10-23 12:56:27 +0200733 radeon_bo_unreserve(ring->ring_obj);
Jerome Glisse4c788672009-11-20 14:29:23 +0100734 dev_err(rdev->dev, "(%d) ring pin failed\n", r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200735 return r;
736 }
Christian Könige32eb502011-10-23 12:56:27 +0200737 r = radeon_bo_kmap(ring->ring_obj,
738 (void **)&ring->ring);
739 radeon_bo_unreserve(ring->ring_obj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200740 if (r) {
Jerome Glisse4c788672009-11-20 14:29:23 +0100741 dev_err(rdev->dev, "(%d) ring map failed\n", r);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200742 return r;
743 }
744 }
Christian Könige32eb502011-10-23 12:56:27 +0200745 ring->ptr_mask = (ring->ring_size / 4) - 1;
746 ring->ring_free_dw = ring->ring_size / 4;
Alex Deucher89d35802012-07-17 14:02:31 -0400747 if (rdev->wb.enabled) {
748 u32 index = RADEON_WB_RING0_NEXT_RPTR + (ring->idx * 4);
749 ring->next_rptr_gpu_addr = rdev->wb.gpu_addr + index;
750 ring->next_rptr_cpu_addr = &rdev->wb.wb[index/4];
751 }
Christian Königec1a6cc2012-05-02 15:11:11 +0200752 if (radeon_debugfs_ring_init(rdev, ring)) {
753 DRM_ERROR("Failed to register debugfs file for rings !\n");
754 }
Christian König48c0ac92012-08-20 15:38:47 +0200755 radeon_ring_lockup_update(ring);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200756 return 0;
757}
758
Alex Deucher75923282012-07-17 14:02:38 -0400759/**
760 * radeon_ring_fini - tear down the driver ring struct.
761 *
762 * @rdev: radeon_device pointer
763 * @ring: radeon_ring structure holding ring information
764 *
765 * Tear down the driver information for the selected ring (all asics).
766 */
Christian Könige32eb502011-10-23 12:56:27 +0200767void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *ring)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200768{
Jerome Glisse4c788672009-11-20 14:29:23 +0100769 int r;
Alex Deucherca2af922010-05-06 11:02:24 -0400770 struct radeon_bo *ring_obj;
Jerome Glisse4c788672009-11-20 14:29:23 +0100771
Christian Königd6999bc2012-05-09 15:34:45 +0200772 mutex_lock(&rdev->ring_lock);
Christian Könige32eb502011-10-23 12:56:27 +0200773 ring_obj = ring->ring_obj;
Christian Königd6999bc2012-05-09 15:34:45 +0200774 ring->ready = false;
Christian Könige32eb502011-10-23 12:56:27 +0200775 ring->ring = NULL;
776 ring->ring_obj = NULL;
Christian Königd6999bc2012-05-09 15:34:45 +0200777 mutex_unlock(&rdev->ring_lock);
Alex Deucherca2af922010-05-06 11:02:24 -0400778
779 if (ring_obj) {
780 r = radeon_bo_reserve(ring_obj, false);
781 if (likely(r == 0)) {
782 radeon_bo_kunmap(ring_obj);
783 radeon_bo_unpin(ring_obj);
784 radeon_bo_unreserve(ring_obj);
785 }
786 radeon_bo_unref(&ring_obj);
787 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200788}
789
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200790/*
791 * Debugfs info
792 */
793#if defined(CONFIG_DEBUG_FS)
Christian Königaf9720f2011-10-24 17:08:44 +0200794
795static int radeon_debugfs_ring_info(struct seq_file *m, void *data)
796{
797 struct drm_info_node *node = (struct drm_info_node *) m->private;
798 struct drm_device *dev = node->minor->dev;
799 struct radeon_device *rdev = dev->dev_private;
800 int ridx = *(int*)node->info_ent->data;
801 struct radeon_ring *ring = &rdev->ring[ridx];
802 unsigned count, i, j;
Jerome Glisse4d009192013-01-02 17:30:34 -0500803 u32 tmp;
Christian Königaf9720f2011-10-24 17:08:44 +0200804
805 radeon_ring_free_size(rdev, ring);
806 count = (ring->ring_size / 4) - ring->ring_free_dw;
Jerome Glisse4d009192013-01-02 17:30:34 -0500807 tmp = RREG32(ring->wptr_reg) >> ring->ptr_reg_shift;
808 seq_printf(m, "wptr(0x%04x): 0x%08x [%5d]\n", ring->wptr_reg, tmp, tmp);
809 tmp = RREG32(ring->rptr_reg) >> ring->ptr_reg_shift;
810 seq_printf(m, "rptr(0x%04x): 0x%08x [%5d]\n", ring->rptr_reg, tmp, tmp);
Christian König45df6802012-07-06 16:22:55 +0200811 if (ring->rptr_save_reg) {
812 seq_printf(m, "rptr next(0x%04x): 0x%08x\n", ring->rptr_save_reg,
813 RREG32(ring->rptr_save_reg));
814 }
Jerome Glisse4d009192013-01-02 17:30:34 -0500815 seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n", ring->wptr, ring->wptr);
816 seq_printf(m, "driver's copy of the rptr: 0x%08x [%5d]\n", ring->rptr, ring->rptr);
Jerome Glisse5f0839c2013-01-11 15:19:43 -0500817 seq_printf(m, "last semaphore signal addr : 0x%016llx\n", ring->last_semaphore_signal_addr);
818 seq_printf(m, "last semaphore wait addr : 0x%016llx\n", ring->last_semaphore_wait_addr);
Christian Königaf9720f2011-10-24 17:08:44 +0200819 seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw);
820 seq_printf(m, "%u dwords in ring\n", count);
Jerome Glisse4d009192013-01-02 17:30:34 -0500821 /* print 8 dw before current rptr as often it's the last executed
822 * packet that is the root issue
823 */
824 i = (ring->rptr + ring->ptr_mask + 1 - 32) & ring->ptr_mask;
825 for (j = 0; j <= (count + 32); j++) {
826 seq_printf(m, "r[%5d]=0x%08x\n", i, ring->ring[i]);
Christian Königaf9720f2011-10-24 17:08:44 +0200827 i = (i + 1) & ring->ptr_mask;
828 }
829 return 0;
830}
831
Christian Königf2ba57b2013-04-08 12:41:29 +0200832static int radeon_gfx_index = RADEON_RING_TYPE_GFX_INDEX;
833static int cayman_cp1_index = CAYMAN_RING_TYPE_CP1_INDEX;
834static int cayman_cp2_index = CAYMAN_RING_TYPE_CP2_INDEX;
835static int radeon_dma1_index = R600_RING_TYPE_DMA_INDEX;
836static int radeon_dma2_index = CAYMAN_RING_TYPE_DMA1_INDEX;
837static int r600_uvd_index = R600_RING_TYPE_UVD_INDEX;
Christian Königaf9720f2011-10-24 17:08:44 +0200838
839static struct drm_info_list radeon_debugfs_ring_info_list[] = {
Christian Königf2ba57b2013-04-08 12:41:29 +0200840 {"radeon_ring_gfx", radeon_debugfs_ring_info, 0, &radeon_gfx_index},
841 {"radeon_ring_cp1", radeon_debugfs_ring_info, 0, &cayman_cp1_index},
842 {"radeon_ring_cp2", radeon_debugfs_ring_info, 0, &cayman_cp2_index},
843 {"radeon_ring_dma1", radeon_debugfs_ring_info, 0, &radeon_dma1_index},
844 {"radeon_ring_dma2", radeon_debugfs_ring_info, 0, &radeon_dma2_index},
845 {"radeon_ring_uvd", radeon_debugfs_ring_info, 0, &r600_uvd_index},
Christian Königaf9720f2011-10-24 17:08:44 +0200846};
847
Christian König711a9722012-05-09 15:34:51 +0200848static int radeon_debugfs_sa_info(struct seq_file *m, void *data)
849{
850 struct drm_info_node *node = (struct drm_info_node *) m->private;
851 struct drm_device *dev = node->minor->dev;
852 struct radeon_device *rdev = dev->dev_private;
853
Jerome Glissec507f7e2012-05-09 15:34:58 +0200854 radeon_sa_bo_dump_debug_info(&rdev->ring_tmp_bo, m);
Christian König711a9722012-05-09 15:34:51 +0200855
856 return 0;
857
858}
859
860static struct drm_info_list radeon_debugfs_sa_list[] = {
861 {"radeon_sa_info", &radeon_debugfs_sa_info, 0, NULL},
862};
863
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200864#endif
865
Lauri Kasanen1109ca02012-08-31 13:43:50 -0400866static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring)
Christian Königaf9720f2011-10-24 17:08:44 +0200867{
868#if defined(CONFIG_DEBUG_FS)
Christian Königec1a6cc2012-05-02 15:11:11 +0200869 unsigned i;
870 for (i = 0; i < ARRAY_SIZE(radeon_debugfs_ring_info_list); ++i) {
871 struct drm_info_list *info = &radeon_debugfs_ring_info_list[i];
872 int ridx = *(int*)radeon_debugfs_ring_info_list[i].data;
873 unsigned r;
874
875 if (&rdev->ring[ridx] != ring)
876 continue;
877
878 r = radeon_debugfs_add_files(rdev, info, 1);
879 if (r)
880 return r;
881 }
Christian Königaf9720f2011-10-24 17:08:44 +0200882#endif
Christian Königec1a6cc2012-05-02 15:11:11 +0200883 return 0;
Christian Königaf9720f2011-10-24 17:08:44 +0200884}
885
Lauri Kasanen1109ca02012-08-31 13:43:50 -0400886static int radeon_debugfs_sa_init(struct radeon_device *rdev)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200887{
888#if defined(CONFIG_DEBUG_FS)
Jerome Glissec507f7e2012-05-09 15:34:58 +0200889 return radeon_debugfs_add_files(rdev, radeon_debugfs_sa_list, 1);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200890#else
891 return 0;
892#endif
893}