blob: 57338fe11be3a72e919279b033640f792d9f193e [file] [log] [blame]
John Rigby2101cba2012-01-16 22:39:48 -07001/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based (loosely) on the Linux code
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef _MMC_H_
27#define _MMC_H_
28
29#include <linux/list.h>
30
31#define SD_VERSION_SD 0x20000
32#define SD_VERSION_2 (SD_VERSION_SD | 0x20)
33#define SD_VERSION_1_0 (SD_VERSION_SD | 0x10)
34#define SD_VERSION_1_10 (SD_VERSION_SD | 0x1a)
35#define MMC_VERSION_MMC 0x10000
36#define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC)
37#define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x12)
38#define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x14)
39#define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x22)
40#define MMC_VERSION_3 (MMC_VERSION_MMC | 0x30)
41#define MMC_VERSION_4 (MMC_VERSION_MMC | 0x40)
42
43#define MMC_MODE_HS 0x001
44#define MMC_MODE_HS_52MHz 0x010
45#define MMC_MODE_1BIT 0x000
46#define MMC_MODE_4BIT 0x100
47#define MMC_MODE_8BIT 0x200
48#define MMC_MODE_DDR 0x400
49#define MMC_MODE_DDR_4BIT (MMC_MODE_4BIT | MMC_MODE_DDR)
50#define MMC_MODE_DDR_8BIT (MMC_MODE_8BIT | MMC_MODE_DDR)
51#define MMC_MODE_REL_WR 0x800
52
53#define SD_DATA_4BIT 0x00040000
54
55#define IS_SD(x) (x->version & SD_VERSION_SD)
56
57#define MMC_DATA_READ 1
58#define MMC_DATA_WRITE 2
59
60#define NO_CARD_ERR -16 /* No SD/MMC card inserted */
61#define UNUSABLE_ERR -17 /* Unusable Card */
62#define COMM_ERR -18 /* Communications Error */
63#define TIMEOUT -19
64
65#define MMC_CMD_GO_IDLE_STATE 0
66#define MMC_CMD_SEND_OP_COND 1
67#define MMC_CMD_ALL_SEND_CID 2
68#define MMC_CMD_SET_RELATIVE_ADDR 3
69#define MMC_CMD_SET_DSR 4
70#define MMC_CMD_SWITCH 6
71#define MMC_CMD_SELECT_CARD 7
72#define MMC_CMD_SEND_EXT_CSD 8
73#define MMC_CMD_SEND_CSD 9
74#define MMC_CMD_SEND_CID 10
75#define MMC_CMD_STOP_TRANSMISSION 12
76#define MMC_CMD_SEND_STATUS 13
77#define MMC_CMD_SET_BLOCKLEN 16
78#define MMC_CMD_READ_SINGLE_BLOCK 17
79#define MMC_CMD_READ_MULTIPLE_BLOCK 18
80#define MMC_CMD_SET_BLOCK_COUNT 23
81#define MMC_CMD_WRITE_SINGLE_BLOCK 24
82#define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
83#define MMC_CMD_APP_CMD 55
84
85#define SD_CMD_SEND_RELATIVE_ADDR 3
86#define SD_CMD_SWITCH_FUNC 6
87#define SD_CMD_SEND_IF_COND 8
88
89#define SD_CMD_APP_SET_BUS_WIDTH 6
90#define SD_CMD_APP_SEND_OP_COND 41
91#define SD_CMD_APP_SEND_SCR 51
92
93/* SCR definitions in different words */
94#define SD_HIGHSPEED_BUSY 0x00020000
95#define SD_HIGHSPEED_SUPPORTED 0x00020000
96
97#define MMC_HS_TIMING 0x00000100
98#define MMC_HS_52MHZ 0x2
99
100#define OCR_BUSY 0x80000000
101#define OCR_HCS 0x40000000
102
103#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
104#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
105#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
106#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
107#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
108#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
109#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
110#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
111#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
112#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
113#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
114#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
115#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
116#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
117#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
118#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
119#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
120
121#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
122#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte
123 addressed by index which are
124 1 in value field */
125#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte
126 addressed by index, which are
127 1 in value field */
128#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */
129
130#define SD_SWITCH_CHECK 0
131#define SD_SWITCH_SWITCH 1
132
133/*
134 * EXT_CSD fields
135 */
136
137#define EXT_CSD_WR_REL_PARAM 166 /* R */
138#define EXT_CSD_WR_REL_SET 167 /* R/W */
139#define EXT_CSD_BUS_WIDTH 183 /* R/W */
140#define EXT_CSD_HS_TIMING 185 /* R/W */
141#define EXT_CSD_POWER_CLASS 187 /* R/W */
142#define EXT_CSD_REV 192 /* RO */
143#define EXT_CSD_CARD_TYPE 196 /* RO */
144#define EXT_CSD_OUT_OF_INT_TIME 198 /* RO */
145#define EXT_CSD_MIN_PERF_R_8_52 209 /* RO */
146#define EXT_CSD_MIN_PERF_W_8_52 210 /* RO */
147#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
148#define EXT_CSD_REL_WR_SEC_C 222 /* RO */
149#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */
150#define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */
151
152/*
153 * EXT_CSD field definitions
154 */
155
156#define EXT_CSD_CMD_SET_NORMAL (1<<0)
157#define EXT_CSD_CMD_SET_SECURE (1<<1)
158#define EXT_CSD_CMD_SET_CPSECURE (1<<2)
159
160#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
161#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
162
163#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
164#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
165#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
166#define EXT_CSD_BUS_WIDTH_DDR_4 5 /* Card is in 4 bit ddr mode */
167#define EXT_CSD_BUS_WIDTH_DDR_8 6 /* Card is in 8 bit ddr mode */
168
169#define EXT_CSD_WR_REL_PARAM_HS_CTRL_REL (1 << 0)
170#define EXT_CSD_WR_REL_PARAM_EN_REL_WR (1 << 2)
171
172#define R1_ILLEGAL_COMMAND (1 << 22)
173#define R1_APP_CMD (1 << 5)
174
175#define MMC_RSP_PRESENT (1 << 0)
176#define MMC_RSP_136 (1 << 1) /* 136 bit response */
177#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
178#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
179#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
180
181#define MMC_RSP_NONE (0)
182#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
183#define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
184 MMC_RSP_BUSY)
185#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
186#define MMC_RSP_R3 (MMC_RSP_PRESENT)
187#define MMC_RSP_R4 (MMC_RSP_PRESENT)
188#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
189#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
190#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
191
192
193struct mmc_cid {
194 unsigned long psn;
195 unsigned short oid;
196 unsigned char mid;
197 unsigned char prv;
198 unsigned char mdt;
199 char pnm[7];
200};
201
202/*
203 * CSD_EXTRACT can be used as is for all CSD members except for c_size
204 * because c_size spans over a 32-bit boundary and must be expressed by a
205 * combination.
206 */
207#define CSD_EXTRACT(csd, bit, width) ((csd[3-(bit/32)] & \
208 (((1 << width) - 1) << (bit - (bit/32) * 32))) >> (bit - (bit/32) * 32))
209
210#define CSD_STRUCTURE(csd) CSD_EXTRACT(csd, 126, 2)
211#define CSD_SPEC_VERS(csd) CSD_EXTRACT(csd, 122, 4)
212#define CSD_TAAC(csd) CSD_EXTRACT(csd, 112, 8)
213#define CSD_NSAC(csd) CSD_EXTRACT(csd, 104, 8)
214#define CSD_TRAN_SPEED(csd) CSD_EXTRACT(csd, 96, 8)
215#define CSD_CCC(csd) CSD_EXTRACT(csd, 4, 12)
216#define CSD_READ_BL_LEN(csd) CSD_EXTRACT(csd, 80, 1)
217#define CSD_READ_BL_PARTIAL(csd) CSD_EXTRACT(csd, 79, 1)
218#define CSD_WRITE_BLK_MISALIGN(csd) CSD_EXTRACT(csd, 78, 1)
219#define CSD_READ_BLK_MISALIGN(csd) CSD_EXTRACT(csd, 77, 1)
220#define CSD_DSR_IMP(csd) CSD_EXTRACT(csd, 76, 1)
221#define CSD_C_SIZE(csd) (CSD_EXTRACT(csd, 64, 10) << 2 | \
222 CSD_EXTRACT(csd, 62, 2))
223#define CSD_HC_SIZE(csd) (CSD_EXTRACT(csd, 64, 8) << 16 | \
224 CSD_EXTRACT(csd, 48, 16))
225#define CSD_VDD_R_CURR_MIN(csd) CSD_EXTRACT(csd, 59, 3)
226#define CSD_VDD_R_CURR_MAX(csd) CSD_EXTRACT(csd, 56, 3)
227#define CSD_VDD_W_CURR_MIN(csd) CSD_EXTRACT(csd, 53, 3)
228#define CSD_VDD_W_CURR_MAX(csd) CSD_EXTRACT(csd, 50, 3)
229#define CSD_C_SIZE_MULT(csd) CSD_EXTRACT(csd, 47, 3)
230#define CSD_ERASE_GRP_SIZE(csd) CSD_EXTRACT(csd, 42, 5)
231#define CSD_ERASE_GRP_MULT(csd) CSD_EXTRACT(csd, 37, 5)
232#define CSD_WP_GRP_SIZE(csd) CSD_EXTRACT(csd, 32, 5)
233#define CSD_WP_GRP_ENABLE(csd) CSD_EXTRACT(csd, 31, 1)
234#define CSD_DEFAULT_ECC(csd) CSD_EXTRACT(csd, 29, 2)
235#define CSD_R2W_FACTOR(csd) CSD_EXTRACT(csd, 26, 3)
236#define CSD_WRITE_BL_LEN(csd) CSD_EXTRACT(csd, 22, 4)
237#define CSD_WRITE_BL_PARTIAL(csd) CSD_EXTRACT(csd, 21, 1)
238#define CSD_FILE_FORMAT_GRP(csd) CSD_EXTRACT(csd, 15, 1)
239#define CSD_COPY(csd) CSD_EXTRACT(csd, 14, 1)
240#define CSD_PERM_WRITE_PROTECT(csd) CSD_EXTRACT(csd, 13, 1)
241#define CSD_TMP_WRITE_PROTECT(csd) CSD_EXTRACT(csd, 12, 1)
242#define CSD_ECC(csd) CSD_EXTRACT(csd, 8, 2)
243#define CSD_CRC(csd) CSD_EXTRACT(csd, 1, 2)
244#define CSD_ONE(csd) CSD_EXTRACT(csd, 0, 1)
245
246struct mmc_cmd {
247 ushort cmdidx;
248 uint resp_type;
249 uint cmdarg;
250 uint response[4];
251 uint flags;
252};
253
254struct mmc_data {
255 union {
256 char *dest;
257 const char *src; /* src buffers don't get written to */
258 };
259 uint flags;
260 uint blocks;
261 uint blocksize;
262};
263
264struct mmc {
265 struct list_head link;
266 char name[32];
267 void *priv;
268 uint voltages;
269 uint version;
270 uint f_min;
271 uint f_max;
272 int high_capacity;
273 uint bus_width;
274 uint clock;
275 uint card_caps;
276 uint host_caps;
277 uint ocr;
278 uint scr[2];
279 uint csd[4];
280 uint cid[4];
281 ushort rca;
282 uint tran_speed;
283 uint read_bl_len;
284 uint write_bl_len;
285 uint data_timeout;
286 uint wr_rel_param;
287 uint rel_wr_sec_c;
288 u8 ddr_en;
289 u64 capacity;
290 block_dev_desc_t block_dev;
291 int (*send_cmd)(struct mmc *mmc,
292 struct mmc_cmd *cmd, struct mmc_data *data);
293 void (*set_ios)(struct mmc *mmc);
294 int (*init)(struct mmc *mmc);
295};
296
297int mmc_register(struct mmc *mmc);
298int mmc_initialize(bd_t *bis);
299int mmc_init(struct mmc *mmc);
300struct mmc *find_mmc_device(int dev_num);
301void print_mmc_devices(char separator);
302
303#ifndef CONFIG_GENERIC_MMC
304int mmc_legacy_init(int verbose);
305#endif
306#endif /* _MMC_H_ */