| Chander Kashyap | 0aee53b | 2012-02-05 23:01:47 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Lowlevel setup for SMDK5250 board based on S5PC520 |
| 3 | * |
| 4 | * Copyright (C) 2012 Samsung Electronics |
| 5 | * |
| 6 | * See file CREDITS for list of people who contributed to this |
| 7 | * project. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of |
| 12 | * the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | #include <config.h> |
| 26 | #include <version.h> |
| 27 | #include <asm/arch/cpu.h> |
| 28 | |
| 29 | _TEXT_BASE: |
| 30 | .word CONFIG_SYS_TEXT_BASE |
| 31 | |
| 32 | .globl lowlevel_init |
| 33 | lowlevel_init: |
| 34 | |
| 35 | /* use iRAM stack in bl2 */ |
| 36 | ldr sp, =CONFIG_IRAM_STACK |
| 37 | stmdb r13!, {ip,lr} |
| 38 | |
| 39 | /* check reset status */ |
| 40 | ldr r0, =(EXYNOS5_POWER_BASE + INFORM1_OFFSET) |
| 41 | ldr r1, [r0] |
| 42 | |
| 43 | /* AFTR wakeup reset */ |
| 44 | ldr r2, =S5P_CHECK_DIDLE |
| 45 | cmp r1, r2 |
| 46 | beq exit_wakeup |
| 47 | |
| 48 | /* LPA wakeup reset */ |
| 49 | ldr r2, =S5P_CHECK_LPA |
| 50 | cmp r1, r2 |
| 51 | beq exit_wakeup |
| 52 | |
| 53 | /* Sleep wakeup reset */ |
| 54 | ldr r2, =S5P_CHECK_SLEEP |
| 55 | cmp r1, r2 |
| 56 | beq wakeup_reset |
| 57 | |
| Yuvaraj CD | 1f838e8 | 2012-11-15 17:21:16 +0530 | [diff] [blame^] | 58 | /*PS-Hold High*/ |
| 59 | ldr r0, =0x1004330c |
| 60 | ldr r1, [r0] |
| 61 | orr r1, r1, #0x100 |
| 62 | str r1, [r0] |
| Chander Kashyap | 0aee53b | 2012-02-05 23:01:47 +0000 | [diff] [blame] | 63 | /* |
| 64 | * If U-boot is already running in RAM, no need to relocate U-Boot. |
| 65 | * Memory controller must be configured before relocating U-Boot |
| 66 | * in ram. |
| 67 | */ |
| 68 | ldr r0, =0x0ffffff /* r0 <- Mask Bits*/ |
| 69 | bic r1, pc, r0 /* pc <- current addr of code */ |
| 70 | /* r1 <- unmasked bits of pc */ |
| 71 | ldr r2, _TEXT_BASE /* r2 <- original base addr in ram */ |
| 72 | bic r2, r2, r0 /* r2 <- unmasked bits of r2*/ |
| 73 | cmp r1, r2 /* compare r1, r2 */ |
| 74 | beq 1f /* r0 == r1 then skip sdram init */ |
| 75 | |
| 76 | /* init system clock */ |
| 77 | bl system_clock_init |
| 78 | |
| 79 | /* Memory initialize */ |
| 80 | bl mem_ctrl_init |
| 81 | |
| 82 | 1: |
| 83 | bl tzpc_init |
| 84 | ldmia r13!, {ip,pc} |
| 85 | |
| 86 | wakeup_reset: |
| 87 | bl system_clock_init |
| 88 | bl mem_ctrl_init |
| 89 | bl tzpc_init |
| 90 | |
| 91 | exit_wakeup: |
| 92 | /* Load return address and jump to kernel */ |
| 93 | ldr r0, =(EXYNOS5_POWER_BASE + INFORM0_OFFSET) |
| 94 | |
| 95 | /* r1 = physical address of exynos5_cpu_resume function*/ |
| 96 | ldr r1, [r0] |
| 97 | |
| 98 | /* Jump to kernel */ |
| 99 | mov pc, r1 |
| 100 | nop |
| 101 | nop |