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armvixlad96eda2013-06-14 11:42:37 +01001// Copyright 2013, ARM Limited
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are met:
6//
7// * Redistributions of source code must retain the above copyright notice,
8// this list of conditions and the following disclaimer.
9// * Redistributions in binary form must reproduce the above copyright notice,
10// this list of conditions and the following disclaimer in the documentation
11// and/or other materials provided with the distribution.
12// * Neither the name of ARM Limited nor the names of its contributors may be
13// used to endorse or promote products derived from this software without
14// specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27#ifndef VIXL_UTILS_H
28#define VIXL_UTILS_H
29
armvixlf37fdc02014-02-05 13:22:16 +000030#include <math.h>
armvixlad96eda2013-06-14 11:42:37 +010031#include <string.h>
32#include "globals.h"
33
34namespace vixl {
35
armvixl4a102ba2014-07-14 09:02:40 +010036// Macros for compile-time format checking.
37#if defined(__GNUC__)
38#define PRINTF_CHECK(format_index, varargs_index) \
39 __attribute__((format(printf, format_index, varargs_index)))
40#else
41#define PRINTF_CHECK(format_index, varargs_index)
42#endif
43
armvixlad96eda2013-06-14 11:42:37 +010044// Check number width.
45inline bool is_intn(unsigned n, int64_t x) {
armvixlb0c8ae22014-03-21 14:03:59 +000046 VIXL_ASSERT((0 < n) && (n < 64));
47 int64_t limit = INT64_C(1) << (n - 1);
armvixlad96eda2013-06-14 11:42:37 +010048 return (-limit <= x) && (x < limit);
49}
50
51inline bool is_uintn(unsigned n, int64_t x) {
armvixlb0c8ae22014-03-21 14:03:59 +000052 VIXL_ASSERT((0 < n) && (n < 64));
armvixlad96eda2013-06-14 11:42:37 +010053 return !(x >> n);
54}
55
56inline unsigned truncate_to_intn(unsigned n, int64_t x) {
armvixlb0c8ae22014-03-21 14:03:59 +000057 VIXL_ASSERT((0 < n) && (n < 64));
58 return (x & ((INT64_C(1) << n) - 1));
armvixlad96eda2013-06-14 11:42:37 +010059}
60
61#define INT_1_TO_63_LIST(V) \
62V(1) V(2) V(3) V(4) V(5) V(6) V(7) V(8) \
63V(9) V(10) V(11) V(12) V(13) V(14) V(15) V(16) \
64V(17) V(18) V(19) V(20) V(21) V(22) V(23) V(24) \
65V(25) V(26) V(27) V(28) V(29) V(30) V(31) V(32) \
66V(33) V(34) V(35) V(36) V(37) V(38) V(39) V(40) \
67V(41) V(42) V(43) V(44) V(45) V(46) V(47) V(48) \
68V(49) V(50) V(51) V(52) V(53) V(54) V(55) V(56) \
69V(57) V(58) V(59) V(60) V(61) V(62) V(63)
70
71#define DECLARE_IS_INT_N(N) \
72inline bool is_int##N(int64_t x) { return is_intn(N, x); }
73#define DECLARE_IS_UINT_N(N) \
74inline bool is_uint##N(int64_t x) { return is_uintn(N, x); }
75#define DECLARE_TRUNCATE_TO_INT_N(N) \
76inline int truncate_to_int##N(int x) { return truncate_to_intn(N, x); }
77INT_1_TO_63_LIST(DECLARE_IS_INT_N)
78INT_1_TO_63_LIST(DECLARE_IS_UINT_N)
79INT_1_TO_63_LIST(DECLARE_TRUNCATE_TO_INT_N)
80#undef DECLARE_IS_INT_N
81#undef DECLARE_IS_UINT_N
82#undef DECLARE_TRUNCATE_TO_INT_N
83
84// Bit field extraction.
85inline uint32_t unsigned_bitextract_32(int msb, int lsb, uint32_t x) {
86 return (x >> lsb) & ((1 << (1 + msb - lsb)) - 1);
87}
88
89inline uint64_t unsigned_bitextract_64(int msb, int lsb, uint64_t x) {
armvixl578645f2013-08-15 17:21:42 +010090 return (x >> lsb) & ((static_cast<uint64_t>(1) << (1 + msb - lsb)) - 1);
armvixlad96eda2013-06-14 11:42:37 +010091}
92
93inline int32_t signed_bitextract_32(int msb, int lsb, int32_t x) {
94 return (x << (31 - msb)) >> (lsb + 31 - msb);
95}
96
97inline int64_t signed_bitextract_64(int msb, int lsb, int64_t x) {
98 return (x << (63 - msb)) >> (lsb + 63 - msb);
99}
100
armvixlf37fdc02014-02-05 13:22:16 +0000101// Floating point representation.
armvixlad96eda2013-06-14 11:42:37 +0100102uint32_t float_to_rawbits(float value);
103uint64_t double_to_rawbits(double value);
104float rawbits_to_float(uint32_t bits);
105double rawbits_to_double(uint64_t bits);
106
armvixlf37fdc02014-02-05 13:22:16 +0000107
108// NaN tests.
109inline bool IsSignallingNaN(double num) {
armvixl5799d6c2014-05-01 11:05:00 +0100110 const uint64_t kFP64QuietNaNMask = UINT64_C(0x0008000000000000);
armvixlf37fdc02014-02-05 13:22:16 +0000111 uint64_t raw = double_to_rawbits(num);
112 if (isnan(num) && ((raw & kFP64QuietNaNMask) == 0)) {
113 return true;
114 }
115 return false;
116}
117
118
119inline bool IsSignallingNaN(float num) {
armvixlb0c8ae22014-03-21 14:03:59 +0000120 const uint32_t kFP32QuietNaNMask = 0x00400000;
armvixlf37fdc02014-02-05 13:22:16 +0000121 uint32_t raw = float_to_rawbits(num);
122 if (isnan(num) && ((raw & kFP32QuietNaNMask) == 0)) {
123 return true;
124 }
125 return false;
126}
127
128
129template <typename T>
130inline bool IsQuietNaN(T num) {
131 return isnan(num) && !IsSignallingNaN(num);
132}
133
134
armvixlb0c8ae22014-03-21 14:03:59 +0000135// Convert the NaN in 'num' to a quiet NaN.
136inline double ToQuietNaN(double num) {
armvixl5799d6c2014-05-01 11:05:00 +0100137 const uint64_t kFP64QuietNaNMask = UINT64_C(0x0008000000000000);
armvixlb0c8ae22014-03-21 14:03:59 +0000138 VIXL_ASSERT(isnan(num));
139 return rawbits_to_double(double_to_rawbits(num) | kFP64QuietNaNMask);
140}
141
142
143inline float ToQuietNaN(float num) {
144 const uint32_t kFP32QuietNaNMask = 0x00400000;
145 VIXL_ASSERT(isnan(num));
146 return rawbits_to_float(float_to_rawbits(num) | kFP32QuietNaNMask);
147}
148
149
150// Fused multiply-add.
151inline double FusedMultiplyAdd(double op1, double op2, double a) {
152 return fma(op1, op2, a);
153}
154
155
156inline float FusedMultiplyAdd(float op1, float op2, float a) {
157 return fmaf(op1, op2, a);
158}
159
160
161// Bit counting.
armvixlad96eda2013-06-14 11:42:37 +0100162int CountLeadingZeros(uint64_t value, int width);
163int CountLeadingSignBits(int64_t value, int width);
164int CountTrailingZeros(uint64_t value, int width);
165int CountSetBits(uint64_t value, int width);
armvixl4a102ba2014-07-14 09:02:40 +0100166uint64_t LowestSetBit(uint64_t value);
167bool IsPowerOf2(int64_t value);
armvixlad96eda2013-06-14 11:42:37 +0100168
armvixl330dc712014-11-25 10:38:32 +0000169unsigned CountClearHalfWords(uint64_t imm, unsigned reg_size);
170
armvixlad96eda2013-06-14 11:42:37 +0100171// Pointer alignment
172// TODO: rename/refactor to make it specific to instructions.
173template<typename T>
174bool IsWordAligned(T pointer) {
armvixlb0c8ae22014-03-21 14:03:59 +0000175 VIXL_ASSERT(sizeof(pointer) == sizeof(intptr_t)); // NOLINT(runtime/sizeof)
armvixlc68cb642014-09-25 18:49:30 +0100176 return ((intptr_t)(pointer) & 3) == 0;
armvixlad96eda2013-06-14 11:42:37 +0100177}
178
armvixl330dc712014-11-25 10:38:32 +0000179// Increment a pointer (up to 64 bits) until it has the specified alignment.
armvixlad96eda2013-06-14 11:42:37 +0100180template<class T>
181T AlignUp(T pointer, size_t alignment) {
armvixl4a102ba2014-07-14 09:02:40 +0100182 // Use C-style casts to get static_cast behaviour for integral types (T), and
183 // reinterpret_cast behaviour for other types.
184
armvixl330dc712014-11-25 10:38:32 +0000185 uint64_t pointer_raw = (uint64_t)pointer;
186 VIXL_STATIC_ASSERT(sizeof(pointer) <= sizeof(pointer_raw));
armvixl4a102ba2014-07-14 09:02:40 +0100187
armvixlad96eda2013-06-14 11:42:37 +0100188 size_t align_step = (alignment - pointer_raw) % alignment;
armvixlb0c8ae22014-03-21 14:03:59 +0000189 VIXL_ASSERT((pointer_raw + align_step) % alignment == 0);
armvixl4a102ba2014-07-14 09:02:40 +0100190
191 return (T)(pointer_raw + align_step);
armvixlad96eda2013-06-14 11:42:37 +0100192}
193
armvixl330dc712014-11-25 10:38:32 +0000194// Decrement a pointer (up to 64 bits) until it has the specified alignment.
armvixlb0c8ae22014-03-21 14:03:59 +0000195template<class T>
196T AlignDown(T pointer, size_t alignment) {
armvixl4a102ba2014-07-14 09:02:40 +0100197 // Use C-style casts to get static_cast behaviour for integral types (T), and
198 // reinterpret_cast behaviour for other types.
199
armvixl330dc712014-11-25 10:38:32 +0000200 uint64_t pointer_raw = (uint64_t)pointer;
201 VIXL_STATIC_ASSERT(sizeof(pointer) <= sizeof(pointer_raw));
armvixl4a102ba2014-07-14 09:02:40 +0100202
armvixlb0c8ae22014-03-21 14:03:59 +0000203 size_t align_step = pointer_raw % alignment;
204 VIXL_ASSERT((pointer_raw - align_step) % alignment == 0);
armvixl4a102ba2014-07-14 09:02:40 +0100205
206 return (T)(pointer_raw - align_step);
armvixlb0c8ae22014-03-21 14:03:59 +0000207}
208
armvixlad96eda2013-06-14 11:42:37 +0100209} // namespace vixl
210
211#endif // VIXL_UTILS_H