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author | Fathi Boudra <fathi.boudra@linaro.org> | 2013-04-28 09:33:08 +0300 |
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committer | Fathi Boudra <fathi.boudra@linaro.org> | 2013-04-28 09:33:08 +0300 |
commit | 3b4bd47f8f4ed3aaf7c81c9b5d2d37ad79fadf4a (patch) | |
tree | b9996006addfd7ae70a39672b76843b49aebc189 /Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt |
Imported Upstream version 3.9.0HEADupstream/3.9.0upstreammaster
Diffstat (limited to 'Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt')
-rw-r--r-- | Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt b/Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt new file mode 100644 index 00000000..f13f1c5b --- /dev/null +++ b/Documentation/devicetree/bindings/tty/serial/snps-dw-apb-uart.txt @@ -0,0 +1,25 @@ +* Synopsys DesignWare ABP UART + +Required properties: +- compatible : "snps,dw-apb-uart" +- reg : offset and length of the register set for the device. +- interrupts : should contain uart interrupt. +- clock-frequency : the input clock frequency for the UART. + +Optional properties: +- reg-shift : quantity to shift the register offsets by. If this property is + not present then the register offsets are not shifted. +- reg-io-width : the size (in bytes) of the IO accesses that should be + performed on the device. If this property is not present then single byte + accesses are used. + +Example: + + uart@80230000 { + compatible = "snps,dw-apb-uart"; + reg = <0x80230000 0x100>; + clock-frequency = <3686400>; + interrupts = <10>; + reg-shift = <2>; + reg-io-width = <4>; + }; |