sd card detect msm8996integration-qcomlt-linux

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

4 files changed, 135 insertions, 21 deletions

diff --git a/arch/arm64/boot/dts/qcom/apq8096-dragonboard.dtsi b/arch/arm64/boot/dts/qcom/apq8096-dragonboard.dtsi
index d8a415212c9e2..d51f7f21f3645 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-dragonboard.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-dragonboard.dtsi
@@ -49,6 +49,16 @@
 			core-vdda-supply = <&pm8994_l12>;
 			core-vcc-supply = <&pm8994_s4>;
 		};
+
+		sdhci@74A4900 {
+			vmmc-supply = <&pm8994_l21>;
+			vqmmc-supply = <&pm8994_l13>;
+			pinctrl-names = "default", "sleep";
+			pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
+			pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
+			cd-gpios = <&msmgpio 38 0x1>;
+			status = "okay";
+		};
 	};
 
 	glink {
@@ -199,5 +209,5 @@
 				};
 			};
 		};
-	};		
+	};
 };
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 4d6663561df1e..f2f8f813c7582 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -198,7 +198,7 @@
 			status = "disabled";
 		};
 
-		pinctrl@1010000 {
+	msmgpio:pinctrl@1010000 {
 			compatible = "qcom,msm8996-pinctrl";
 			reg = <0x01010000 0x300000>;
 			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
@@ -207,6 +207,82 @@
 			interrupt-controller;
 			#interrupt-cells = <2>;
 
+		sdc2_clk_on: sdc2_clk_on {
+			config {
+				pins = "sdc2_clk";
+				bias-disable;		/* NO pull */
+				drive-strength = <16>;	/* 16 MA */
+			};
+		};
+
+		sdc2_clk_off: sdc2_clk_off {
+			config {
+				pins = "sdc2_clk";
+				bias-disable;		/* NO pull */
+				drive-strength = <2>;	/* 2 MA */
+			};
+		};
+
+		sdc2_cmd_on: sdc2_cmd_on {
+			config {
+				pins = "sdc2_cmd";
+				bias-pull-up;		/* pull up */
+				drive-strength = <10>;	/* 10 MA */
+			};
+		};
+
+		sdc2_cmd_off: sdc2_cmd_off {
+			config {
+				pins = "sdc2_cmd";
+				bias-pull-up;		/* pull up */
+				drive-strength = <2>;	/* 2 MA */
+			};
+		};
+
+		sdc2_data_on: sdc2_data_on {
+			config {
+				pins = "sdc2_data";
+				bias-pull-up;		/* pull up */
+				drive-strength = <10>;	/* 10 MA */
+			};
+		};
+
+		sdc2_data_off: sdc2_data_off {
+			config {
+				pins = "sdc2_data";
+				bias-pull-up;		/* pull up */
+				drive-strength = <2>;	/* 2 MA */
+			};
+		};
+
+
+		sdc2_cd_on: sdc2_cd_on {
+			mux {
+				pins = "gpio38";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio38";
+				bias-pull-up;		/* pull up */
+				drive-strength = <16>;	/* 16 MA */
+			};
+		};
+
+		sdc2_cd_off: sdc2_cd_off {
+			mux {
+				pins = "gpio38";
+				function = "gpio";
+			};
+
+			config {
+				pins = "gpio38";
+				bias-pull-up;		/* pull up */
+				drive-strength = <2>;	/* 2 MA */
+			};
+		};
+
+
 			hdmi_hpd_active: hdmi_hpd_active {
 				mux {
 					pins = "gpio34";
@@ -560,6 +636,23 @@
 				compatible = "qcom,ufs_variant";
 			};
 		};
+
+
+		sdhc_2: sdhci@74A4900 {
+			//compatible = "qcom,sdhci-msm";
+			compatible = "qcom,sdhci-msm-v4";
+			reg = <0x74A4900 0x314>, <0x74A4000 0x800>;
+			reg-names = "hc_mem", "core_mem";
+
+			interrupts = <0 125 0>, <0 221 0>;
+			interrupt-names = "hc_irq", "pwr_irq";
+
+			clock-names = "iface", "core";
+			clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+				 <&gcc GCC_SDCC2_APPS_CLK>;
+			bus-width = <4>;
+			status = "disabled";
+		};
 	};
 
 	glink {
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 0653fe730150c..365d1fa0ef552 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -477,6 +477,10 @@ static int sdhci_msm_probe(struct platform_device *pdev)
 		goto bus_clk_disable;
 	}
 
+	ret = clk_set_rate(msm_host->pclk, INT_MAX);
+	if (ret)
+		dev_warn(&pdev->dev, "core clock boost failed\n");
+
 	ret = clk_prepare_enable(msm_host->pclk);
 	if (ret)
 		goto bus_clk_disable;
@@ -507,6 +511,7 @@ static int sdhci_msm_probe(struct platform_device *pdev)
 		goto clk_disable;
 	}
 
+pr_emerg("DEBUG:::::::::::::; clk rate %d pclk rate %d \n", clk_get_rate(msm_host->clk), clk_get_rate(msm_host->pclk));
 	/* Reset the core and Enable SDHC mode */
 	writel_relaxed(readl_relaxed(msm_host->core_mem + CORE_POWER) |
 		       CORE_SW_RST, msm_host->core_mem + CORE_POWER);
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 6bd3d1794966d..febd3d6a9e18d 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1083,7 +1083,7 @@ static u16 sdhci_get_preset_value(struct sdhci_host *host)
 		preset = sdhci_readw(host, SDHCI_PRESET_FOR_HS400);
 		break;
 	default:
-		pr_warn("%s: Invalid UHS-I mode selected\n",
+		pr_err("%s: Invalid UHS-I mode selected\n",
 			mmc_hostname(host->mmc));
 		preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR12);
 		break;
@@ -1498,7 +1498,7 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios)
 			else if (ios->drv_type == MMC_SET_DRIVER_TYPE_D)
 				ctrl_2 |= SDHCI_CTRL_DRV_TYPE_D;
 			else {
-				pr_warn("%s: invalid driver type, default to driver type B\n",
+				pr_err("%s: invalid driver type, default to driver type B\n",
 					mmc_hostname(mmc));
 				ctrl_2 |= SDHCI_CTRL_DRV_TYPE_B;
 			}
@@ -1726,10 +1726,12 @@ static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host,
 		sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
 
 		if (!IS_ERR(mmc->supply.vqmmc)) {
+				pr_err("%s: Switching to 3.3V signalling voltage \n",
+					mmc_hostname(mmc));
 			ret = regulator_set_voltage(mmc->supply.vqmmc, 2700000,
 						    3600000);
 			if (ret) {
-				pr_warn("%s: Switching to 3.3V signalling voltage failed\n",
+				pr_err("%s: Switching to 3.3V signalling voltage failed\n",
 					mmc_hostname(mmc));
 				return -EIO;
 			}
@@ -1742,16 +1744,18 @@ static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host,
 		if (!(ctrl & SDHCI_CTRL_VDD_180))
 			return 0;
 
-		pr_warn("%s: 3.3V regulator output did not became stable\n",
+		pr_err("%s: 3.3V regulator output did not became stable\n",
 			mmc_hostname(mmc));
 
 		return -EAGAIN;
 	case MMC_SIGNAL_VOLTAGE_180:
 		if (!IS_ERR(mmc->supply.vqmmc)) {
+				pr_err("%s: Switching to 1.8V signalling voltage \n",
+					mmc_hostname(mmc));
 			ret = regulator_set_voltage(mmc->supply.vqmmc,
 					1700000, 1950000);
 			if (ret) {
-				pr_warn("%s: Switching to 1.8V signalling voltage failed\n",
+				pr_err("%s: Switching to 1.8V signalling voltage failed\n",
 					mmc_hostname(mmc));
 				return -EIO;
 			}
@@ -1773,16 +1777,18 @@ static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host,
 		if (ctrl & SDHCI_CTRL_VDD_180)
 			return 0;
 
-		pr_warn("%s: 1.8V regulator output did not became stable\n",
+		pr_err("%s: 1.8V regulator output did not became stable\n",
 			mmc_hostname(mmc));
 
 		return -EAGAIN;
 	case MMC_SIGNAL_VOLTAGE_120:
 		if (!IS_ERR(mmc->supply.vqmmc)) {
+				pr_err("%s: Switching to 1.2V signalling voltage \n",
+					mmc_hostname(mmc));
 			ret = regulator_set_voltage(mmc->supply.vqmmc, 1100000,
 						    1300000);
 			if (ret) {
-				pr_warn("%s: Switching to 1.2V signalling voltage failed\n",
+				pr_err("%s: Switching to 1.2V signalling voltage failed\n",
 					mmc_hostname(mmc));
 				return -EIO;
 			}
@@ -1973,7 +1979,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
 		spin_lock_irqsave(&host->lock, flags);
 
 		if (!host->tuning_done) {
-			pr_info(DRIVER_NAME ": Timeout waiting for Buffer Read Ready interrupt during tuning procedure, falling back to fixed sampling clock\n");
+			pr_err(DRIVER_NAME ": Timeout waiting for Buffer Read Ready interrupt during tuning procedure, falling back to fixed sampling clock\n");
 			ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
 			ctrl &= ~SDHCI_CTRL_TUNED_CLK;
 			ctrl &= ~SDHCI_CTRL_EXEC_TUNING;
@@ -2001,7 +2007,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
 		sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
 	}
 	if (!(ctrl & SDHCI_CTRL_TUNED_CLK)) {
-		pr_info(DRIVER_NAME ": Tuning procedure failed, falling back to fixed sampling clock\n");
+		pr_err(DRIVER_NAME ": Tuning procedure failed, falling back to fixed sampling clock\n");
 		err = -EIO;
 	}
 
@@ -2838,7 +2844,7 @@ static int sdhci_set_dma_mask(struct sdhci_host *host)
 	if (host->flags & SDHCI_USE_64_BIT_DMA) {
 		ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
 		if (ret) {
-			pr_warn("%s: Failed to set 64-bit DMA mask.\n",
+			pr_err("%s: Failed to set 64-bit DMA mask.\n",
 				mmc_hostname(mmc));
 			host->flags &= ~SDHCI_USE_64_BIT_DMA;
 		}
@@ -2848,7 +2854,7 @@ static int sdhci_set_dma_mask(struct sdhci_host *host)
 	if (ret) {
 		ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
 		if (ret)
-			pr_warn("%s: Failed to set 32-bit DMA mask.\n",
+			pr_err("%s: Failed to set 32-bit DMA mask.\n",
 				mmc_hostname(mmc));
 	}
 
@@ -2936,7 +2942,7 @@ int sdhci_add_host(struct sdhci_host *host)
 			ret = host->ops->enable_dma(host);
 
 		if (ret) {
-			pr_warn("%s: No suitable DMA available - falling back to PIO\n",
+			pr_err("%s: No suitable DMA available - falling back to PIO\n",
 				mmc_hostname(mmc));
 			host->flags &= ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA);
 
@@ -2972,12 +2978,12 @@ int sdhci_add_host(struct sdhci_host *host)
 		buf = dma_alloc_coherent(mmc_dev(mmc), host->align_buffer_sz +
 					 host->adma_table_sz, &dma, GFP_KERNEL);
 		if (!buf) {
-			pr_warn("%s: Unable to allocate ADMA buffers - falling back to standard DMA\n",
+			pr_err("%s: Unable to allocate ADMA buffers - falling back to standard DMA\n",
 				mmc_hostname(mmc));
 			host->flags &= ~SDHCI_USE_ADMA;
 		} else if ((dma + host->align_buffer_sz) &
 			   (SDHCI_ADMA2_DESC_ALIGN - 1)) {
-			pr_warn("%s: unable to allocate aligned ADMA descriptor\n",
+			pr_err("%s: unable to allocate aligned ADMA descriptor\n",
 				mmc_hostname(mmc));
 			host->flags &= ~SDHCI_USE_ADMA;
 			dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz +
@@ -3130,7 +3136,7 @@ int sdhci_add_host(struct sdhci_host *host)
 					SDHCI_SUPPORT_SDR50 |
 					SDHCI_SUPPORT_DDR50);
 		if (ret) {
-			pr_warn("%s: Failed to enable vqmmc regulator: %d\n",
+			pr_err("%s: Failed to enable vqmmc regulator: %d\n",
 				mmc_hostname(mmc), ret);
 			mmc->supply.vqmmc = ERR_PTR(-EINVAL);
 		}
@@ -3323,7 +3329,7 @@ int sdhci_add_host(struct sdhci_host *host)
 		mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >>
 				SDHCI_MAX_BLOCK_SHIFT;
 		if (mmc->max_blk_size >= 3) {
-			pr_warn("%s: Invalid maximum block size, assuming 512 bytes\n",
+			pr_err("%s: Invalid maximum block size, assuming 512 bytes\n",
 				mmc_hostname(mmc));
 			mmc->max_blk_size = 0;
 		}
@@ -3380,7 +3386,7 @@ int sdhci_add_host(struct sdhci_host *host)
 
 	mmc_add_host(mmc);
 
-	pr_info("%s: SDHCI controller on %s [%s] using %s\n",
+	pr_err("%s: SDHCI controller on %s [%s] using %s\n",
 		mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)),
 		(host->flags & SDHCI_USE_ADMA) ?
 		(host->flags & SDHCI_USE_64_BIT_DMA) ? "ADMA 64-bit" : "ADMA" :
@@ -3474,9 +3480,9 @@ EXPORT_SYMBOL_GPL(sdhci_free_host);
 
 static int __init sdhci_drv_init(void)
 {
-	pr_info(DRIVER_NAME
+	pr_err(DRIVER_NAME
 		": Secure Digital Host Controller Interface driver\n");
-	pr_info(DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
+	pr_err(DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
 
 	return 0;
 }