aboutsummaryrefslogtreecommitdiff
path: root/tests/tcg/test-i386-fprem.c
blob: e91fb1ae93c5e19cd90de067f959f1ff021791c3 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
/*
 *  x86 FPREM test - executes the FPREM and FPREM1 instructions with corner case
 *  operands and prints the operands, result and FPU status word.
 *
 *  Run this on real hardware, then under QEMU, and diff the outputs, to compare
 *  QEMU's implementation to your hardware. The 'run-test-i386-fprem' make
 *  target does this.
 *
 *  Copyright (c) 2003 Fabrice Bellard
 *  Copyright (c) 2012 Catalin Patulea
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, see <http://www.gnu.org/licenses/>.
 */
#include "qemu/compiler.h"
#include "qemu/osdep.h"
#include <stdio.h>
#include <inttypes.h>

/*
 * Inspired by <ieee754.h>'s union ieee854_long_double, but with single
 * long long mantissa fields and assuming little-endianness for simplicity.
 */
union float80u {
    long double d;

    /* This is the IEEE 854 double-extended-precision format.  */
    struct {
        unsigned long long mantissa:63;
        unsigned int one:1;
        unsigned int exponent:15;
        unsigned int negative:1;
        unsigned int empty:16;
    } QEMU_PACKED ieee;

    /* This is for NaNs in the IEEE 854 double-extended-precision format.  */
    struct {
        unsigned long long mantissa:62;
        unsigned int quiet_nan:1;
        unsigned int one:1;
        unsigned int exponent:15;
        unsigned int negative:1;
        unsigned int empty:16;
    } QEMU_PACKED ieee_nan;
};

#define IEEE854_LONG_DOUBLE_BIAS 0x3fff

static const union float80u q_nan = {
    .ieee_nan.negative = 0,  /* X */
    .ieee_nan.exponent = 0x7fff,
    .ieee_nan.one = 1,
    .ieee_nan.quiet_nan = 1,
    .ieee_nan.mantissa = 0,
};

static const union float80u s_nan = {
    .ieee_nan.negative = 0,  /* X */
    .ieee_nan.exponent = 0x7fff,
    .ieee_nan.one = 1,
    .ieee_nan.quiet_nan = 0,
    .ieee_nan.mantissa = 1,  /* nonzero */
};

static const union float80u pos_inf = {
    .ieee.negative = 0,
    .ieee.exponent = 0x7fff,
    .ieee.one = 1,
    .ieee.mantissa = 0,
};

static const union float80u pseudo_pos_inf = {  /* "unsupported" */
    .ieee.negative = 0,
    .ieee.exponent = 0x7fff,
    .ieee.one = 0,
    .ieee.mantissa = 0,
};

static const union float80u pos_denorm = {
    .ieee.negative = 0,
    .ieee.exponent = 0,
    .ieee.one = 0,
    .ieee.mantissa = 1,
};

static const union float80u smallest_positive_norm = {
    .ieee.negative = 0,
    .ieee.exponent = 1,
    .ieee.one = 1,
    .ieee.mantissa = 0,
};

static void fninit()
{
    asm volatile ("fninit\n");
}

static long double fprem(long double a, long double b, uint16_t *sw)
{
    long double result;
    asm volatile ("fprem\n"
                  "fnstsw %1\n"
                  : "=t" (result), "=m" (*sw)
                  : "0" (a), "u" (b)
                  : "st(1)");
    return result;
}

static long double fprem1(long double a, long double b, uint16_t *sw)
{
    long double result;
    asm volatile ("fprem1\n"
                  "fnstsw %1\n"
                  : "=t" (result), "=m" (*sw)
                  : "0" (a), "u" (b)
                  : "st(1)");
    return result;
}

#define FPUS_IE (1 << 0)
#define FPUS_DE (1 << 1)
#define FPUS_ZE (1 << 2)
#define FPUS_OE (1 << 3)
#define FPUS_UE (1 << 4)
#define FPUS_PE (1 << 5)
#define FPUS_SF (1 << 6)
#define FPUS_SE (1 << 7)
#define FPUS_C0 (1 << 8)
#define FPUS_C1 (1 << 9)
#define FPUS_C2 (1 << 10)
#define FPUS_TOP 0x3800
#define FPUS_C3 (1 << 14)
#define FPUS_B  (1 << 15)

#define FPUS_EMASK 0x007f

#define FPUC_EM 0x3f

static void psw(uint16_t sw)
{
    printf("SW:  C3 TopC2C1C0\n");
    printf("SW: %c %d %3d %d %d %d %c %c %c %c %c %c %c %c\n",
           sw & FPUS_B ? 'B' : 'b',
           !!(sw & FPUS_C3),
           (sw & FPUS_TOP) >> 11,
           !!(sw & FPUS_C2),
           !!(sw & FPUS_C1),
           !!(sw & FPUS_C0),
           (sw & FPUS_SE) ? 'S' : 's',
           (sw & FPUS_SF) ? 'F' : 'f',
           (sw & FPUS_PE) ? 'P' : 'p',
           (sw & FPUS_UE) ? 'U' : 'u',
           (sw & FPUS_OE) ? 'O' : 'o',
           (sw & FPUS_ZE) ? 'Z' : 'z',
           (sw & FPUS_DE) ? 'D' : 'd',
           (sw & FPUS_IE) ? 'I' : 'i');
}

static void do_fprem(long double a, long double b)
{
    const union float80u au = {.d = a};
    const union float80u bu = {.d = b};
    union float80u ru;
    uint16_t sw;

    printf("A: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
           au.ieee.negative, au.ieee.exponent, au.ieee.one,
           au.ieee_nan.quiet_nan, (unsigned long long)au.ieee.mantissa,
           a);
    printf("B: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
           bu.ieee.negative, bu.ieee.exponent, bu.ieee.one,
           bu.ieee_nan.quiet_nan, (unsigned long long)bu.ieee.mantissa,
           b);
    fflush(stdout);

    fninit();
    ru.d = fprem(a, b, &sw);
    psw(sw);

    printf("R : S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
           ru.ieee.negative, ru.ieee.exponent, ru.ieee.one,
           ru.ieee_nan.quiet_nan, (unsigned long long)ru.ieee.mantissa,
           ru.d);

    fninit();
    ru.d = fprem1(a, b, &sw);
    psw(sw);

    printf("R1: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
           ru.ieee.negative, ru.ieee.exponent, ru.ieee.one,
           ru.ieee_nan.quiet_nan, (unsigned long long)ru.ieee.mantissa,
           ru.d);

    printf("\n");
}

static void do_fprem_stack_underflow(void)
{
    const long double a = 1.0;
    union float80u ru;
    uint16_t sw;

    fninit();
    asm volatile ("fprem\n"
                  "fnstsw %1\n"
                  : "=t" (ru.d), "=m" (sw)
                  : "0" (a)
                  : "st(1)");
    psw(sw);

    printf("R: S=%d Exp=%04x Int=%d (QNaN=%d) Sig=%016llx (%.06Le)\n",
           ru.ieee.negative, ru.ieee.exponent, ru.ieee.one,
           ru.ieee_nan.quiet_nan, (unsigned long long)ru.ieee.mantissa,
           ru.d);
    printf("\n");
}

static void test_fprem_cases(void)
{
    printf("= stack underflow =\n");
    do_fprem_stack_underflow();

    printf("= invalid operation =\n");
    do_fprem(s_nan.d, 1.0);
    do_fprem(1.0, 0.0);
    do_fprem(pos_inf.d, 1.0);
    do_fprem(pseudo_pos_inf.d, 1.0);

    printf("= denormal =\n");
    do_fprem(pos_denorm.d, 1.0);
    do_fprem(1.0, pos_denorm.d);

    /* printf("= underflow =\n"); */
    /* TODO: Is there a case where FPREM raises underflow? */
}

static void test_fprem_pairs(void)
{
    unsigned long long count;

    unsigned int negative_index_a = 0;
    unsigned int negative_index_b = 0;
    static const unsigned int negative_values[] = {
        0,
        1,
    };

    unsigned int exponent_index_a = 0;
    unsigned int exponent_index_b = 0;
    static const unsigned int exponent_values[] = {
        0,
        1,
        2,
        IEEE854_LONG_DOUBLE_BIAS - 1,
        IEEE854_LONG_DOUBLE_BIAS,
        IEEE854_LONG_DOUBLE_BIAS + 1,
        0x7ffd,
        0x7ffe,
        0x7fff,
    };

    unsigned int one_index_a = 0;
    unsigned int one_index_b = 0;
    static const unsigned int one_values[] = {
        0,
        1,
    };

    unsigned int quiet_nan_index_a = 0;
    unsigned int quiet_nan_index_b = 0;
    static const unsigned int quiet_nan_values[] = {
        0,
        1,
    };

    unsigned int mantissa_index_a = 0;
    unsigned int mantissa_index_b = 0;
    static const unsigned long long mantissa_values[] = {
        0,
        1,
        2,
        0x3ffffffffffffffdULL,
        0x3ffffffffffffffeULL,
        0x3fffffffffffffffULL,
    };

    for (count = 0; ; ++count) {
#define INIT_FIELD(var, field) \
            .ieee_nan.field = field##_values[field##_index_##var]
        const union float80u a = {
            INIT_FIELD(a, negative),
            INIT_FIELD(a, exponent),
            INIT_FIELD(a, one),
            INIT_FIELD(a, quiet_nan),
            INIT_FIELD(a, mantissa),
        };
        const union float80u b = {
            INIT_FIELD(b, negative),
            INIT_FIELD(b, exponent),
            INIT_FIELD(b, one),
            INIT_FIELD(b, quiet_nan),
            INIT_FIELD(b, mantissa),
        };
#undef INIT_FIELD

        do_fprem(a.d, b.d);

        int carry = 1;
#define CARRY_INTO(var, field) do { \
            if (carry) { \
                if (++field##_index_##var == ARRAY_SIZE(field##_values)) { \
                    field##_index_##var = 0; \
                } else { \
                    carry = 0; \
                } \
            } \
        } while (0)
        CARRY_INTO(b, mantissa);
        CARRY_INTO(b, quiet_nan);
        CARRY_INTO(b, one);
        CARRY_INTO(b, exponent);
        CARRY_INTO(b, negative);
        CARRY_INTO(a, mantissa);
        CARRY_INTO(a, quiet_nan);
        CARRY_INTO(a, one);
        CARRY_INTO(a, exponent);
        CARRY_INTO(a, negative);
#undef CARRY_INTO

        if (carry) {
            break;
        }
    }

    fprintf(stderr, "test-i386-fprem: tested %llu cases\n", count);
}

int main(int argc, char **argv)
{
    test_fprem_cases();
    test_fprem_pairs();
    return 0;
}