diff options
| -rw-r--r-- | docs/sphinx/qapidoc.py | 4 | ||||
| -rw-r--r-- | hw/arm/mps2-tz.c | 10 | ||||
| -rw-r--r-- | hw/isa/Kconfig | 1 | ||||
| -rw-r--r-- | hw/isa/piix4.c | 15 | ||||
| -rw-r--r-- | target/mips/translate.c | 2 |
5 files changed, 27 insertions, 5 deletions
diff --git a/docs/sphinx/qapidoc.py b/docs/sphinx/qapidoc.py index b7b86b5dff..b7a2d39c10 100644 --- a/docs/sphinx/qapidoc.py +++ b/docs/sphinx/qapidoc.py @@ -278,7 +278,9 @@ class QAPISchemaGenRSTVisitor(QAPISchemaVisitor): nodelist = [] if ifcond: snode = self._make_section('If') - snode += self._nodes_for_ifcond(ifcond, with_if=False) + snode += nodes.paragraph( + '', '', *self._nodes_for_ifcond(ifcond, with_if=False) + ) nodelist.append(snode) return nodelist diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 3fbe3d29f9..25016e464d 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -238,7 +238,7 @@ static const RAMInfo an524_raminfo[] = { { .name = "sram", .base = 0x20000000, .size = 32 * 4 * KiB, - .mpc = 1, + .mpc = -1, .mrindex = 1, }, { /* We don't model QSPI flash yet; for now expose it as simple ROM */ @@ -306,14 +306,18 @@ static const RAMInfo *find_raminfo_for_mpc(MPS2TZMachineState *mms, int mpc) { MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms); const RAMInfo *p; + const RAMInfo *found = NULL; for (p = mmc->raminfo; p->name; p++) { if (p->mpc == mpc && !(p->flags & IS_ALIAS)) { - return p; + /* There should only be one entry in the array for this MPC */ + g_assert(!found); + found = p; } } /* if raminfo array doesn't have an entry for each MPC this is a bug */ - g_assert_not_reached(); + assert(found); + return found; } static MemoryRegion *mr_for_raminfo(MPS2TZMachineState *mms, diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 2691eae2f0..55e0003ce4 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -48,6 +48,7 @@ config VT82C686 select SERIAL_ISA select FDC select USB_UHCI + select APM config SMC37C669 bool diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index a50d97834c..b3b6a4378a 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -93,12 +93,25 @@ static void piix4_isa_reset(DeviceState *dev) pci_conf[0xae] = 0x00; } +static int piix4_ide_post_load(void *opaque, int version_id) +{ + PIIX4State *s = opaque; + + if (version_id == 2) { + s->rcr = 0; + } + + return 0; +} + static const VMStateDescription vmstate_piix4 = { .name = "PIIX4", - .version_id = 2, + .version_id = 3, .minimum_version_id = 2, + .post_load = piix4_ide_post_load, .fields = (VMStateField[]) { VMSTATE_PCI_DEVICE(dev, PIIX4State), + VMSTATE_UINT8_V(rcr, PIIX4State, 3), VMSTATE_END_OF_LIST() } }; diff --git a/target/mips/translate.c b/target/mips/translate.c index c518bf3963..71fa5ec197 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -12804,6 +12804,8 @@ static void gen_cache_operation(DisasContext *ctx, uint32_t op, int base, TCGv t1 = tcg_temp_new(); gen_base_offset_addr(ctx, t1, base, offset); gen_helper_cache(cpu_env, t1, t0); + tcg_temp_free(t1); + tcg_temp_free_i32(t0); } #if defined(TARGET_MIPS64) |