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-rw-r--r--target-s390x/cpu.h1
-rw-r--r--target-s390x/translate.c2
2 files changed, 2 insertions, 1 deletions
diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h
index 5acd54c6ca..b927c66404 100644
--- a/target-s390x/cpu.h
+++ b/target-s390x/cpu.h
@@ -42,6 +42,7 @@
#include "fpu/softfloat.h"
#define NB_MMU_MODES 3
+#define TARGET_INSN_START_EXTRA_WORDS 1
#define MMU_MODE0_SUFFIX _primary
#define MMU_MODE1_SUFFIX _secondary
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 4959828111..6bbc760596 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -5369,7 +5369,7 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu,
tcg_ctx.gen_opc_instr_start[lj] = 1;
tcg_ctx.gen_opc_icount[lj] = num_insns;
}
- tcg_gen_insn_start(dc.pc);
+ tcg_gen_insn_start(dc.pc, dc.cc_op);
num_insns++;
if (unlikely(cpu_breakpoint_test(cs, dc.pc, BP_ANY))) {