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| author | Peter Maydell <peter.maydell@linaro.org> | 2013-09-03 20:12:02 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2013-09-10 19:11:27 +0100 |
| commit | 08307563ff6cf8cb8d2a7927804dfc5c7dbe86d6 (patch) | |
| tree | fc78888c87914b5f2c714a705a4ea65ac1738d6c /vl.c | |
| parent | 4d017979aa1672b40ccc083daf455f8740eead82 (diff) | |
target-arm: Abstract out load/store from a vaddr in AArch32
AArch32 code (ie traditional 32 bit world) expects to be
able to pass a vaddr in a TCGv_i32. However when QEMU is
compiled with TARGET_LONG_BITS=32 the TCG load/store
functions take a TCGv_i64. Abstract out load/store with
a 32 bit vaddr so we have a place to put the zero extension
of the vaddr and the extension/truncation of the data value.
Apart from the function definitions most of this patch is
a simple s/tcg_gen_qemu_/gen_aa32_/.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-3-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'vl.c')
0 files changed, 0 insertions, 0 deletions