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authorAlistair Francis <alistair.francis@wdc.com>2019-06-17 18:31:22 -0700
committerPalmer Dabbelt <palmer@sifive.com>2019-06-25 03:05:41 -0700
commit0a13a5b856ebb59dec6d165b87a0ba0e1e2dd952 (patch)
tree829043603c8ad0567ca3e14e6f7a7f88ca9f6901 /target/riscv/cpu.h
parentc9a73910c34a2147bcf6a3b5194d27abb19c2e54 (diff)
target/riscv: Add support for disabling/enabling Counters
Add support for disabling/enabling the "Counters" extension. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'target/riscv/cpu.h')
-rw-r--r--target/riscv/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 0855277b92..4d4e0f89e2 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -222,6 +222,7 @@ typedef struct RISCVCPU {
bool ext_c;
bool ext_s;
bool ext_u;
+ bool ext_counters;
char *priv_spec;
char *user_spec;