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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2024-02-09 08:47:48 +0100
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2024-02-15 15:53:12 +0100
commitb267e78908afd450433ef44d840c4ff30ba37676 (patch)
tree2e610e9da4280733fee2d28091576926677778cc /target/mips
parent77599a696df748e89b8f6610fe8dafaa6986729d (diff)
target/mips: Remove MIPSITUState::itu field
Previous commits removed the MT*C0(SAAR) helpers which were using CPUMIPSState::itu, we can now remove it too. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240209090513.9401-4-philmd@linaro.org>
Diffstat (limited to 'target/mips')
-rw-r--r--target/mips/cpu.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index b4788e1af2..d54e9a4a1c 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1184,7 +1184,6 @@ typedef struct CPUArchState {
#if !defined(CONFIG_USER_ONLY)
CPUMIPSTLBContext *tlb;
qemu_irq irq[8];
- struct MIPSITUState *itu;
MemoryRegion *itc_tag; /* ITC Configuration Tags */
/* Loongson IOCSR memory */