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authorAnthony Liguori <aliguori@us.ibm.com>2011-12-05 08:44:33 -0600
committerAnthony Liguori <aliguori@us.ibm.com>2011-12-05 08:44:33 -0600
commitcac1e30af72c4cf289750193426ebd5d2b6bd1d5 (patch)
treeeb37cda0433cc28f3455bcd2a525707963517dde /target-sh4
parent01e7a53aed945adafc3ee54e2159227839daf0b4 (diff)
parent07f35073c6d6d1b2f42a6b3671b8af2f271986b9 (diff)
Merge remote-tracking branch 'stefanha/trivial-patches' into staging
Diffstat (limited to 'target-sh4')
-rw-r--r--target-sh4/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index f4dda48dd1..006d1a9db8 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -817,7 +817,7 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr)
/*
* TODO : Evaluate CCR and check if the cache is on or off.
* Now CCR is not in CPUSH4State, but in SH7750State.
- * When you move the ccr inot CPUSH4State, the code will be
+ * When you move the ccr into CPUSH4State, the code will be
* as follows.
*/
#if 0