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authorAndreas Färber <afaerber@suse.de>2012-05-03 06:43:49 +0200
committerAndreas Färber <afaerber@suse.de>2012-10-31 04:11:37 +0100
commit3993c6bddf6da21977349ba1b14b86294ef4f7ff (patch)
treee740fcf1f22bb180556c97e172ec7f30d41d7f3a /target-ppc
parentb13ce26d3e8c6682044ae84920f2417b30ce356b (diff)
cpus: Pass CPUState to [qemu_]cpu_has_work()
For target-mips also change the return type to bool. Make include paths for cpu-qom.h consistent for alpha and unicore32. Signed-off-by: Andreas Färber <afaerber@suse.de> [AF: Updated new target-openrisc function accordingly] Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
Diffstat (limited to 'target-ppc')
-rw-r--r--target-ppc/cpu.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 5574042a87..ed491d2ed2 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -2222,8 +2222,10 @@ static inline bool msr_is_64bit(CPUPPCState *env, target_ulong msr)
extern void (*cpu_ppc_hypercall)(PowerPCCPU *);
-static inline bool cpu_has_work(CPUPPCState *env)
+static inline bool cpu_has_work(CPUState *cpu)
{
+ CPUPPCState *env = &POWERPC_CPU(cpu)->env;
+
return msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD);
}