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authorPeter Maydell <peter.maydell@linaro.org>2021-11-22 13:41:48 +0000
committerPeter Maydell <peter.maydell@linaro.org>2021-11-22 13:41:48 +0000
commit4825eaae4fdd56fba0febdfbdd7bf9684ae3ee0d (patch)
tree5e581915b252e58f0e5718fd2d1cfe906ae8a2bb /target-ppc/misc_helper.c
parent49aaac3548bc5a4632a14de939d5312b28dc1ba2 (diff)
Revert "arm: tcg: Adhere to SMCCC 1.3 section 5.2"pull-target-arm-20211122
This reverts commit 9fcd15b9193e819b6cc2fd0a45e3506148812bb4. This change turns out to cause regressions, for instance on the imx6ul boards as described here: https://lore.kernel.org/qemu-devel/c8b89685-7490-328b-51a3-48711c140a84@tribudubois.net/ The primary cause of that regression is that the guest code running at EL3 expects SMCs (not related to PSCI) to do what they would if our PSCI emulation was not present at all, but after this change they instead set a value in R0/X0 and continue. We could fix that by a refactoring that allowed us to only turn on the PSCI emulation if we weren't booting the guest at EL3, but there is a more tangled problem with the highbank board, which: (1) wants to enable PSCI emulation (2) has a bit of guest code that it wants to run at EL3 and to perform SMC calls that trap to the monitor vector table: this is the boot stub code that is written to memory by arm_write_secure_board_setup_dummy_smc() and which the highbank board enables by setting bootinfo->secure_board_setup We can't satisfy both of those and also have the PSCI emulation handle all SMC instruction executions regardless of function identifier value. This is too tricky to try to sort out before 6.2 is released; revert this commit so we can take the time to get it right in the 7.0 release. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20211119163419.557623-1-peter.maydell@linaro.org
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