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authorTom Musta <tommusta@gmail.com>2014-02-12 15:23:01 -0600
committerAlexander Graf <agraf@suse.de>2014-03-05 03:06:54 +0100
commit63be09365a9a4658060e85ce013cc0beaeac25e5 (patch)
treeb9eca6491e45a44bdd1d0e78c78c022c358e819c /target-ppc/int_helper.c
parentaa9e930c8870d06a20b356785d3ec7d9a942a29f (diff)
target-ppc: Altivec 2.07: Multiply Even/Odd Word Instructions
This patch adds the Multilpy Even/Odd Word instructions that are introduced in Power ISA Version 2.07: - Vector Multiply Even Unsigned Word (vmuleuw) - Vector Multiply Even Signed Word (vmulesw) - Vector Multiply Odd Unsigned Word (vmulouw) - Vector Multiply Odd Signed Word (vmulosw) Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/int_helper.c')
-rw-r--r--target-ppc/int_helper.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 20d34e6231..09590c71a2 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -1005,8 +1005,10 @@ void helper_vmsumuhs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
VMUL_DO(mulo##suffix, mul_element, prod_element, cast, 0)
VMUL(sb, s8, s16, int16_t)
VMUL(sh, s16, s32, int32_t)
+VMUL(sw, s32, s64, int64_t)
VMUL(ub, u8, u16, uint16_t)
VMUL(uh, u16, u32, uint32_t)
+VMUL(uw, u32, u64, uint64_t)
#undef VMUL_DO
#undef VMUL