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authorAndreas Färber <afaerber@suse.de>2013-09-04 02:19:44 +0200
committerAndreas Färber <afaerber@suse.de>2014-03-13 19:52:47 +0100
commit00c8cb0a36f51a6866a83c08962d12a0eb21864b (patch)
tree3fc05321f0f72aa3d7612efcce6b53ede066d909 /target-microblaze
parent31b030d4abc5bea89c2b33b39d3b302836f6b6ee (diff)
cputlb: Change tlb_flush() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-microblaze')
-rw-r--r--target-microblaze/cpu.c2
-rw-r--r--target-microblaze/mmu.c3
2 files changed, 3 insertions, 2 deletions
diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
index 3177fe6d12..8e0481186a 100644
--- a/target-microblaze/cpu.c
+++ b/target-microblaze/cpu.c
@@ -65,7 +65,7 @@ static void mb_cpu_reset(CPUState *s)
memset(env, 0, sizeof(CPUMBState));
env->res_addr = RES_ADDR_NONE;
- tlb_flush(env, 1);
+ tlb_flush(s, 1);
/* Disable stack protector. */
env->shr = ~0;
diff --git a/target-microblaze/mmu.c b/target-microblaze/mmu.c
index 7ee1be046c..728da133da 100644
--- a/target-microblaze/mmu.c
+++ b/target-microblaze/mmu.c
@@ -219,6 +219,7 @@ uint32_t mmu_read(CPUMBState *env, uint32_t rn)
void mmu_write(CPUMBState *env, uint32_t rn, uint32_t v)
{
+ MicroBlazeCPU *cpu = mb_env_get_cpu(env);
unsigned int i;
D(qemu_log("%s rn=%d=%x old=%x\n", __func__, rn, v, env->mmu.regs[rn]));
@@ -252,7 +253,7 @@ void mmu_write(CPUMBState *env, uint32_t rn, uint32_t v)
/* Changes to the zone protection reg flush the QEMU TLB.
Fortunately, these are very uncommon. */
if (v != env->mmu.regs[rn]) {
- tlb_flush(env, 1);
+ tlb_flush(CPU(cpu), 1);
}
env->mmu.regs[rn] = v;
break;