aboutsummaryrefslogtreecommitdiff
path: root/target-microblaze/helper.c
diff options
context:
space:
mode:
authorEdgar E. Iglesias <edgar.iglesias@gmail.com>2013-04-23 14:27:09 +0200
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2013-04-26 11:28:50 +0200
commita1bff71c56f2d1048244c829b63797940dd4ba0e (patch)
tree3a6575ef6d40aea660569af5dab8905122e3b9a6 /target-microblaze/helper.c
parente3351000cd682200835763caca87adf708ed1c65 (diff)
downloadqemu-arm-a1bff71c56f2d1048244c829b63797940dd4ba0e.tar.gz
microblaze: Add internal base vectors reg
Configurable at CPU synthesis/instantiation. Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'target-microblaze/helper.c')
-rw-r--r--target-microblaze/helper.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/target-microblaze/helper.c b/target-microblaze/helper.c
index a0416d0b72..0dd669d113 100644
--- a/target-microblaze/helper.c
+++ b/target-microblaze/helper.c
@@ -152,7 +152,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
env->sregs[SR_ESR], env->iflags);
log_cpu_state_mask(CPU_LOG_INT, env, 0);
env->iflags &= ~(IMM_FLAG | D_FLAG);
- env->sregs[SR_PC] = 0x20;
+ env->sregs[SR_PC] = cpu->base_vectors + 0x20;
break;
case EXCP_MMU:
@@ -192,7 +192,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
env->sregs[SR_PC], env->sregs[SR_EAR], env->iflags);
log_cpu_state_mask(CPU_LOG_INT, env, 0);
env->iflags &= ~(IMM_FLAG | D_FLAG);
- env->sregs[SR_PC] = 0x20;
+ env->sregs[SR_PC] = cpu->base_vectors + 0x20;
break;
case EXCP_IRQ:
@@ -233,7 +233,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
env->sregs[SR_MSR] |= t;
env->regs[14] = env->sregs[SR_PC];
- env->sregs[SR_PC] = 0x10;
+ env->sregs[SR_PC] = cpu->base_vectors + 0x10;
//log_cpu_state_mask(CPU_LOG_INT, env, 0);
break;
@@ -252,7 +252,7 @@ void mb_cpu_do_interrupt(CPUState *cs)
if (env->exception_index == EXCP_HW_BREAK) {
env->regs[16] = env->sregs[SR_PC];
env->sregs[SR_MSR] |= MSR_BIP;
- env->sregs[SR_PC] = 0x18;
+ env->sregs[SR_PC] = cpu->base_vectors + 0x18;
} else
env->sregs[SR_PC] = env->btarget;
break;