diff options
| author | Richard Henderson <rth@twiddle.net> | 2014-09-16 12:16:38 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-08-18 11:08:48 -0700 |
| commit | 591243846f7d0dc59f482a89e241a6ce02d25fae (patch) | |
| tree | 1590c103a70c076198d0e38b1b993f70b584c36f /target-alpha/gdbstub.c | |
| parent | 074a9925e1cfd659d5376dcaccd1436d3840e611 (diff) | |
target-alpha: Use separate TCGv temporaries for the shadow registers
This avoids having to manually swap them around when swapping to and
from PALmode. We simply encode the shadow registers into the translation.
The VMStateDescription version changes, because the meaning of "shadow"
changes in the save file when in PALmode. It would be possible to fix
this, but I don't think it's worth the effort.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-alpha/gdbstub.c')
| -rw-r--r-- | target-alpha/gdbstub.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-alpha/gdbstub.c b/target-alpha/gdbstub.c index 980f140e72..99a4051b35 100644 --- a/target-alpha/gdbstub.c +++ b/target-alpha/gdbstub.c @@ -30,7 +30,7 @@ int alpha_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) switch (n) { case 0 ... 30: - val = env->ir[n]; + val = cpu_alpha_load_gr(env, n); break; case 32 ... 62: d.d = env->fir[n - 32]; @@ -66,7 +66,7 @@ int alpha_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) switch (n) { case 0 ... 30: - env->ir[n] = tmp; + cpu_alpha_store_gr(env, n, tmp); break; case 32 ... 62: d.ll = tmp; |