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authorRichard Henderson <rth@twiddle.net>2014-07-08 10:11:06 -0700
committerRichard Henderson <rth@twiddle.net>2015-05-18 13:03:47 -0700
commitb99e80694cc635aa6ed5a3716e89645a8afa261c (patch)
treea866e348753af9ca27b6fd0f9fa3a03e8168545b /target-alpha/fpu_helper.c
parented0851380c8ed181ddd6ed3542b14fcb0bca6700 (diff)
target-alpha: Raise EXC_M_INV properly for fp inputs
Ignore DNZ if software completion isn't used. Raise INV for denormals in system mode so the OS completion handler sees them. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-alpha/fpu_helper.c')
-rw-r--r--target-alpha/fpu_helper.c32
1 files changed, 22 insertions, 10 deletions
diff --git a/target-alpha/fpu_helper.c b/target-alpha/fpu_helper.c
index db523fbc30..ea1f2e22b9 100644
--- a/target-alpha/fpu_helper.c
+++ b/target-alpha/fpu_helper.c
@@ -104,16 +104,14 @@ void helper_ieee_input(CPUAlphaState *env, uint64_t val)
uint64_t frac = val & 0xfffffffffffffull;
if (exp == 0) {
- /* Denormals without DNZ set raise an exception. */
- if (frac != 0 && !env->fp_status.flush_inputs_to_zero) {
- arith_excp(env, GETPC(), EXC_M_UNF, 0);
+ /* Denormals without /S raise an exception. */
+ if (frac != 0) {
+ arith_excp(env, GETPC(), EXC_M_INV, 0);
}
} else if (exp == 0x7ff) {
/* Infinity or NaN. */
- /* ??? I'm not sure these exception bit flags are correct. I do
- know that the Linux kernel, at least, doesn't rely on them and
- just emulates the insn to figure out what exception to use. */
- arith_excp(env, GETPC(), frac ? EXC_M_INV : EXC_M_FOV, 0);
+ env->fpcr |= FPCR_INV;
+ arith_excp(env, GETPC(), EXC_M_INV, 0);
}
}
@@ -124,16 +122,30 @@ void helper_ieee_input_cmp(CPUAlphaState *env, uint64_t val)
uint64_t frac = val & 0xfffffffffffffull;
if (exp == 0) {
- /* Denormals without DNZ set raise an exception. */
- if (frac != 0 && !env->fp_status.flush_inputs_to_zero) {
- arith_excp(env, GETPC(), EXC_M_UNF, 0);
+ /* Denormals without /S raise an exception. */
+ if (frac != 0) {
+ arith_excp(env, GETPC(), EXC_M_INV, 0);
}
} else if (exp == 0x7ff && frac) {
/* NaN. */
+ env->fpcr |= FPCR_INV;
arith_excp(env, GETPC(), EXC_M_INV, 0);
}
}
+/* Input handing with software completion. Trap for denorms, unless DNZ
+ is set. If we try to support DNOD (which none of the produced hardware
+ did, AFAICS), we'll need to suppress the trap when FPCR.DNOD is set;
+ then the code downstream of that will need to cope with denorms sans
+ flush_input_to_zero. Most of it should work sanely, but there's
+ nothing to compare with. */
+void helper_ieee_input_s(CPUAlphaState *env, uint64_t val)
+{
+ if (unlikely(2 * val - 1 < 0x1fffffffffffffull)
+ && !env->fp_status.flush_inputs_to_zero) {
+ arith_excp(env, GETPC(), EXC_M_INV | EXC_M_SWC, 0);
+ }
+}
/* S floating (single) */