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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-10-04 13:28:10 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-10-04 13:28:10 +0100 |
| commit | 9b6a3ea7a699594162ed3d11e4e04b98568dc5c0 (patch) | |
| tree | 764d96006cedc488328f6c346115d4e2e423bd0e /qmp.c | |
| parent | 173ff58580b383a7841b18fddb293038c9d40d1c (diff) | |
target-arm: Correctly handle 'sub pc, pc, 1' for ARMv6pull-target-arm-20161004
In the ARM v6 architecture, 'sub pc, pc, 1' is not an interworking
branch, so the computed new value is written to r15 as a normal
value. The architecture says that in this case, bits [1:0] of
the value written must be ignored if we are in ARM mode (or
bit [0] ignored if in Thumb mode); this is a change from the
ARMv4/v5 specification that behaviour is UNPREDICTABLE.
Use the correct mask on the PC value when doing a non-interworking
store to PC.
A popular library used on RaspberryPi uses this instruction
as part of a trick to determine whether it is running on
ARMv6 or ARMv7, and we were mishandling the sequence.
Fixes bug: https://bugs.launchpad.net/bugs/1625295
Reported-by: <stu.axon@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1474380941-4730-1-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'qmp.c')
0 files changed, 0 insertions, 0 deletions