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authorLucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>2022-05-25 10:49:51 -0300
committerDaniel Henrique Barboza <danielhb413@gmail.com>2022-06-20 08:38:58 -0300
commit62c9947fb769235cc11fe6af18dc9620fbbeafc2 (patch)
treec35a61136441ae10cb6d2c2e354814eb92914231 /include/qemu
parent4724bbd28475210d25e0c949a7f424550487b187 (diff)
host-utils: Implemented signed 256-by-128 division
Based on already existing QEMU implementation created a signed 256 bit by 128 bit division needed to implement the vector divide extended signed quadword instruction from PowerISA 3.1 Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220525134954.85056-6-lucas.araujo@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'include/qemu')
-rw-r--r--include/qemu/host-utils.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/qemu/host-utils.h b/include/qemu/host-utils.h
index 9767af7573..bc743f5e32 100644
--- a/include/qemu/host-utils.h
+++ b/include/qemu/host-utils.h
@@ -851,4 +851,5 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t n1,
}
Int128 divu256(Int128 *plow, Int128 *phigh, Int128 divisor);
+Int128 divs256(Int128 *plow, Int128 *phigh, Int128 divisor);
#endif