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authorPeter Maydell <peter.maydell@linaro.org>2011-01-20 16:04:52 +0000
committerAurelien Jarno <aurelien@aurel32.net>2011-01-20 17:20:18 +0100
commit730986e4942188c5ec2b8752e3db47d09cb222b2 (patch)
tree3a24f1b33cceea8abf7585e6b8371b63f46e92fe /hw
parent5dbbda340533cd7d217dcf3ab904fb353598cbde (diff)
hw/pl190.c: Fix writing of default vector address
The PL190 implementation keeps the default vector address in vect_addr[16], but we weren't using this for writes to the DEFVECTADDR register. As a result of this fix the default_addr structure member is unused and we can delete it. Reported-by: Himanshu Chauhan <hschauhan@nulltrace.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'hw')
-rw-r--r--hw/pl190.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/hw/pl190.c b/hw/pl190.c
index 17c279bed7..75f2ba1966 100644
--- a/hw/pl190.c
+++ b/hw/pl190.c
@@ -21,7 +21,6 @@ typedef struct {
uint32_t soft_level;
uint32_t irq_enable;
uint32_t fiq_select;
- uint32_t default_addr;
uint8_t vect_control[16];
uint32_t vect_addr[PL190_NUM_PRIO];
/* Mask containing interrupts with higher priority than this one. */
@@ -186,7 +185,7 @@ static void pl190_write(void *opaque, target_phys_addr_t offset, uint32_t val)
s->priority = s->prev_prio[s->priority];
break;
case 13: /* DEFVECTADDR */
- s->default_addr = val;
+ s->vect_addr[16] = val;
break;
case 0xc0: /* ITCR */
if (val) {
@@ -252,7 +251,6 @@ static const VMStateDescription vmstate_pl190 = {
VMSTATE_UINT32(soft_level, pl190_state),
VMSTATE_UINT32(irq_enable, pl190_state),
VMSTATE_UINT32(fiq_select, pl190_state),
- VMSTATE_UINT32(default_addr, pl190_state),
VMSTATE_UINT8_ARRAY(vect_control, pl190_state, 16),
VMSTATE_UINT32_ARRAY(vect_addr, pl190_state, PL190_NUM_PRIO),
VMSTATE_UINT32_ARRAY(prio_mask, pl190_state, PL190_NUM_PRIO+1),