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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2008-07-21 19:52:54 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2008-07-21 19:52:54 +0000
commit51fec3cc7eb7a9c8e1be2f2bb971db303d17ea61 (patch)
tree292aa91fc9ced21ff6377e80d0942e29ba81e527 /hw/omap_i2c.c
parent74b9decc473177f16cb84b3504ad8169f13ec147 (diff)
Omap DPLL & APLL locking logic.
Reset I2C fifo on new transfers. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4919 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/omap_i2c.c')
-rw-r--r--hw/omap_i2c.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/omap_i2c.c b/hw/omap_i2c.c
index f3ccbf0549..127e69ca0a 100644
--- a/hw/omap_i2c.c
+++ b/hw/omap_i2c.c
@@ -395,6 +395,7 @@ static void omap_i2c_write(void *opaque, target_phys_addr_t addr,
(~value >> 9) & 1); /* TRX */
s->stat |= nack << 1; /* NACK */
s->control &= ~(1 << 0); /* STT */
+ s->fifo = 0;
if (nack)
s->control &= ~(1 << 1); /* STP */
else {