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authorAlexander Graf <agraf@suse.de>2010-12-08 12:05:37 +0100
committerBlue Swirl <blauwirbel@gmail.com>2010-12-11 15:24:25 +0000
commit2507c12ab026b2286b0a47035c629f3d568c96f4 (patch)
tree949765d6112d70536a3806eb822798a0e04577da /hw/etraxfs_dma.c
parentdd310534e3bf8045096654df41471fd7132887b2 (diff)
Add endianness as io mem parameter
As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/etraxfs_dma.c')
-rw-r--r--hw/etraxfs_dma.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/etraxfs_dma.c b/hw/etraxfs_dma.c
index 15c8ad3dc5..c205ec1b8f 100644
--- a/hw/etraxfs_dma.c
+++ b/hw/etraxfs_dma.c
@@ -750,7 +750,7 @@ void *etraxfs_dmac_init(target_phys_addr_t base, int nr_channels)
ctrl->nr_channels = nr_channels;
ctrl->channels = qemu_mallocz(sizeof ctrl->channels[0] * nr_channels);
- ctrl->map = cpu_register_io_memory(dma_read, dma_write, ctrl);
+ ctrl->map = cpu_register_io_memory(dma_read, dma_write, ctrl, DEVICE_NATIVE_ENDIAN);
cpu_register_physical_memory(base, nr_channels * 0x2000, ctrl->map);
return ctrl;
}