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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-17 17:14:51 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-17 17:14:51 +0000
commit87ecb68bdf8a3e40ef885ddbb7ca1797dca40ebf (patch)
treef8c5c8eb6e34a6d492a9638d62489e7569f8b046 /hw/arm-misc.h
parent257514ddce752fe0b4aeb4b7957bc5661eadbef8 (diff)
Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/arm-misc.h')
-rw-r--r--hw/arm-misc.h33
1 files changed, 33 insertions, 0 deletions
diff --git a/hw/arm-misc.h b/hw/arm-misc.h
new file mode 100644
index 0000000000..f8011182dd
--- /dev/null
+++ b/hw/arm-misc.h
@@ -0,0 +1,33 @@
+/*
+ * Misc ARM declarations
+ *
+ * Copyright (c) 2006 CodeSourcery.
+ * Written by Paul Brook
+ *
+ * This code is licenced under the LGPL.
+ *
+ */
+
+#ifndef ARM_MISC_H
+#define ARM_MISC_H 1
+
+/* The CPU is also modeled as an interrupt controller. */
+#define ARM_PIC_CPU_IRQ 0
+#define ARM_PIC_CPU_FIQ 1
+qemu_irq *arm_pic_init_cpu(CPUState *env);
+
+/* armv7m.c */
+qemu_irq *armv7m_init(int flash_size, int sram_size,
+ const char *kernel_filename, const char *cpu_model);
+
+/* arm_boot.c */
+
+void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
+ const char *kernel_cmdline, const char *initrd_filename,
+ int board_id, target_phys_addr_t loader_start);
+
+/* armv7m_nvic.c */
+qemu_irq *armv7m_nvic_init(CPUState *env);
+
+#endif /* !ARM_MISC_H */
+