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authorIgor Mammedov <imammedo@redhat.com>2019-12-09 14:09:02 +0100
committerMichael S. Tsirkin <mst@redhat.com>2020-01-22 00:23:07 -0500
commit3a61c8db9d25ff8ed08c5f96acecd63707187904 (patch)
tree1d97765781c7433b67fbdb5f46caafd118f4f30d /docs
parentae340aa3d2567694c48737939496c1e699cad7e2 (diff)
acpi: cpuhp: add CPHP_GET_CPU_ID_CMD command
Firmware can enumerate present at boot APs by broadcasting wakeup IPI, so that woken up secondary CPUs could register them-selves. However in CPU hotplug case, it would need to know architecture specific CPU IDs for possible and hotplugged CPUs so it could prepare environment for and wake hotplugged AP. Reuse and extend existing CPU hotplug interface to return architecture specific ID for currently selected CPU in 2 registers: - lower 32 bits in ACPI_CPU_CMD_DATA_OFFSET_RW - upper 32 bits in ACPI_CPU_CMD_DATA2_OFFSET_R On x86, firmware will use CPHP_GET_CPU_ID_CMD for fetching the APIC ID when handling hotplug SMI. Later, CPHP_GET_CPU_ID_CMD will be used on ARM to retrieve MPIDR, which serves the similar to APIC ID purpose. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1575896942-331151-10-git-send-email-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'docs')
-rw-r--r--docs/specs/acpi_cpu_hotplug.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/docs/specs/acpi_cpu_hotplug.txt b/docs/specs/acpi_cpu_hotplug.txt
index cb99cf3c8e..a8ce5e7402 100644
--- a/docs/specs/acpi_cpu_hotplug.txt
+++ b/docs/specs/acpi_cpu_hotplug.txt
@@ -47,6 +47,7 @@ read access:
[0x0-0x3] Command data 2: (DWORD access)
if value last stored in 'Command field':
0: reads as 0x0
+ 3: upper 32 bits of architecture specific CPU ID value
other values: reserved
[0x4] CPU device status fields: (1 byte access)
bits:
@@ -61,6 +62,8 @@ read access:
[0x8] Command data: (DWORD access)
contains 0 unless value last stored in 'Command field' is one of:
0: contains 'CPU selector' value of a CPU with pending event[s]
+ 3: lower 32 bits of architecture specific CPU ID value
+ (in x86 case: APIC ID)
write access:
offset: