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| author | Yongbok Kim <yongbok.kim@imgtec.com> | 2015-07-10 12:10:52 +0100 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2015-08-13 16:21:12 +0100 |
| commit | aff2bc6dc6d839caf6df0900437cc2cc9e180605 (patch) | |
| tree | 36c2a96d9ca4eb179a8d2256a1a071317b0e8470 /cpus.c | |
| parent | ca0e5d8b0d065a95d0f9042f71b2ace45b015596 (diff) | |
target-mips: update mips32r5-generic into P5600
As full specification of P5600 is available, mips32r5-generic should
be renamed to P5600 and corrected as its intention.
Correct PRid and detail of configuration.
Features which are not currently supported are described as FIXME.
Fix Config.MM bit location
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
[leon.alrae@imgtec.com: correct cache line sizes and LLAddr shift]
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'cpus.c')
0 files changed, 0 insertions, 0 deletions