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authorStefan Hajnoczi <stefanha@redhat.com>2022-11-12 09:17:06 -0500
committerStefan Hajnoczi <stefanha@redhat.com>2022-11-12 09:17:06 -0500
commit305f6f62d9d250a32cdf090ddcb7e3a5b26a342e (patch)
tree5ad108680b27b04c62bf0dc47776e06737007053
parent57bc6e40e82c0446a358ab01f9bbf0db0d9465e4 (diff)
parent46b21de238c643ea098f2dcffe493abd135f7d89 (diff)
Merge tag 'pull-la-20221112' of https://gitlab.com/rth7680/qemu into staging
Fix loongarch make check-tcg failure. # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmNu8aUdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV90jAgAsaB0nU7YGzJRYRmK # +QXtrQa5AmXf014X7OeOZyxdYCPCwri2rnCxc1eOKAIOeSbdFY54xjXXEV8qpej+ # ZiLbdvXFG519vJpZquEJm1wgk68NnKYy2wfeRuwBMcQD4E7yeE9y11IKtuN6vbcq # sh/Zxh43KwzyZ1wrVQl8DUxesTcE4RwVDJ+t2q+uYKcgmUVRQJJd9aXLkOKpOb1f # QU+6lJAGv293IbW5LUD8fIPNKVWqlVwDIsFVWhYYJFxvWfbL211NsJbX70RnKahr # vJ6olGORlShNJEiV++9QTrgGr1v76KkVECaKNtohkYL/BkfNxoy4yWxcC7I9zds+ # 6oH9vQ== # =7NI1 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 11 Nov 2022 20:06:45 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-la-20221112' of https://gitlab.com/rth7680/qemu: hw/loongarch: Fix loongarch fdt addr confict Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
-rw-r--r--hw/loongarch/virt.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 5e4c2790bf..5136940b0b 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -793,13 +793,13 @@ static void loongarch_init(MachineState *machine)
qemu_add_machine_init_done_notifier(&lams->machine_done);
fdt_add_pcie_node(lams);
/*
- * Since lowmem region starts from 0, FDT base address is located
- * at 2 MiB to avoid NULL pointer access.
- *
+ * Since lowmem region starts from 0 and Linux kernel legacy start address
+ * at 2 MiB, FDT base address is located at 1 MiB to avoid NULL pointer
+ * access. FDT size limit with 1 MiB.
* Put the FDT into the memory map as a ROM image: this will ensure
* the FDT is copied again upon reset, even if addr points into RAM.
*/
- fdt_base = 2 * MiB;
+ fdt_base = 1 * MiB;
qemu_fdt_dumpdtb(machine->fdt, lams->fdt_size);
rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, fdt_base);
}