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authorPeter Maydell <peter.maydell@linaro.org>2015-07-16 15:21:54 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-07-16 20:55:50 +0100
commit02cb1f9dc1ad6f55ce3f745c5bc957696c2f42e3 (patch)
treef777d6eb06dd2bd694813b60c59fa67c44c6a049
parent0e935c4785acbdea187f64720fc478dd55de7af8 (diff)
downloadqemu-arm-full-tz-enable.tar.gz
hw/arm/virt: Enable TZ extensions on the GIC if we are using themfull-tz-enable
If we're creating a board with support for TrustZone, then enable it on the GIC model as well as on the CPUs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/arm/virt.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 2bcf56530a..fdfa91b34c 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -361,7 +361,7 @@ static void create_v2m(VirtBoardInfo *vbi, qemu_irq *pic)
fdt_add_v2m_gic_node(vbi);
}
-static void create_gic(VirtBoardInfo *vbi, qemu_irq *pic)
+static void create_gic(VirtBoardInfo *vbi, qemu_irq *pic, bool secure)
{
/* We create a standalone GIC v2 */
DeviceState *gicdev;
@@ -380,6 +380,9 @@ static void create_gic(VirtBoardInfo *vbi, qemu_irq *pic)
* interrupts; there are always 32 of the former (mandated by GIC spec).
*/
qdev_prop_set_uint32(gicdev, "num-irq", NUM_IRQS + 32);
+ if (!kvm_irqchip_in_kernel()) {
+ qdev_prop_set_bit(gicdev, "has-security-extensions", secure);
+ }
qdev_init_nofail(gicdev);
gicbusdev = SYS_BUS_DEVICE(gicdev);
sysbus_mmio_map(gicbusdev, 0, vbi->memmap[VIRT_GIC_DIST].base);
@@ -884,7 +887,7 @@ static void machvirt_init(MachineState *machine)
create_flash(vbi);
- create_gic(vbi, pic);
+ create_gic(vbi, pic, vms->secure);
create_uart(vbi, pic);