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authorClaudio Fontana <claudio.fontana@linaro.org>2014-01-15 19:38:27 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-02-05 17:18:18 +0000
commite0ff56741ffdcc64b5bc5e83318e96171fba2ad4 (patch)
tree457027aea0087838f2b55b4ccc16e3f175334b70
parent3be4651e8188d1215548a1b095c92fb4dec70b38 (diff)
downloadqemu-arm-a64-vixl.tar.gz
disas: Implement disassembly output for A64a64-vixl
Use libvixl to implement disassembly output in debug logs for A64, for use with both AArch64 hosts and targets. Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org> [PMM: * added support for target disassembly * switched to custom QEMUDisassembler so the output format matches what QEMU expects * make sure we correctly fall back to "just print hex" if we didn't build the AArch64 disassembler because of lack of a C++ compiler * rename from 'aarch64' to 'arm-a64' because this is a disassembler for the A64 instruction set * merge aarch64.c and aarch64-cxx.cc into one C++ file * simplify the aarch64.c<->aarch64-cxx.cc interface] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rwxr-xr-xconfigure4
-rw-r--r--disas.c14
-rw-r--r--disas/Makefile.objs5
-rw-r--r--disas/arm-a64.cc87
-rw-r--r--disas/libvixl/Makefile.objs8
-rw-r--r--include/disas/bfd.h1
-rw-r--r--target-arm/translate-a64.c2
7 files changed, 118 insertions, 3 deletions
diff --git a/configure b/configure
index 236764a3bd..8f3cc204cd 100755
--- a/configure
+++ b/configure
@@ -4641,6 +4641,10 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
arm)
echo "CONFIG_ARM_DIS=y" >> $config_target_mak
echo "CONFIG_ARM_DIS=y" >> config-all-disas.mak
+ if test -n "${cxx}"; then
+ echo "CONFIG_ARM_A64_DIS=y" >> $config_target_mak
+ echo "CONFIG_ARM_A64_DIS=y" >> config-all-disas.mak
+ fi
;;
cris)
echo "CONFIG_CRIS_DIS=y" >> $config_target_mak
diff --git a/disas.c b/disas.c
index 0203ef2ef2..79e694483c 100644
--- a/disas.c
+++ b/disas.c
@@ -190,7 +190,7 @@ static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
/* Disassemble this for me please... (debugging). 'flags' has the following
values:
i386 - 1 means 16 bit code, 2 means 64 bit code
- arm - bit 0 = thumb, bit 1 = reverse endian
+ arm - bit 0 = thumb, bit 1 = reverse endian, bit 2 = A64
ppc - nonzero means little endian
other targets - unused
*/
@@ -225,7 +225,15 @@ void target_disas(FILE *out, CPUArchState *env, target_ulong code,
}
print_insn = print_insn_i386;
#elif defined(TARGET_ARM)
- if (flags & 1) {
+ if (flags & 4) {
+ /* We might not be compiled with the A64 disassembler
+ * because it needs a C++ compiler; in that case we will
+ * fall through to the default print_insn_od case.
+ */
+#if defined(CONFIG_ARM_A64_DIS)
+ print_insn = print_insn_arm_a64;
+#endif
+ } else if (flags & 1) {
print_insn = print_insn_thumb1;
} else {
print_insn = print_insn_arm;
@@ -356,6 +364,8 @@ void disas(FILE *out, void *code, unsigned long size)
#elif defined(_ARCH_PPC)
s.info.disassembler_options = (char *)"any";
print_insn = print_insn_ppc;
+#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
+ print_insn = print_insn_arm_a64;
#elif defined(__alpha__)
print_insn = print_insn_alpha;
#elif defined(__sparc__)
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index 3b1e77ace5..41c237424a 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -1,5 +1,10 @@
+
common-obj-$(CONFIG_ALPHA_DIS) += alpha.o
common-obj-$(CONFIG_ARM_DIS) += arm.o
+common-obj-$(CONFIG_ARM_A64_DIS) += arm-a64.o
+common-obj-$(CONFIG_ARM_A64_DIS) += libvixl/
+libvixldir = $(SRC_PATH)/disas/libvixl
+$(obj)/arm-a64.o: QEMU_CFLAGS += -I$(libvixldir)
common-obj-$(CONFIG_CRIS_DIS) += cris.o
common-obj-$(CONFIG_HPPA_DIS) += hppa.o
common-obj-$(CONFIG_I386_DIS) += i386.o
diff --git a/disas/arm-a64.cc b/disas/arm-a64.cc
new file mode 100644
index 0000000000..162be0c420
--- /dev/null
+++ b/disas/arm-a64.cc
@@ -0,0 +1,87 @@
+/*
+ * ARM A64 disassembly output wrapper to libvixl
+ * Copyright (c) 2013 Linaro Limited
+ * Written by Claudio Fontana
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "a64/disasm-a64.h"
+
+extern "C" {
+#include "disas/bfd.h"
+}
+
+using namespace vixl;
+
+static Decoder *vixl_decoder = NULL;
+static Disassembler *vixl_disasm = NULL;
+
+/* We don't use libvixl's PrintDisassembler because its output
+ * is a little unhelpful (trailing newlines, for example).
+ * Instead we use our own very similar variant so we have
+ * control over the format.
+ */
+class QEMUDisassembler : public Disassembler {
+public:
+ explicit QEMUDisassembler(FILE *stream) : stream_(stream) { }
+ ~QEMUDisassembler() { }
+
+protected:
+ void ProcessOutput(Instruction *instr) {
+ fprintf(stream_, "%08" PRIx32 " %s",
+ instr->InstructionBits(), GetOutput());
+ }
+
+private:
+ FILE *stream_;
+};
+
+static int vixl_is_initialized(void)
+{
+ return vixl_decoder != NULL;
+}
+
+static void vixl_init(FILE *f) {
+ vixl_decoder = new Decoder();
+ vixl_disasm = new QEMUDisassembler(f);
+ vixl_decoder->AppendVisitor(vixl_disasm);
+}
+
+#define INSN_SIZE 4
+
+/* Disassemble ARM A64 instruction. This is our only entry
+ * point from QEMU's C code.
+ */
+int print_insn_arm_a64(uint64_t addr, disassemble_info *info)
+{
+ uint8_t bytes[INSN_SIZE];
+ uint32_t instr;
+ int status;
+
+ status = info->read_memory_func(addr, bytes, INSN_SIZE, info);
+ if (status != 0) {
+ info->memory_error_func(status, addr, info);
+ return -1;
+ }
+
+ if (!vixl_is_initialized()) {
+ vixl_init(info->stream);
+ }
+
+ instr = bytes[0] | bytes[1] << 8 | bytes[2] << 16 | bytes[3] << 24;
+ vixl_decoder->Decode(reinterpret_cast<Instruction*>(&instr));
+
+ return INSN_SIZE;
+}
diff --git a/disas/libvixl/Makefile.objs b/disas/libvixl/Makefile.objs
new file mode 100644
index 0000000000..0adb3ced7b
--- /dev/null
+++ b/disas/libvixl/Makefile.objs
@@ -0,0 +1,8 @@
+libvixl_OBJS = utils.o \
+ a64/instructions-a64.o \
+ a64/decoder-a64.o \
+ a64/disasm-a64.o
+
+$(addprefix $(obj)/,$(libvixl_OBJS)): QEMU_CFLAGS += -I$(SRC_PATH)/disas/libvixl
+
+common-obj-$(CONFIG_ARM_A64_DIS) += $(libvixl_OBJS)
diff --git a/include/disas/bfd.h b/include/disas/bfd.h
index 803b6efe41..8bd703cb1a 100644
--- a/include/disas/bfd.h
+++ b/include/disas/bfd.h
@@ -379,6 +379,7 @@ int print_insn_h8300 (bfd_vma, disassemble_info*);
int print_insn_h8300h (bfd_vma, disassemble_info*);
int print_insn_h8300s (bfd_vma, disassemble_info*);
int print_insn_h8500 (bfd_vma, disassemble_info*);
+int print_insn_arm_a64 (bfd_vma, disassemble_info*);
int print_insn_alpha (bfd_vma, disassemble_info*);
disassembler_ftype arc_get_disassembler (int, int);
int print_insn_arm (bfd_vma, disassemble_info*);
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 6c1ec1edc6..ee768f2f86 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -7076,7 +7076,7 @@ done_generating:
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(env, pc_start, dc->pc - pc_start,
- dc->thumb | (dc->bswap_code << 1));
+ 4 | (dc->bswap_code << 1));
qemu_log("\n");
}
#endif