diff options
| author | nobody <> | 2006-03-03 15:57:44 +0000 |
|---|---|---|
| committer | nobody <> | 2006-03-03 15:57:44 +0000 |
| commit | e8bd8519472da5b8b0f01eb69cd576a11f2b0499 (patch) | |
| tree | 322d4e711470d2d260177a497e7dcd4db8bed3c4 | |
| parent | d6a7aba3e96f272f5dd271817e93dd437c51e26a (diff) | |
This commit was manufactured by cvs2svn to create branch 'gdb-csl-gdb-csl-available-20060303-branchpoint
available-20060303-branch'.
Sprout from gdb-csl-20060226-branch 2006-02-26 13:03:34 UTC nobody 'This commit was manufactured by cvs2svn to create branch 'gdb-'
Cherrypick from master 2006-03-03 15:57:43 UTC Nick Clifton <nickc@redhat.com> 'Fix parseing functions to return an error message if the parse failed':
ChangeLog
MAINTAINERS
bfd/ChangeLog
bfd/bfd-in2.h
bfd/cpu-avr.c
bfd/doc/ChangeLog
bfd/doc/Makefile.am
bfd/doc/Makefile.in
bfd/elf-eh-frame.c
bfd/elf-m10300.c
bfd/elf-vxworks.c
bfd/elf-vxworks.h
bfd/elf32-arm.c
bfd/elf32-avr.c
bfd/elf32-bfin.c
bfd/elf32-cris.c
bfd/elf32-hppa.c
bfd/elf32-i386.c
bfd/elf32-m32c.c
bfd/elf32-m32r.c
bfd/elf32-m68k.c
bfd/elf32-ppc.c
bfd/elf32-s390.c
bfd/elf32-sh.c
bfd/elf32-vax.c
bfd/elf32-xtensa.c
bfd/elf64-alpha.c
bfd/elf64-s390.c
bfd/elf64-sh64.c
bfd/elf64-x86-64.c
bfd/elfxx-ia64.c
bfd/elfxx-mips.c
bfd/elfxx-sparc.c
bfd/libbfd.h
bfd/po/Make-in
bfd/reloc.c
bfd/version.h
cpu/ChangeLog
cpu/xc16x.cpu
cpu/xc16x.opc
etc/ChangeLog
etc/Makefile.in
etc/configure.texi
etc/standards.texi
gdb/ChangeLog
gdb/Makefile.in
gdb/config/pa/hppa64.mt
gdb/config/sparc/linux.mt
gdb/config/sparc/linux64.mt
gdb/f-typeprint.c
gdb/gdbserver/ChangeLog
gdb/gdbserver/remote-utils.c
gdb/gdbtypes.c
gdb/hppa-hpux-tdep.c
gdb/hppa-tdep.c
gdb/hppa-tdep.h
gdb/mipsnbsd-tdep.c
gdb/mn10300-linux-tdep.c
gdb/mn10300-tdep.c
gdb/ppc-linux-nat.c
gdb/solib-legacy.c
gdb/solib-svr4.c
gdb/solib-svr4.h
gdb/somread.c
gdb/testsuite/ChangeLog
gdb/testsuite/gdb.base/prelink-lib.c
gdb/testsuite/gdb.base/prelink.c
gdb/testsuite/gdb.base/prelink.exp
gdb/testsuite/gdb.cp/inherit.exp
gdb/version.in
include/elf/ChangeLog
include/elf/avr.h
include/elf/dwarf2.h
include/opcode/ChangeLog
include/opcode/i386.h
ltmain.sh
opcodes/ChangeLog
opcodes/i386-dis.c
opcodes/po/Make-in
opcodes/xc16x-asm.c
opcodes/xc16x-dis.c
Delete:
gdb/config/pa/tm-hppa64.h
82 files changed, 3048 insertions, 3700 deletions
@@ -1,3 +1,8 @@ +2006-03-01 H.J. Lu <hongjiu.lu@intel.com> + + PR libgcj/17311 + * ltmain.sh: Don't use "$finalize_rpath" for compile. + 2006-02-20 Paolo Bonzini <bonzini@gnu.org> PR bootstrap/25670 diff --git a/MAINTAINERS b/MAINTAINERS index 519bafdbd9..b2077e7c26 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5,7 +5,11 @@ COPYING, COPYING.LIB, README http://gnu.org. Makefile.*; configure; configure.in; src-release - Please notify the following of any committed patches. + Any global maintainer can approve changes to these + files, but they should be aware that they need to + be kept in sync with their counterparts in the GCC + repository. Also please notify the following of + any committed patches: binutils@sources.redhat.com gdb-patches@sources.redhat.com @@ -94,9 +98,17 @@ winsup/ General discussion cygwin@sources.redhat.com. See also winsup/MAINTAINERS. -config-ml.in; setup.com; missing; makefile.vms; utils/; config/; -makefile.vms; missing; ylwrap; mkdep; etc/; install-sh; intl/ - Ask DJ Delorie <dj@redhat.com> after reading the libiberty entry. +config-ml.in; makefile.vms; mkdep; setup.com; +etc/; intl/; utils/; + Any global maintainer can approve changes to these + files and directories. + +compile; depcomp; install-sh; missing; ylwrap; +config/ + Any global maintainer can approve changes to these + files and directories, but they should be aware + that they need to be kept in sync with their + counterparts in the GCC repository. modules file Obviously changes to this file should not go through diff --git a/bfd/ChangeLog b/bfd/ChangeLog index f7cbecbd10..e52fdfb7b7 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,129 @@ +2006-03-03 Nick Clifton <nickc@redhat.com> + + * cpu-avr.c: Update to ISO-C90 formatting. + * elf32-avr.c: Likewise. + +2006-03-03 Bjoern Haase <bjoern.m.haase@web.de> + + * elf32-avr.c (avr_reloc_map): Insert BFD_RELOC_AVR_MS8_LDI + and R_AVR_MS8_LDI + (bfd_elf_avr_final_write_processing): Set + EF_AVR_LINKRELAX_PREPARED in e_flags field. + (elf32_avr_relax_section): New function. + (elf32_avr_relax_delete_bytes): New function. + (elf32_avr_get_relocated_section_contents): New function. + (avr_pc_wrap_around): New function. + (avr_relative_distance_considering_wrap_around): New function. + (avr_final_link_relocate): Handle negative int8t_t immediate for R_AVR_LDI. + * reloc.c: Add BFD_RELOC_AVR_MS8_LDI and BFD_RELOC_AVR_LDI_NEG + * libbfd.h: Regenerate. + * bfd-in2.h: Regenerate. + +2006-03-02 DJ Delorie <dj@redhat.com> + + * elf32-m32c.c (m32c_offset_for_reloc): Fix local symbol + calculations. + +2006-03-02 Richard Sandiford <richard@codesourcery.com> + + * elf32-ppc.c (is_ppc_elf_target): Return true if the target is + bfd_elf32_powerpc_vxworks_vec. + +2006-03-02 Nick Clifton <nickc@redhat.com> + + * elf32-m32c.c (m32c_elf_relax_section): Initialise 'gap'. + +2006-03-02 Richard Sandiford <richard@codesourcery.com> + + * elf32-i386.c (elf_i386_create_dynamic_sections): Use + elf_vxworks_create_dynamic_sections. + (elf_i386_size_dynamic_sections): Remove VxWorks GOT and PLT + symbol handling. + * elf32-ppc.c (ppc_elf_create_dynamic_sections): Use + elf_vxworks_create_dynamic_sections. + (ppc_elf_size_dynamic_sections): Remove VxWorks GOT and PLT + symbol handling. + * elf-vxworks.c (elf_vxworks_create_dynamic_sections): New function. + * elf-vxworks.h (elf_vxworks_create_dynamic_sections): Declare. + +2006-03-02 Richard Sandiford <richard@codesourcery.com> + + * elf32-i386.c (elf_i386_vxworks_link_output_symbol_hook): Delete. + (elf_backend_link_output_symbol_hook): Use + elf_vxworks_link_output_symbol_hook instead. + * elf32-ppc.c (elf_i386_vxworks_link_output_symbol_hook): Delete. + (elf_backend_link_output_symbol_hook): Use + elf_vxworks_link_output_symbol_hook instead. + * elf-vxworks.c (elf_vxworks_link_output_symbol_hook): Provide the + same interface as elf_backend_link_output_symbol_hook. + * elf-vxworks.h (elf_vxworks_link_output_symbol_hook): Update + prototype accordingly. + +2006-03-02 Richard Sandiford <richard@codesourcery.com> + + * elf32-ppc.c (ppc_elf_plt_type): New enumeration. + (ppc_elf_link_hash_table): Replace old_got and new_got with + plt_type and can_use_new_plt. + (ppc_elf_create_dynamic_sections): Add SEC_HAS_CONTENTS, + SEC_LOAD and SEC_READONLY to the VxWorks .plt flags. + (ppc_elf_check_relocs): Set can_use_new_plt instead of new_plt. + Move from plt_type == PLT_UNSET to PLT_OLD instead of setting old_plt. + (ppc_elf_select_plt_layout): Move from plt_type == PLT_UNSET to + either plt_type == PLT_OLD or plt_type == PLT_NEW. Assert that + this function should not be called for VxWorks targets. + (ppc_elf_tls_setup): Use plt_type instead of old_got. + (allocate_got): Likewise. Rearrange so that max_before_header + is only used for PLT_OLD and PLT_NEW. + (allocate_dynrelocs): Use plt_type instead of old_got and is_vxworks. + (ppc_elf_size_dynamic_sections): Likewise. + (ppc_elf_relax_section): Likewise. + (ppc_elf_relocate_section): Likewise. + (ppc_elf_finish_dynamic_symbol): Likewise. + (ppc_elf_vxworks_link_hash_table_create): Initialize plt_type. + +2006-02-28 Richard Sandiford <richard@codesourcery.com> + + * elf32-i386.c (elf_i386_link_hash_table): Add next_tls_desc_index. + (elf_i386_link_hash_table_create): Initialize it. + (elf_i386_compute_jump_table_size): Use it instead of + srelplt->reloc_count. + (allocate_dynrelocs): Likewise. + (elf_i386_size_dynamic_sections): Likewise. + (elf_i386_relocate_section): Likewise. + +2006-02-27 Jakub Jelinek <jakub@redhat.com> + + * elf-eh-frame.c (_bfd_elf_discard_section_eh_frame): Handle S flag. + (_bfd_elf_write_section_eh_frame): Likewise. + +2006-02-27 Carlos O'Donell <carlos@codesourcery.com> + + * po/Make-in: Add html target. + +2006-02-27 Richard Sandiford <richard@codesourcery.com> + + * elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_symbol): Use the + cached hgot entry to check for _GLOBAL_OFFSET_TABLE_. + * elf32-arm.c (elf32_arm_finish_dynamic_symbol): Likewise. + * elf32-bfin.c (bfin_finish_dynamic_symbol): Likewise. + * elf32-cris.c (elf_cris_finish_dynamic_symbol): Likewise. + * elf32-hppa.c (elf32_hppa_finish_dynamic_symbol): Likewise. + * elf32-i386.c (elf_i386_finish_dynamic_symbol): Likewise. + * elf32-m32r.c (m32r_elf_finish_dynamic_symbol): Likewise. + * elf32-m68k.c (elf_m68k_finish_dynamic_symbol): Likewise. + * elf32-sh.c (sh_elf_finish_dynamic_symbol): Likewise. + * elf32-vax.c (elf_vax_finish_dynamic_symbol): Likewise. + * elf32-xtensa.c (elf_xtensa_finish_dynamic_symbol): Likewise. + * elf64-sh64.c (sh64_elf64_finish_dynamic_symbol): Likewise. + * elf64-x86-64.c (elf64_x86_64_finish_dynamic_symbol): Likewise. + * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_symbol): Likewise. + * elf32-s390.c (elf_s390_finish_dynamic_symbol): Likewise. Also use + the cached hplt entry to check for _PROCEDURE_LINKAGE_TABLE_. + * elf64-alpha.c (elf64_alpha_finish_dynamic_symbol): Likewise. + * elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise. + * elfxx-ia64.c (elfNN_ia64_finish_dynamic_symbol): Likewise. + * elfxx-sparc.c (_bfd_sparc_elf_finish_dynamic_symbol): Likewise. + 2006-02-25 Richard Sandiford <richard@codesourcery.com> * elf-bfd.h (elf_link_hash_table): Add hplt field. diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 195e8a005f..cc9eb24344 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -8,7 +8,8 @@ /* Main header file for the bfd library -- portable access to object files. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. Contributed by Cygnus Support. @@ -3483,6 +3484,10 @@ of data memory address) into 8 bit immediate value of LDI insn. */ of program memory address) into 8 bit immediate value of LDI insn. */ BFD_RELOC_AVR_HH8_LDI, +/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit +of 32 bit value) into 8 bit immediate value of LDI insn. */ + BFD_RELOC_AVR_MS8_LDI, + /* This is a 16 bit reloc for the AVR that stores negated 8 bit value (usually data memory address) into 8 bit immediate value of SUBI insn. */ BFD_RELOC_AVR_LO8_LDI_NEG, @@ -3497,6 +3502,10 @@ SUBI insn. */ of LDI or SUBI insn. */ BFD_RELOC_AVR_HH8_LDI_NEG, +/* This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb +of 32 bit value) into 8 bit immediate value of LDI insn. */ + BFD_RELOC_AVR_MS8_LDI_NEG, + /* This is a 16 bit reloc for the AVR that stores 8 bit value (usually command address) into 8 bit immediate value of LDI insn. */ BFD_RELOC_AVR_LO8_LDI_PM, diff --git a/bfd/cpu-avr.c b/bfd/cpu-avr.c index 70c04d641d..4c8c193f61 100644 --- a/bfd/cpu-avr.c +++ b/bfd/cpu-avr.c @@ -1,75 +1,34 @@ /* BFD library support routines for the AVR architecture. - Copyright 1999, 2000, 2002 Free Software Foundation, Inc. + Copyright 1999, 2000, 2002, 2006 Free Software Foundation, Inc. Contributed by Denis Chertykov <denisc@overta.ru> -This file is part of BFD, the Binary File Descriptor library. + This file is part of BFD, the Binary File Descriptor library. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ #include "bfd.h" #include "sysdep.h" #include "libbfd.h" -static const bfd_arch_info_type *compatible - PARAMS ((const bfd_arch_info_type *, const bfd_arch_info_type *)); - -#define N(addr_bits, machine, print, default, next) \ -{ \ - 8, /* 8 bits in a word */ \ - addr_bits, /* bits in an address */ \ - 8, /* 8 bits in a byte */ \ - bfd_arch_avr, \ - machine, /* machine */ \ - "avr", /* arch_name */ \ - print, /* printable name */ \ - 1, /* section align power */ \ - default, /* the default machine */ \ - compatible, \ - bfd_default_scan, \ - next \ -} - -static const bfd_arch_info_type arch_info_struct[] = -{ - /* AT90S1200, ATtiny1x, ATtiny28 */ - N (16, bfd_mach_avr1, "avr:1", FALSE, & arch_info_struct[1]), - - /* AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22 */ - N (16, bfd_mach_avr2, "avr:2", FALSE, & arch_info_struct[2]), - - /* ATmega103, ATmega603 */ - N (22, bfd_mach_avr3, "avr:3", FALSE, & arch_info_struct[3]), - - /* ATmega83, ATmega85 */ - N (16, bfd_mach_avr4, "avr:4", FALSE, & arch_info_struct[4]), - - /* ATmega161, ATmega163, ATmega32, AT94K */ - N (22, bfd_mach_avr5, "avr:5", FALSE, NULL) -}; - -const bfd_arch_info_type bfd_avr_arch = - N (16, bfd_mach_avr2, "avr", TRUE, & arch_info_struct[0]); - /* This routine is provided two arch_infos and works out which AVR machine which would be compatible with both and returns a pointer to its info structure. */ static const bfd_arch_info_type * -compatible (a,b) - const bfd_arch_info_type * a; - const bfd_arch_info_type * b; +compatible (const bfd_arch_info_type * a, + const bfd_arch_info_type * b) { /* If a & b are for different architectures we can do nothing. */ if (a->arch != b->arch) @@ -91,3 +50,40 @@ compatible (a,b) /* Never reached! */ return NULL; } + +#define N(addr_bits, machine, print, default, next) \ +{ \ + 8, /* 8 bits in a word. */ \ + addr_bits, /* bits in an address. */ \ + 8, /* 8 bits in a byte. */ \ + bfd_arch_avr, \ + machine, /* Machine number. */ \ + "avr", /* Architecture name. */ \ + print, /* Printable name. */ \ + 1, /* Section align power. */ \ + default, /* Is this the default ? */ \ + compatible, \ + bfd_default_scan, \ + next \ +} + +static const bfd_arch_info_type arch_info_struct[] = +{ + /* AT90S1200, ATtiny1x, ATtiny28. */ + N (16, bfd_mach_avr1, "avr:1", FALSE, & arch_info_struct[1]), + + /* AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22. */ + N (16, bfd_mach_avr2, "avr:2", FALSE, & arch_info_struct[2]), + + /* ATmega103, ATmega603. */ + N (22, bfd_mach_avr3, "avr:3", FALSE, & arch_info_struct[3]), + + /* ATmega83, ATmega85. */ + N (16, bfd_mach_avr4, "avr:4", FALSE, & arch_info_struct[4]), + + /* ATmega161, ATmega163, ATmega32, AT94K. */ + N (22, bfd_mach_avr5, "avr:5", FALSE, NULL) +}; + +const bfd_arch_info_type bfd_avr_arch = + N (16, bfd_mach_avr2, "avr", TRUE, & arch_info_struct[0]); diff --git a/bfd/doc/ChangeLog b/bfd/doc/ChangeLog index ba2ddb9cf2..dd9b8b0cdd 100644 --- a/bfd/doc/ChangeLog +++ b/bfd/doc/ChangeLog @@ -1,3 +1,8 @@ +2006-02-27 Carlos O'Donell <carlos@codesourcery.com + + * Makefile.am: Add html target. + * Makefile.in: Regenerate. + 2005-07-24 Daniel Jacobowitz <dan@codesourcery.com> * chew.c: Include <string.h>. diff --git a/bfd/doc/Makefile.am b/bfd/doc/Makefile.am index 2a7f792b02..7bee26d6c2 100644 --- a/bfd/doc/Makefile.am +++ b/bfd/doc/Makefile.am @@ -68,7 +68,7 @@ chew.o: chew.c protos: libbfd.h libcoff.h bfd.h -$(srcdir)/bfd.info bfd.dvi: $(DOCFILES) bfdsumm.texi bfd.texinfo +$(srcdir)/bfd.info bfd.dvi bfd.html: $(DOCFILES) bfdsumm.texi bfd.texinfo # We can't replace these rules with an implicit rule, because # makes without VPATH support couldn't find the .h files in `..'. diff --git a/bfd/doc/Makefile.in b/bfd/doc/Makefile.in index e410ac1a89..fa92e70752 100644 --- a/bfd/doc/Makefile.in +++ b/bfd/doc/Makefile.in @@ -596,7 +596,7 @@ chew.o: chew.c protos: libbfd.h libcoff.h bfd.h -$(srcdir)/bfd.info bfd.dvi: $(DOCFILES) bfdsumm.texi bfd.texinfo +$(srcdir)/bfd.info bfd.dvi bfd.html: $(DOCFILES) bfdsumm.texi bfd.texinfo # We can't replace these rules with an implicit rule, because # makes without VPATH support couldn't find the .h files in `..'. diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c index d5041d01ba..ab0b995c0c 100644 --- a/bfd/elf-eh-frame.c +++ b/bfd/elf-eh-frame.c @@ -1,5 +1,5 @@ /* .eh_frame section optimization. - Copyright 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + Copyright 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. Written by Jakub Jelinek <jakub@redhat.com>. This file is part of BFD, the Binary File Descriptor library. @@ -613,6 +613,8 @@ _bfd_elf_discard_section_eh_frame ENSURE_NO_RELOCS (buf); REQUIRE (get_DW_EH_PE_width (cie.fde_encoding, ptr_size)); break; + case 'S': + break; case 'P': { int per_width; @@ -1178,6 +1180,8 @@ _bfd_elf_write_section_eh_frame (bfd *abfd, } buf++; break; + case 'S': + break; default: BFD_FAIL (); } diff --git a/bfd/elf-m10300.c b/bfd/elf-m10300.c index 5b14e927f8..81c5db026e 100644 --- a/bfd/elf-m10300.c +++ b/bfd/elf-m10300.c @@ -4502,7 +4502,7 @@ _bfd_mn10300_elf_finish_dynamic_symbol (output_bfd, info, h, sym) /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + || h == elf_hash_table (info)->hgot) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elf-vxworks.c b/bfd/elf-vxworks.c index 708177a2ee..90e620a905 100644 --- a/bfd/elf-vxworks.c +++ b/bfd/elf-vxworks.c @@ -55,12 +55,72 @@ elf_vxworks_add_symbol_hook (bfd *abfd ATTRIBUTE_UNUSED, return TRUE; } +/* Perform VxWorks-specific handling of the create_dynamic_sections hook. + When creating an executable, set *SRELPLT2_OUT to the .rel(a).plt.unloaded + section. */ + +bfd_boolean +elf_vxworks_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info, + asection **srelplt2_out) +{ + struct elf_link_hash_table *htab; + const struct elf_backend_data *bed; + asection *s; + + htab = elf_hash_table (info); + bed = get_elf_backend_data (dynobj); + + if (!info->shared) + { + s = bfd_make_section_with_flags (dynobj, + bed->default_use_rela_p + ? ".rela.plt.unloaded" + : ".rel.plt.unloaded", + SEC_HAS_CONTENTS | SEC_IN_MEMORY + | SEC_READONLY | SEC_LINKER_CREATED); + if (s == NULL + || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align)) + return FALSE; + + *srelplt2_out = s; + } + + /* Mark the GOT and PLT symbols as having relocations; they might + not, but we won't know for sure until we build the GOT in + finish_dynamic_symbol. Also make sure that the GOT symbol + is entered into the dynamic symbol table; the loader uses it + to initialize __GOTT_BASE__[__GOTT_INDEX__]. */ + if (htab->hgot) + { + htab->hgot->indx = -2; + htab->hgot->other &= ~ELF_ST_VISIBILITY (-1); + htab->hgot->forced_local = 0; + if (!bfd_elf_link_record_dynamic_symbol (info, htab->hgot)) + return FALSE; + } + if (htab->hplt) + { + htab->hplt->indx = -2; + htab->hplt->type = STT_FUNC; + } + + return TRUE; +} /* Tweak magic VxWorks symbols as they are written to the output file. */ bfd_boolean -elf_vxworks_link_output_symbol_hook (const char *name, - Elf_Internal_Sym *sym) +elf_vxworks_link_output_symbol_hook (struct bfd_link_info *info + ATTRIBUTE_UNUSED, + const char *name, + Elf_Internal_Sym *sym, + asection *input_sec ATTRIBUTE_UNUSED, + struct elf_link_hash_entry *h + ATTRIBUTE_UNUSED) { + /* Ignore the first dummy symbol. */ + if (!name) + return TRUE; + /* Reverse the effects of the hack in elf_vxworks_add_symbol_hook. */ if (strcmp (name, "__GOTT_INDEX__") == 0 || strcmp (name, "__GOTT_BASE__") == 0) diff --git a/bfd/elf-vxworks.h b/bfd/elf-vxworks.h index 0ac422e95a..c8ea0094ee 100644 --- a/bfd/elf-vxworks.h +++ b/bfd/elf-vxworks.h @@ -25,8 +25,11 @@ bfd_boolean elf_vxworks_add_symbol_hook (bfd *, struct bfd_link_info *, Elf_Internal_Sym *, const char **, flagword *, asection **, bfd_vma *); bfd_boolean elf_vxworks_link_output_symbol_hook - (const char *, Elf_Internal_Sym *); + (struct bfd_link_info *, const char *name, Elf_Internal_Sym *, + asection *, struct elf_link_hash_entry *); bfd_boolean elf_vxworks_emit_relocs (bfd *, asection *, Elf_Internal_Shdr *, Elf_Internal_Rela *, struct elf_link_hash_entry **); void elf_vxworks_final_write_processing (bfd *, bfd_boolean); +bfd_boolean elf_vxworks_create_dynamic_sections + (bfd *, struct bfd_link_info *, asection **); diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c index f9887168e0..ef19e6efb0 100644 --- a/bfd/elf32-arm.c +++ b/bfd/elf32-arm.c @@ -6866,7 +6866,7 @@ elf32_arm_finish_dynamic_symbol (bfd * output_bfd, struct bfd_link_info * info, /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + || h == htab->root.hgot) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elf32-avr.c b/bfd/elf32-avr.c index 11b5d4f726..ec42bb335d 100644 --- a/bfd/elf32-avr.c +++ b/bfd/elf32-avr.c @@ -1,5 +1,5 @@ /* AVR-specific support for 32-bit ELF - Copyright 1999, 2000, 2001, 2002, 2003, 2004 + Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2006 Free Software Foundation, Inc. Contributed by Denis Chertykov <denisc@overta.ru> @@ -17,7 +17,8 @@ You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ + Foundation, Inc., 51 Franklin Street - Fifth Floor, + Boston, MA 02110-1301, USA. */ #include "bfd.h" #include "sysdep.h" @@ -25,28 +26,6 @@ #include "elf-bfd.h" #include "elf/avr.h" -static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup - PARAMS ((bfd *abfd, bfd_reloc_code_real_type code)); -static void avr_info_to_howto_rela - PARAMS ((bfd *, arelent *, Elf_Internal_Rela *)); -static asection *elf32_avr_gc_mark_hook - PARAMS ((asection *, struct bfd_link_info *, Elf_Internal_Rela *, - struct elf_link_hash_entry *, Elf_Internal_Sym *)); -static bfd_boolean elf32_avr_gc_sweep_hook - PARAMS ((bfd *, struct bfd_link_info *, asection *, - const Elf_Internal_Rela *)); -static bfd_boolean elf32_avr_check_relocs - PARAMS ((bfd *, struct bfd_link_info *, asection *, - const Elf_Internal_Rela *)); -static bfd_reloc_status_type avr_final_link_relocate - PARAMS ((reloc_howto_type *, bfd *, asection *, bfd_byte *, - Elf_Internal_Rela *, bfd_vma)); -static bfd_boolean elf32_avr_relocate_section - PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, - Elf_Internal_Rela *, Elf_Internal_Sym *, asection **)); -static void bfd_elf_avr_final_write_processing PARAMS ((bfd *, bfd_boolean)); -static bfd_boolean elf32_avr_object_p PARAMS ((bfd *)); - static reloc_howto_type elf_avr_howto_table[] = { HOWTO (R_AVR_NONE, /* type */ @@ -167,7 +146,8 @@ static reloc_howto_type elf_avr_howto_table[] = 0xffff, /* dst_mask */ FALSE), /* pcrel_offset */ /* A high 6 bit absolute relocation of 22 bit address. - For LDI command. */ + For LDI command. As well second most significant 8 bit value of + a 32 bit link-time constant. */ HOWTO (R_AVR_HH8_LDI, /* type */ 16, /* rightshift */ 1, /* size (0 = byte, 1 = short, 2 = long) */ @@ -196,7 +176,7 @@ static reloc_howto_type elf_avr_howto_table[] = 0xffff, /* src_mask */ 0xffff, /* dst_mask */ FALSE), /* pcrel_offset */ - /* A hegative high 8 bit absolute relocation of 16 bit address. + /* A negative high 8 bit absolute relocation of 16 bit address. For LDI command. */ HOWTO (R_AVR_HI8_LDI_NEG, /* type */ 8, /* rightshift */ @@ -211,7 +191,7 @@ static reloc_howto_type elf_avr_howto_table[] = 0xffff, /* src_mask */ 0xffff, /* dst_mask */ FALSE), /* pcrel_offset */ - /* A hegative high 6 bit absolute relocation of 22 bit address. + /* A negative high 6 bit absolute relocation of 22 bit address. For LDI command. */ HOWTO (R_AVR_HH8_LDI_NEG, /* type */ 16, /* rightshift */ @@ -374,7 +354,35 @@ static reloc_howto_type elf_avr_howto_table[] = FALSE, /* partial_inplace */ 0xffff, /* src_mask */ 0xffff, /* dst_mask */ - FALSE) /* pcrel_offset */ + FALSE), /* pcrel_offset */ + /* Most significant 8 bit value of a 32 bit link-time constant. */ + HOWTO (R_AVR_MS8_LDI, /* type */ + 24, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 8, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_AVR_MS8_LDI", /* name */ + FALSE, /* partial_inplace */ + 0xffff, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE), /* pcrel_offset */ + /* Negative most significant 8 bit value of a 32 bit link-time constant. */ + HOWTO (R_AVR_MS8_LDI_NEG, /* type */ + 24, /* rightshift */ + 1, /* size (0 = byte, 1 = short, 2 = long) */ + 8, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_AVR_MS8_LDI_NEG", /* name */ + FALSE, /* partial_inplace */ + 0xffff, /* src_mask */ + 0xffff, /* dst_mask */ + FALSE) /* pcrel_offset */ }; /* Map BFD reloc types to AVR ELF reloc types. */ @@ -396,9 +404,11 @@ struct avr_reloc_map { BFD_RELOC_AVR_LO8_LDI, R_AVR_LO8_LDI}, { BFD_RELOC_AVR_HI8_LDI, R_AVR_HI8_LDI }, { BFD_RELOC_AVR_HH8_LDI, R_AVR_HH8_LDI }, + { BFD_RELOC_AVR_MS8_LDI, R_AVR_MS8_LDI }, { BFD_RELOC_AVR_LO8_LDI_NEG, R_AVR_LO8_LDI_NEG }, { BFD_RELOC_AVR_HI8_LDI_NEG, R_AVR_HI8_LDI_NEG }, { BFD_RELOC_AVR_HH8_LDI_NEG, R_AVR_HH8_LDI_NEG }, + { BFD_RELOC_AVR_MS8_LDI_NEG, R_AVR_MS8_LDI_NEG }, { BFD_RELOC_AVR_LO8_LDI_PM, R_AVR_LO8_LDI_PM }, { BFD_RELOC_AVR_HI8_LDI_PM, R_AVR_HI8_LDI_PM }, { BFD_RELOC_AVR_HH8_LDI_PM, R_AVR_HH8_LDI_PM }, @@ -411,10 +421,34 @@ struct avr_reloc_map { BFD_RELOC_AVR_6_ADIW, R_AVR_6_ADIW } }; +/* Meant to be filled one day with the wrap around address for the + specific device. I.e. should get the value 0x4000 for 16k devices, + 0x8000 for 32k devices and so on. + + We initialize it here with a value of 0x1000000 resulting in + that we will never suggest a wrap-around jump during relaxation. + The logic of the source code later on assumes that in + avr_pc_wrap_around one single bit is set. */ + +unsigned int avr_pc_wrap_around = 0x10000000; + +/* Calculates the effective distance of a pc relative jump/call. */ +static int +avr_relative_distance_considering_wrap_around (unsigned int distance) +{ + unsigned int wrap_around_mask = avr_pc_wrap_around - 1; + int dist_with_wrap_around = distance & wrap_around_mask; + + if (dist_with_wrap_around > ((int) (avr_pc_wrap_around >> 1))) + dist_with_wrap_around -= avr_pc_wrap_around; + + return dist_with_wrap_around; +} + + static reloc_howto_type * -bfd_elf32_bfd_reloc_type_lookup (abfd, code) - bfd *abfd ATTRIBUTE_UNUSED; - bfd_reloc_code_real_type code; +bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, + bfd_reloc_code_real_type code) { unsigned int i; @@ -432,10 +466,9 @@ bfd_elf32_bfd_reloc_type_lookup (abfd, code) /* Set the howto pointer for an AVR ELF reloc. */ static void -avr_info_to_howto_rela (abfd, cache_ptr, dst) - bfd *abfd ATTRIBUTE_UNUSED; - arelent *cache_ptr; - Elf_Internal_Rela *dst; +avr_info_to_howto_rela (bfd *abfd ATTRIBUTE_UNUSED, + arelent *cache_ptr, + Elf_Internal_Rela *dst) { unsigned int r_type; @@ -445,12 +478,11 @@ avr_info_to_howto_rela (abfd, cache_ptr, dst) } static asection * -elf32_avr_gc_mark_hook (sec, info, rel, h, sym) - asection *sec; - struct bfd_link_info *info ATTRIBUTE_UNUSED; - Elf_Internal_Rela *rel; - struct elf_link_hash_entry *h; - Elf_Internal_Sym *sym; +elf32_avr_gc_mark_hook (asection *sec, + struct bfd_link_info *info ATTRIBUTE_UNUSED, + Elf_Internal_Rela *rel, + struct elf_link_hash_entry *h, + Elf_Internal_Sym *sym) { if (h != NULL) { @@ -478,11 +510,10 @@ elf32_avr_gc_mark_hook (sec, info, rel, h, sym) } static bfd_boolean -elf32_avr_gc_sweep_hook (abfd, info, sec, relocs) - bfd *abfd ATTRIBUTE_UNUSED; - struct bfd_link_info *info ATTRIBUTE_UNUSED; - asection *sec ATTRIBUTE_UNUSED; - const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED; +elf32_avr_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED, + struct bfd_link_info *info ATTRIBUTE_UNUSED, + asection *sec ATTRIBUTE_UNUSED, + const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED) { /* We don't use got and plt entries for avr. */ return TRUE; @@ -493,11 +524,10 @@ elf32_avr_gc_sweep_hook (abfd, info, sec, relocs) virtual table relocs for gc. */ static bfd_boolean -elf32_avr_check_relocs (abfd, info, sec, relocs) - bfd *abfd; - struct bfd_link_info *info; - asection *sec; - const Elf_Internal_Rela *relocs; +elf32_avr_check_relocs (bfd *abfd, + struct bfd_link_info *info, + asection *sec, + const Elf_Internal_Rela *relocs) { Elf_Internal_Shdr *symtab_hdr; struct elf_link_hash_entry **sym_hashes, **sym_hashes_end; @@ -509,7 +539,7 @@ elf32_avr_check_relocs (abfd, info, sec, relocs) symtab_hdr = &elf_tdata (abfd)->symtab_hdr; sym_hashes = elf_sym_hashes (abfd); - sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym); + sym_hashes_end = sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym); if (!elf_bad_symtab (abfd)) sym_hashes_end -= symtab_hdr->sh_info; @@ -538,14 +568,12 @@ elf32_avr_check_relocs (abfd, info, sec, relocs) routines, but a few relocs, we have to do them ourselves. */ static bfd_reloc_status_type -avr_final_link_relocate (howto, input_bfd, input_section, - contents, rel, relocation) - reloc_howto_type * howto; - bfd * input_bfd; - asection * input_section; - bfd_byte * contents; - Elf_Internal_Rela * rel; - bfd_vma relocation; +avr_final_link_relocate (reloc_howto_type * howto, + bfd * input_bfd, + asection * input_section, + bfd_byte * contents, + Elf_Internal_Rela * rel, + bfd_vma relocation) { bfd_reloc_status_type r = bfd_reloc_ok; bfd_vma x; @@ -583,13 +611,17 @@ avr_final_link_relocate (howto, input_bfd, input_section, if (srel & 1) return bfd_reloc_outofrange; + srel = avr_relative_distance_considering_wrap_around (srel); + /* AVR addresses commands as words. */ srel >>= 1; /* Check for overflow. */ if (srel < -2048 || srel > 2047) { - /* Apply WRAPAROUND if possible. */ + /* Relative distance is too large. */ + + /* Always apply WRAPAROUND for avr2 and avr4. */ switch (bfd_get_mach (input_bfd)) { case bfd_mach_avr2: @@ -617,9 +649,11 @@ avr_final_link_relocate (howto, input_bfd, input_section, case R_AVR_LDI: contents += rel->r_offset; srel = (bfd_signed_vma) relocation + rel->r_addend; - if ((srel & 0xffff) > 255) - /* Remove offset for data/eeprom section. */ - return bfd_reloc_overflow; + if (((srel > 0) && (srel & 0xffff) > 255) + || ((srel < 0) && ((-srel) & 0xffff) > 128)) + /* Remove offset for data/eeprom section. */ + return bfd_reloc_overflow; + x = bfd_get_16 (input_bfd, contents); x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00); bfd_put_16 (input_bfd, x, contents); @@ -632,7 +666,8 @@ avr_final_link_relocate (howto, input_bfd, input_section, /* Remove offset for data/eeprom section. */ return bfd_reloc_overflow; x = bfd_get_16 (input_bfd, contents); - x = (x & 0xd3f8) | ((srel & 7) | ((srel & (3 << 3)) << 7) | ((srel & (1 << 5)) << 8)); + x = (x & 0xd3f8) | ((srel & 7) | ((srel & (3 << 3)) << 7) + | ((srel & (1 << 5)) << 8)); bfd_put_16 (input_bfd, x, contents); break; @@ -643,7 +678,7 @@ avr_final_link_relocate (howto, input_bfd, input_section, /* Remove offset for data/eeprom section. */ return bfd_reloc_overflow; x = bfd_get_16 (input_bfd, contents); - x = (x & 0xff30) | (srel & 0xf) | ((srel & 0x30) << 2); + x = (x & 0xff30) | (srel & 0xf) | ((srel & 0x30) << 2); bfd_put_16 (input_bfd, x, contents); break; @@ -665,6 +700,15 @@ avr_final_link_relocate (howto, input_bfd, input_section, bfd_put_16 (input_bfd, x, contents); break; + case R_AVR_MS8_LDI: + contents += rel->r_offset; + srel = (bfd_signed_vma) relocation + rel->r_addend; + srel = (srel >> 24) & 0xff; + x = bfd_get_16 (input_bfd, contents); + x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00); + bfd_put_16 (input_bfd, x, contents); + break; + case R_AVR_LO8_LDI_NEG: contents += rel->r_offset; srel = (bfd_signed_vma) relocation + rel->r_addend; @@ -694,6 +738,16 @@ avr_final_link_relocate (howto, input_bfd, input_section, bfd_put_16 (input_bfd, x, contents); break; + case R_AVR_MS8_LDI_NEG: + contents += rel->r_offset; + srel = (bfd_signed_vma) relocation + rel->r_addend; + srel = -srel; + srel = (srel >> 24) & 0xff; + x = bfd_get_16 (input_bfd, contents); + x = (x & 0xf0f0) | (srel & 0xf) | ((srel << 4) & 0xf00); + bfd_put_16 (input_bfd, x, contents); + break; + case R_AVR_LO8_LDI_PM: contents += rel->r_offset; srel = (bfd_signed_vma) relocation + rel->r_addend; @@ -789,17 +843,16 @@ avr_final_link_relocate (howto, input_bfd, input_section, } /* Relocate an AVR ELF section. */ + static bfd_boolean -elf32_avr_relocate_section (output_bfd, info, input_bfd, input_section, - contents, relocs, local_syms, local_sections) - bfd *output_bfd ATTRIBUTE_UNUSED; - struct bfd_link_info *info; - bfd *input_bfd; - asection *input_section; - bfd_byte *contents; - Elf_Internal_Rela *relocs; - Elf_Internal_Sym *local_syms; - asection **local_sections; +elf32_avr_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED, + struct bfd_link_info *info, + bfd *input_bfd, + asection *input_section, + bfd_byte *contents, + Elf_Internal_Rela *relocs, + Elf_Internal_Sym *local_syms, + asection **local_sections) { Elf_Internal_Shdr * symtab_hdr; struct elf_link_hash_entry ** sym_hashes; @@ -910,9 +963,8 @@ elf32_avr_relocate_section (output_bfd, info, input_bfd, input_section, number. */ static void -bfd_elf_avr_final_write_processing (abfd, linker) - bfd *abfd; - bfd_boolean linker ATTRIBUTE_UNUSED; +bfd_elf_avr_final_write_processing (bfd *abfd, + bfd_boolean linker ATTRIBUTE_UNUSED) { unsigned long val; @@ -943,19 +995,21 @@ bfd_elf_avr_final_write_processing (abfd, linker) elf_elfheader (abfd)->e_machine = EM_AVR; elf_elfheader (abfd)->e_flags &= ~ EF_AVR_MACH; elf_elfheader (abfd)->e_flags |= val; + elf_elfheader (abfd)->e_flags |= EF_AVR_LINKRELAX_PREPARED; } /* Set the right machine number. */ static bfd_boolean -elf32_avr_object_p (abfd) - bfd *abfd; +elf32_avr_object_p (bfd *abfd) { unsigned int e_set = bfd_mach_avr2; + if (elf_elfheader (abfd)->e_machine == EM_AVR || elf_elfheader (abfd)->e_machine == EM_AVR_OLD) { int e_mach = elf_elfheader (abfd)->e_flags & EF_AVR_MACH; + switch (e_mach) { default: @@ -984,6 +1038,920 @@ elf32_avr_object_p (abfd) e_set); } + +/* Enable debugging printout at stdout with a value of 1. */ +#define DEBUG_RELAX 0 + +/* Delete some bytes from a section while changing the size of an instruction. + The parameter "addr" denotes the section-relative offset pointing just + behind the shrinked instruction. "addr+count" point at the first + byte just behind the original unshrinked instruction. */ + +static bfd_boolean +elf32_avr_relax_delete_bytes (bfd *abfd, + asection *sec, + bfd_vma addr, + int count) +{ + Elf_Internal_Shdr *symtab_hdr; + unsigned int sec_shndx; + bfd_byte *contents; + Elf_Internal_Rela *irel, *irelend; + Elf_Internal_Rela *irelalign; + Elf_Internal_Sym *isym; + Elf_Internal_Sym *isymbuf = NULL; + Elf_Internal_Sym *isymend; + bfd_vma toaddr; + struct elf_link_hash_entry **sym_hashes; + struct elf_link_hash_entry **end_hashes; + unsigned int symcount; + + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); + contents = elf_section_data (sec)->this_hdr.contents; + + /* The deletion must stop at the next ALIGN reloc for an aligment + power larger than the number of bytes we are deleting. */ + + irelalign = NULL; + toaddr = sec->size; + + irel = elf_section_data (sec)->relocs; + irelend = irel + sec->reloc_count; + + /* Actually delete the bytes. */ + if (toaddr - addr - count > 0) + memmove (contents + addr, contents + addr + count, + (size_t) (toaddr - addr - count)); + sec->size -= count; + + /* Adjust all the relocs. */ + for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) + { + bfd_vma symval; + bfd_vma old_reloc_address; + bfd_vma shrinked_insn_address; + + old_reloc_address = (sec->output_section->vma + + sec->output_offset + irel->r_offset); + shrinked_insn_address = (sec->output_section->vma + + sec->output_offset + addr - count); + + /* Get the new reloc address. */ + if ((irel->r_offset > addr + && irel->r_offset < toaddr)) + { + if (DEBUG_RELAX) + printf ("Relocation at address 0x%x needs to be moved.\n" + "Old section offset: 0x%x, New section offset: 0x%x \n", + (unsigned int) old_reloc_address, + (unsigned int) irel->r_offset, + (unsigned int) ((irel->r_offset) - count)); + + irel->r_offset -= count; + } + + /* The reloc's own addresses are now ok. However, we need to readjust + the reloc's addend if two conditions are met: + 1.) the reloc is relative to a symbol in this section that + is located in front of the shrinked instruction + 2.) symbol plus addend end up behind the shrinked instruction. + + This should happen only for local symbols that are progmem related. */ + + /* Read this BFD's local symbols if we haven't done so already. */ + if (isymbuf == NULL && symtab_hdr->sh_info != 0) + { + isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; + if (isymbuf == NULL) + isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, + symtab_hdr->sh_info, 0, + NULL, NULL, NULL); + if (isymbuf == NULL) + return FALSE; + } + + /* Get the value of the symbol referred to by the reloc. */ + if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) + { + /* A local symbol. */ + Elf_Internal_Sym *isym; + asection *sym_sec; + + isym = isymbuf + ELF32_R_SYM (irel->r_info); + sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); + symval = isym->st_value; + /* If the reloc is absolute, it will not have + a symbol or section associated with it. */ + if (sym_sec) + { + symval += sym_sec->output_section->vma + + sym_sec->output_offset; + + if (DEBUG_RELAX) + printf ("Checking if the relocation's " + "addend needs corrections.\n" + "Address of anchor symbol: 0x%x \n" + "Address of relocation target: 0x%x \n" + "Address of relaxed insn: 0x%x \n", + (unsigned int) symval, + (unsigned int) (symval + irel->r_addend), + (unsigned int) shrinked_insn_address); + + if (symval <= shrinked_insn_address + && (symval + irel->r_addend) > shrinked_insn_address) + { + irel->r_addend -= count; + + if (DEBUG_RELAX) + printf ("Anchor symbol and relocation target bracket " + "shrinked insn address.\n" + "Need for new addend : 0x%x\n", + (unsigned int) irel->r_addend); + } + } + /* else ... Reference symbol is absolute. No adjustment needed. */ + } + /* else ... Reference symbol is extern. No need for adjusting the addend. */ + } + + /* Adjust the local symbols defined in this section. */ + isym = (Elf_Internal_Sym *) symtab_hdr->contents; + isymend = isym + symtab_hdr->sh_info; + for (; isym < isymend; isym++) + { + if (isym->st_shndx == sec_shndx + && isym->st_value > addr + && isym->st_value < toaddr) + isym->st_value -= count; + } + + /* Now adjust the global symbols defined in this section. */ + symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) + - symtab_hdr->sh_info); + sym_hashes = elf_sym_hashes (abfd); + end_hashes = sym_hashes + symcount; + for (; sym_hashes < end_hashes; sym_hashes++) + { + struct elf_link_hash_entry *sym_hash = *sym_hashes; + if ((sym_hash->root.type == bfd_link_hash_defined + || sym_hash->root.type == bfd_link_hash_defweak) + && sym_hash->root.u.def.section == sec + && sym_hash->root.u.def.value > addr + && sym_hash->root.u.def.value < toaddr) + { + sym_hash->root.u.def.value -= count; + } + } + + return TRUE; +} + +/* This function handles relaxing for the avr. + Many important relaxing opportunities within functions are already + realized by the compiler itself. + Here we try to replace call (4 bytes) -> rcall (2 bytes) + and jump -> rjmp (safes also 2 bytes). + As well we now optimize seqences of + - call/rcall function + - ret + to yield + - jmp/rjmp function + - ret + . In case that within a sequence + - jmp/rjmp label + - ret + the ret could no longer be reached it is optimized away. In order + to check if the ret is no longer needed, it is checked that the ret's address + is not the target of a branch or jump within the same section, it is checked + that there is no skip instruction before the jmp/rjmp and that there + is no local or global label place at the address of the ret. + + We refrain from relaxing within sections ".vectors" and + ".jumptables" in order to maintain the position of the instructions. + There, however, we substitute jmp/call by a sequence rjmp,nop/rcall,nop + if possible. (In future one could possibly use the space of the nop + for the first instruction of the irq service function. + + The .jumptables sections is meant to be used for a future tablejump variant + for the devices with 3-byte program counter where the table itself + contains 4-byte jump instructions whose relative offset must not + be changed. */ + +static bfd_boolean +elf32_avr_relax_section (bfd *abfd, + asection *sec, + struct bfd_link_info *link_info, + bfd_boolean *again) +{ + Elf_Internal_Shdr *symtab_hdr; + Elf_Internal_Rela *internal_relocs; + Elf_Internal_Rela *irel, *irelend; + bfd_byte *contents = NULL; + Elf_Internal_Sym *isymbuf = NULL; + static asection *last_input_section = NULL; + static Elf_Internal_Rela *last_reloc = NULL; + + /* Assume nothing changes. */ + *again = FALSE; + + /* We don't have to do anything for a relocatable link, if + this section does not have relocs, or if this is not a + code section. */ + if (link_info->relocatable + || (sec->flags & SEC_RELOC) == 0 + || sec->reloc_count == 0 + || (sec->flags & SEC_CODE) == 0) + return TRUE; + + /* Check if the object file to relax uses internal symbols so that we + could fix up the relocations. */ + if (!(elf_elfheader (abfd)->e_flags & EF_AVR_LINKRELAX_PREPARED)) + return TRUE; + + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + + /* Get a copy of the native relocations. */ + internal_relocs = (_bfd_elf_link_read_relocs + (abfd, sec, NULL, NULL, link_info->keep_memory)); + if (internal_relocs == NULL) + goto error_return; + + if (sec != last_input_section) + last_reloc = NULL; + + last_input_section = sec; + + /* Walk through the relocs looking for relaxing opportunities. */ + irelend = internal_relocs + sec->reloc_count; + for (irel = internal_relocs; irel < irelend; irel++) + { + bfd_vma symval; + + if ( ELF32_R_TYPE (irel->r_info) != R_AVR_13_PCREL + && ELF32_R_TYPE (irel->r_info) != R_AVR_7_PCREL + && ELF32_R_TYPE (irel->r_info) != R_AVR_CALL) + continue; + + /* Get the section contents if we haven't done so already. */ + if (contents == NULL) + { + /* Get cached copy if it exists. */ + if (elf_section_data (sec)->this_hdr.contents != NULL) + contents = elf_section_data (sec)->this_hdr.contents; + else + { + /* Go get them off disk. */ + if (! bfd_malloc_and_get_section (abfd, sec, &contents)) + goto error_return; + } + } + + /* Read this BFD's local symbols if we haven't done so already. */ + if (isymbuf == NULL && symtab_hdr->sh_info != 0) + { + isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; + if (isymbuf == NULL) + isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, + symtab_hdr->sh_info, 0, + NULL, NULL, NULL); + if (isymbuf == NULL) + goto error_return; + } + + + /* Get the value of the symbol referred to by the reloc. */ + if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) + { + /* A local symbol. */ + Elf_Internal_Sym *isym; + asection *sym_sec; + + isym = isymbuf + ELF32_R_SYM (irel->r_info); + sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); + symval = isym->st_value; + /* If the reloc is absolute, it will not have + a symbol or section associated with it. */ + if (sym_sec) + symval += sym_sec->output_section->vma + + sym_sec->output_offset; + } + else + { + unsigned long indx; + struct elf_link_hash_entry *h; + + /* An external symbol. */ + indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; + h = elf_sym_hashes (abfd)[indx]; + BFD_ASSERT (h != NULL); + if (h->root.type != bfd_link_hash_defined + && h->root.type != bfd_link_hash_defweak) + /* This appears to be a reference to an undefined + symbol. Just ignore it--it will be caught by the + regular reloc processing. */ + continue; + + symval = (h->root.u.def.value + + h->root.u.def.section->output_section->vma + + h->root.u.def.section->output_offset); + } + + /* For simplicity of coding, we are going to modify the section + contents, the section relocs, and the BFD symbol table. We + must tell the rest of the code not to free up this + information. It would be possible to instead create a table + of changes which have to be made, as is done in coff-mips.c; + that would be more work, but would require less memory when + the linker is run. */ + switch (ELF32_R_TYPE (irel->r_info)) + { + /* Try to turn a 22-bit absolute call/jump into an 13-bit + pc-relative rcall/rjmp. */ + case R_AVR_CALL: + { + bfd_vma value = symval + irel->r_addend; + bfd_vma dot, gap; + int distance_short_enough = 0; + + /* Get the address of this instruction. */ + dot = (sec->output_section->vma + + sec->output_offset + irel->r_offset); + + /* Compute the distance from this insn to the branch target. */ + gap = value - dot; + + /* If the distance is within -4094..+4098 inclusive, then we can + relax this jump/call. +4098 because the call/jump target + will be closer after the relaxation. */ + if ((int) gap >= -4094 && (int) gap <= 4098) + distance_short_enough = 1; + + /* Here we handle the wrap-around case. E.g. for a 16k device + we could use a rjmp to jump from address 0x100 to 0x3d00! + In order to make this work properly, we need to fill the + vaiable avr_pc_wrap_around with the appropriate value. + I.e. 0x4000 for a 16k device. */ + { + /* Shrinking the code size makes the gaps larger in the + case of wrap-arounds. So we use a heuristical safety + margin to avoid that during relax the distance gets + again too large for the short jumps. Let's assume + a typical code-size reduction due to relax for a + 16k device of 600 bytes. So let's use twice the + typical value as safety margin. */ + int rgap; + int safety_margin; + + int assumed_shrink = 600; + if (avr_pc_wrap_around > 0x4000) + assumed_shrink = 900; + + safety_margin = 2 * assumed_shrink; + + rgap = avr_relative_distance_considering_wrap_around (gap); + + if (rgap >= (-4092 + safety_margin) + && rgap <= (4094 - safety_margin)) + distance_short_enough = 1; + } + + if (distance_short_enough) + { + unsigned char code_msb; + unsigned char code_lsb; + + if (DEBUG_RELAX) + printf ("shrinking jump/call instruction at address 0x%x" + " in section %s\n\n", + (int) dot, sec->name); + + /* Note that we've changed the relocs, section contents, + etc. */ + elf_section_data (sec)->relocs = internal_relocs; + elf_section_data (sec)->this_hdr.contents = contents; + symtab_hdr->contents = (unsigned char *) isymbuf; + + /* Get the instruction code for relaxing. */ + code_lsb = bfd_get_8 (abfd, contents + irel->r_offset); + code_msb = bfd_get_8 (abfd, contents + irel->r_offset + 1); + + /* Mask out the relocation bits. */ + code_msb &= 0x94; + code_lsb &= 0x0E; + if (code_msb == 0x94 && code_lsb == 0x0E) + { + /* we are changing call -> rcall . */ + bfd_put_8 (abfd, 0x00, contents + irel->r_offset); + bfd_put_8 (abfd, 0xD0, contents + irel->r_offset + 1); + } + else if (code_msb == 0x94 && code_lsb == 0x0C) + { + /* we are changeing jump -> rjmp. */ + bfd_put_8 (abfd, 0x00, contents + irel->r_offset); + bfd_put_8 (abfd, 0xC0, contents + irel->r_offset + 1); + } + else + abort (); + + /* Fix the relocation's type. */ + irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), + R_AVR_13_PCREL); + + /* Check for the vector section. There we don't want to + modify the ordering! */ + + if (!strcmp (sec->name,".vectors") + || !strcmp (sec->name,".jumptables")) + { + /* Let's insert a nop. */ + bfd_put_8 (abfd, 0x00, contents + irel->r_offset + 2); + bfd_put_8 (abfd, 0x00, contents + irel->r_offset + 3); + } + else + { + /* Delete two bytes of data. */ + if (!elf32_avr_relax_delete_bytes (abfd, sec, + irel->r_offset + 2, 2)) + goto error_return; + + /* That will change things, so, we should relax again. + Note that this is not required, and it may be slow. */ + *again = TRUE; + } + } + } + + default: + { + unsigned char code_msb; + unsigned char code_lsb; + bfd_vma dot; + + code_msb = bfd_get_8 (abfd, contents + irel->r_offset + 1); + code_lsb = bfd_get_8 (abfd, contents + irel->r_offset + 0); + + /* Get the address of this instruction. */ + dot = (sec->output_section->vma + + sec->output_offset + irel->r_offset); + + /* Here we look for rcall/ret or call/ret sequences that could be + safely replaced by rjmp/ret or jmp/ret */ + if (0xd0 == (code_msb & 0xf0)) + { + /* This insn is a rcall. */ + unsigned char next_insn_msb = 0; + unsigned char next_insn_lsb = 0; + + if (irel->r_offset + 3 < sec->size) + { + next_insn_msb = + bfd_get_8 (abfd, contents + irel->r_offset + 3); + next_insn_lsb = + bfd_get_8 (abfd, contents + irel->r_offset + 2); + } + + if ((0x95 == next_insn_msb) && (0x08 == next_insn_lsb)) + { + /* The next insn is a ret. We now convert the rcall insn + into a rjmp instruction. */ + code_msb &= 0xef; + bfd_put_8 (abfd, code_msb, contents + irel->r_offset + 1); + if (DEBUG_RELAX) + printf ("converted rcall/ret sequence at address 0x%x" + " into rjmp/ret sequence. Section is %s\n\n", + (int) dot, sec->name); + *again = TRUE; + break; + } + } + else if ((0x94 == (code_msb & 0xfe)) + && (0x0e == (code_lsb & 0x0e))) + { + /* This insn is a call. */ + unsigned char next_insn_msb = 0; + unsigned char next_insn_lsb = 0; + + if (irel->r_offset + 5 < sec->size) + { + next_insn_msb = + bfd_get_8 (abfd, contents + irel->r_offset + 5); + next_insn_lsb = + bfd_get_8 (abfd, contents + irel->r_offset + 4); + } + + if ((0x95 == next_insn_msb) && (0x08 == next_insn_lsb)) + { + /* The next insn is a ret. We now convert the call insn + into a jmp instruction. */ + + code_lsb &= 0xfd; + bfd_put_8 (abfd, code_lsb, contents + irel->r_offset); + if (DEBUG_RELAX) + printf ("converted call/ret sequence at address 0x%x" + " into jmp/ret sequence. Section is %s\n\n", + (int) dot, sec->name); + *again = TRUE; + break; + } + } + else if ((0xc0 == (code_msb & 0xf0)) + || ((0x94 == (code_msb & 0xfe)) + && (0x0c == (code_lsb & 0x0e)))) + { + /* This insn is a rjmp or a jmp. */ + unsigned char next_insn_msb = 0; + unsigned char next_insn_lsb = 0; + int insn_size; + + if (0xc0 == (code_msb & 0xf0)) + insn_size = 2; /* rjmp insn */ + else + insn_size = 4; /* jmp insn */ + + if (irel->r_offset + insn_size + 1 < sec->size) + { + next_insn_msb = + bfd_get_8 (abfd, contents + irel->r_offset + + insn_size + 1); + next_insn_lsb = + bfd_get_8 (abfd, contents + irel->r_offset + + insn_size); + } + + if ((0x95 == next_insn_msb) && (0x08 == next_insn_lsb)) + { + /* The next insn is a ret. We possibly could delete + this ret. First we need to check for preceeding + sbis/sbic/sbrs or cpse "skip" instructions. */ + + int there_is_preceeding_non_skip_insn = 1; + bfd_vma address_of_ret; + + address_of_ret = dot + insn_size; + + if (DEBUG_RELAX && (insn_size == 2)) + printf ("found rjmp / ret sequence at address 0x%x\n", + (int) dot); + if (DEBUG_RELAX && (insn_size == 4)) + printf ("found jmp / ret sequence at address 0x%x\n", + (int) dot); + + /* We have to make sure that there is a preceeding insn. */ + if (irel->r_offset >= 2) + { + unsigned char preceeding_msb; + unsigned char preceeding_lsb; + preceeding_msb = + bfd_get_8 (abfd, contents + irel->r_offset - 1); + preceeding_lsb = + bfd_get_8 (abfd, contents + irel->r_offset - 2); + + /* sbic. */ + if (0x99 == preceeding_msb) + there_is_preceeding_non_skip_insn = 0; + + /* sbis. */ + if (0x9b == preceeding_msb) + there_is_preceeding_non_skip_insn = 0; + + /* sbrc */ + if ((0xfc == (preceeding_msb & 0xfe) + && (0x00 == (preceeding_lsb & 0x08)))) + there_is_preceeding_non_skip_insn = 0; + + /* sbrs */ + if ((0xfe == (preceeding_msb & 0xfe) + && (0x00 == (preceeding_lsb & 0x08)))) + there_is_preceeding_non_skip_insn = 0; + + /* cpse */ + if (0x10 == (preceeding_msb & 0xfc)) + there_is_preceeding_non_skip_insn = 0; + + if (there_is_preceeding_non_skip_insn == 0) + if (DEBUG_RELAX) + printf ("preceeding skip insn prevents deletion of" + " ret insn at addr 0x%x in section %s\n", + (int) dot + 2, sec->name); + } + else + { + /* There is no previous instruction. */ + there_is_preceeding_non_skip_insn = 0; + } + + if (there_is_preceeding_non_skip_insn) + { + /* We now only have to make sure that there is no + local label defined at the address of the ret + instruction and that there is no local relocation + in this section pointing to the ret. */ + + int deleting_ret_is_safe = 1; + unsigned int section_offset_of_ret_insn = + irel->r_offset + insn_size; + Elf_Internal_Sym *isym, *isymend; + unsigned int sec_shndx; + + sec_shndx = + _bfd_elf_section_from_bfd_section (abfd, sec); + + /* Check for local symbols. */ + isym = (Elf_Internal_Sym *) symtab_hdr->contents; + isymend = isym + symtab_hdr->sh_info; + for (; isym < isymend; isym++) + { + if (isym->st_value == section_offset_of_ret_insn + && isym->st_shndx == sec_shndx) + { + deleting_ret_is_safe = 0; + if (DEBUG_RELAX) + printf ("local label prevents deletion of ret " + "insn at address 0x%x\n", + (int) dot + insn_size); + } + } + + /* Now check for global symbols. */ + { + int symcount; + struct elf_link_hash_entry **sym_hashes; + struct elf_link_hash_entry **end_hashes; + + symcount = (symtab_hdr->sh_size + / sizeof (Elf32_External_Sym) + - symtab_hdr->sh_info); + sym_hashes = elf_sym_hashes (abfd); + end_hashes = sym_hashes + symcount; + for (; sym_hashes < end_hashes; sym_hashes++) + { + struct elf_link_hash_entry *sym_hash = + *sym_hashes; + if ((sym_hash->root.type == bfd_link_hash_defined + || sym_hash->root.type == + bfd_link_hash_defweak) + && sym_hash->root.u.def.section == sec + && sym_hash->root.u.def.value == section_offset_of_ret_insn) + { + deleting_ret_is_safe = 0; + if (DEBUG_RELAX) + printf ("global label prevents deletion of " + "ret insn at address 0x%x\n", + (int) dot + insn_size); + } + } + } + /* Now we check for relocations pointing to ret. */ + { + Elf_Internal_Rela *irel; + Elf_Internal_Rela *relend; + Elf_Internal_Shdr *symtab_hdr; + + symtab_hdr = &elf_tdata (abfd)->symtab_hdr; + relend = elf_section_data (sec)->relocs + + sec->reloc_count; + + for (irel = elf_section_data (sec)->relocs; + irel < relend; irel++) + { + bfd_vma reloc_target = 0; + bfd_vma symval; + Elf_Internal_Sym *isymbuf = NULL; + + /* Read this BFD's local symbols if we haven't + done so already. */ + if (isymbuf == NULL && symtab_hdr->sh_info != 0) + { + isymbuf = (Elf_Internal_Sym *) + symtab_hdr->contents; + if (isymbuf == NULL) + isymbuf = bfd_elf_get_elf_syms + (abfd, + symtab_hdr, + symtab_hdr->sh_info, 0, + NULL, NULL, NULL); + if (isymbuf == NULL) + break; + } + + /* Get the value of the symbol referred to + by the reloc. */ + if (ELF32_R_SYM (irel->r_info) + < symtab_hdr->sh_info) + { + /* A local symbol. */ + Elf_Internal_Sym *isym; + asection *sym_sec; + + isym = isymbuf + + ELF32_R_SYM (irel->r_info); + sym_sec = bfd_section_from_elf_index + (abfd, isym->st_shndx); + symval = isym->st_value; + + /* If the reloc is absolute, it will not + have a symbol or section associated + with it. */ + + if (sym_sec) + { + symval += + sym_sec->output_section->vma + + sym_sec->output_offset; + reloc_target = symval + irel->r_addend; + } + else + { + reloc_target = symval + irel->r_addend; + /* Reference symbol is absolute. */ + } + } + /* else ... reference symbol is extern. */ + + if (address_of_ret == reloc_target) + { + deleting_ret_is_safe = 0; + if (DEBUG_RELAX) + printf ("ret from " + "rjmp/jmp ret sequence at address" + " 0x%x could not be deleted. ret" + " is target of a relocation.\n", + (int) address_of_ret); + } + } + } + + if (deleting_ret_is_safe) + { + if (DEBUG_RELAX) + printf ("unreachable ret instruction " + "at address 0x%x deleted.\n", + (int) dot + insn_size); + + /* Delete two bytes of data. */ + if (!elf32_avr_relax_delete_bytes (abfd, sec, + irel->r_offset + insn_size, 2)) + goto error_return; + + /* That will change things, so, we should relax + again. Note that this is not required, and it + may be slow. */ + *again = TRUE; + break; + } + } + + } + } + break; + } + } + } + + if (contents != NULL + && elf_section_data (sec)->this_hdr.contents != contents) + { + if (! link_info->keep_memory) + free (contents); + else + { + /* Cache the section contents for elf_link_input_bfd. */ + elf_section_data (sec)->this_hdr.contents = contents; + } + } + + if (internal_relocs != NULL + && elf_section_data (sec)->relocs != internal_relocs) + free (internal_relocs); + + return TRUE; + + error_return: + if (isymbuf != NULL + && symtab_hdr->contents != (unsigned char *) isymbuf) + free (isymbuf); + if (contents != NULL + && elf_section_data (sec)->this_hdr.contents != contents) + free (contents); + if (internal_relocs != NULL + && elf_section_data (sec)->relocs != internal_relocs) + free (internal_relocs); + + return FALSE; +} + +/* This is a version of bfd_generic_get_relocated_section_contents + which uses elf32_avr_relocate_section. + + For avr it's essentially a cut and paste taken from the H8300 port. + The author of the relaxation support patch for avr had absolutely no + clue what is happening here but found out that this part of the code + seems to be important. */ + +static bfd_byte * +elf32_avr_get_relocated_section_contents (bfd *output_bfd, + struct bfd_link_info *link_info, + struct bfd_link_order *link_order, + bfd_byte *data, + bfd_boolean relocatable, + asymbol **symbols) +{ + Elf_Internal_Shdr *symtab_hdr; + asection *input_section = link_order->u.indirect.section; + bfd *input_bfd = input_section->owner; + asection **sections = NULL; + Elf_Internal_Rela *internal_relocs = NULL; + Elf_Internal_Sym *isymbuf = NULL; + + /* We only need to handle the case of relaxing, or of having a + particular set of section contents, specially. */ + if (relocatable + || elf_section_data (input_section)->this_hdr.contents == NULL) + return bfd_generic_get_relocated_section_contents (output_bfd, link_info, + link_order, data, + relocatable, + symbols); + symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; + + memcpy (data, elf_section_data (input_section)->this_hdr.contents, + (size_t) input_section->size); + + if ((input_section->flags & SEC_RELOC) != 0 + && input_section->reloc_count > 0) + { + asection **secpp; + Elf_Internal_Sym *isym, *isymend; + bfd_size_type amt; + + internal_relocs = (_bfd_elf_link_read_relocs + (input_bfd, input_section, NULL, NULL, FALSE)); + if (internal_relocs == NULL) + goto error_return; + + if (symtab_hdr->sh_info != 0) + { + isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; + if (isymbuf == NULL) + isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, + symtab_hdr->sh_info, 0, + NULL, NULL, NULL); + if (isymbuf == NULL) + goto error_return; + } + + amt = symtab_hdr->sh_info; + amt *= sizeof (asection *); + sections = bfd_malloc (amt); + if (sections == NULL && amt != 0) + goto error_return; + + isymend = isymbuf + symtab_hdr->sh_info; + for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp) + { + asection *isec; + + if (isym->st_shndx == SHN_UNDEF) + isec = bfd_und_section_ptr; + else if (isym->st_shndx == SHN_ABS) + isec = bfd_abs_section_ptr; + else if (isym->st_shndx == SHN_COMMON) + isec = bfd_com_section_ptr; + else + isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx); + + *secpp = isec; + } + + if (! elf32_avr_relocate_section (output_bfd, link_info, input_bfd, + input_section, data, internal_relocs, + isymbuf, sections)) + goto error_return; + + if (sections != NULL) + free (sections); + if (isymbuf != NULL + && symtab_hdr->contents != (unsigned char *) isymbuf) + free (isymbuf); + if (elf_section_data (input_section)->relocs != internal_relocs) + free (internal_relocs); + } + + return data; + + error_return: + if (sections != NULL) + free (sections); + if (isymbuf != NULL + && symtab_hdr->contents != (unsigned char *) isymbuf) + free (isymbuf); + if (internal_relocs != NULL + && elf_section_data (input_section)->relocs != internal_relocs) + free (internal_relocs); + return NULL; +} + + #define ELF_ARCH bfd_arch_avr #define ELF_MACHINE_CODE EM_AVR #define ELF_MACHINE_ALT1 EM_AVR_OLD @@ -1004,4 +1972,8 @@ elf32_avr_object_p (abfd) bfd_elf_avr_final_write_processing #define elf_backend_object_p elf32_avr_object_p +#define bfd_elf32_bfd_relax_section elf32_avr_relax_section +#define bfd_elf32_bfd_get_relocated_section_contents \ + elf32_avr_get_relocated_section_contents + #include "elf32-target.h" diff --git a/bfd/elf32-bfin.c b/bfd/elf32-bfin.c index c1a1b7443a..c97cbb2044 100644 --- a/bfd/elf32-bfin.c +++ b/bfd/elf32-bfin.c @@ -2337,7 +2337,7 @@ fprintf(stderr, "*** check this relocation %s\n", __FUNCTION__); } /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + || h == elf_hash_table (info)->hgot) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elf32-cris.c b/bfd/elf32-cris.c index 06865dcc2e..3edabc7579 100644 --- a/bfd/elf32-cris.c +++ b/bfd/elf32-cris.c @@ -1769,7 +1769,7 @@ elf_cris_finish_dynamic_symbol (output_bfd, info, h, sym) /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + || h == elf_hash_table (info)->hgot) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elf32-hppa.c b/bfd/elf32-hppa.c index 89900b75fa..b5d67140ec 100644 --- a/bfd/elf32-hppa.c +++ b/bfd/elf32-hppa.c @@ -4057,7 +4057,7 @@ elf32_hppa_finish_dynamic_symbol (bfd *output_bfd, /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ if (eh->root.root.string[0] == '_' && (strcmp (eh->root.root.string, "_DYNAMIC") == 0 - || strcmp (eh->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)) + || eh == htab->etab.hgot)) { sym->st_shndx = SHN_ABS; } diff --git a/bfd/elf32-i386.c b/bfd/elf32-i386.c index eb701a1461..c14fc3ba31 100644 --- a/bfd/elf32-i386.c +++ b/bfd/elf32-i386.c @@ -653,6 +653,9 @@ struct elf_i386_link_hash_table /* Value used to fill the last word of the first plt entry. */ bfd_byte plt0_pad_byte; + /* The index of the next unused R_386_TLS_DESC slot in .rel.plt. */ + bfd_vma next_tls_desc_index; + union { bfd_signed_vma refcount; bfd_vma offset; @@ -672,7 +675,7 @@ struct elf_i386_link_hash_table ((struct elf_i386_link_hash_table *) ((p)->hash)) #define elf_i386_compute_jump_table_size(htab) \ - ((htab)->srelplt->reloc_count * 4) + ((htab)->next_tls_desc_index * 4) /* Create an entry in an i386 ELF linker hash table. */ @@ -732,6 +735,7 @@ elf_i386_link_hash_table_create (bfd *abfd) ret->sdynbss = NULL; ret->srelbss = NULL; ret->tls_ldm_got.refcount = 0; + ret->next_tls_desc_index = 0; ret->sgotplt_jump_table_size = 0; ret->sym_sec.abfd = NULL; ret->is_vxworks = 0; @@ -778,9 +782,6 @@ static bfd_boolean elf_i386_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) { struct elf_i386_link_hash_table *htab; - asection * s; - int flags; - const struct elf_backend_data *bed = get_elf_backend_data (dynobj); htab = elf_i386_hash_table (info); if (!htab->sgot && !create_got_section (dynobj, info)) @@ -799,17 +800,9 @@ elf_i386_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) || (!info->shared && !htab->srelbss)) abort (); - if (htab->is_vxworks && !info->shared) - { - s = bfd_make_section (dynobj, ".rel.plt.unloaded"); - flags = (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY - | SEC_LINKER_CREATED); - if (s == NULL - || ! bfd_set_section_flags (dynobj, s, flags) - || ! bfd_set_section_alignment (dynobj, s, bed->s->log_file_align)) - return FALSE; - htab->srelplt2 = s; - } + if (htab->is_vxworks + && !elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2)) + return FALSE; return TRUE; } @@ -1639,7 +1632,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) /* We also need to make an entry in the .rel.plt section. */ htab->srelplt->size += sizeof (Elf32_External_Rel); - htab->srelplt->reloc_count++; + htab->next_tls_desc_index++; if (htab->is_vxworks && !info->shared) { @@ -1996,21 +1989,6 @@ elf_i386_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, else htab->tls_ldm_got.offset = -1; - if (htab->is_vxworks) - { - /* Mark the GOT and PLT symbols as having relocations; they might - not, but we won't know for sure until we build the GOT in - finish_dynamic_symbol. */ - if (htab->elf.hgot) - htab->elf.hgot->indx = -2; - if (htab->elf.hplt) - { - htab->elf.hplt->indx = -2; - if (htab->splt->flags & SEC_CODE) - htab->elf.hplt->type = STT_FUNC; - } - } - /* Allocate global sym .plt and .got entries, and space for global sym dynamic relocs. */ elf_link_hash_traverse (&htab->elf, allocate_dynrelocs, (PTR) info); @@ -2021,7 +1999,7 @@ elf_i386_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, for them, it suffices to multiply the reloc count by the jump slot size. */ if (htab->srelplt) - htab->sgotplt_jump_table_size = htab->srelplt->reloc_count * 4; + htab->sgotplt_jump_table_size = htab->next_tls_desc_index * 4; /* We now have determined the sizes of the various dynamic sections. Allocate memory for them. */ @@ -2054,8 +2032,7 @@ elf_i386_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, /* We use the reloc_count field as a counter if we need to copy relocs into the output file. */ - if (s != htab->srelplt) - s->reloc_count = 0; + s->reloc_count = 0; } else { @@ -2997,8 +2974,8 @@ elf_i386_relocate_section (bfd *output_bfd, + htab->sgotplt_jump_table_size); sreloc = htab->srelplt; loc = sreloc->contents; - loc += sreloc->reloc_count++ - * sizeof (Elf32_External_Rel); + loc += (htab->next_tls_desc_index++ + * sizeof (Elf32_External_Rel)); BFD_ASSERT (loc + sizeof (Elf32_External_Rel) <= sreloc->contents + sreloc->size); bfd_elf32_swap_reloc_out (output_bfd, &outrel, loc); @@ -3638,8 +3615,7 @@ elf_i386_finish_dynamic_symbol (bfd *output_bfd, On VxWorks, the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative to the ".got" section. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || (strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0 - && !htab->is_vxworks)) + || (!htab->is_vxworks && h == htab->elf.hgot)) sym->st_shndx = SHN_ABS; return TRUE; @@ -3967,23 +3943,6 @@ elf_i386_vxworks_link_hash_table_create (bfd *abfd) } -/* Tweak magic VxWorks symbols as they are written to the output file. */ -static bfd_boolean -elf_i386_vxworks_link_output_symbol_hook (struct bfd_link_info *info - ATTRIBUTE_UNUSED, - const char *name, - Elf_Internal_Sym *sym, - asection *input_sec ATTRIBUTE_UNUSED, - struct elf_link_hash_entry *h - ATTRIBUTE_UNUSED) -{ - /* Ignore the first dummy symbol. */ - if (!name) - return TRUE; - - return elf_vxworks_link_output_symbol_hook (name, sym); -} - #undef elf_backend_post_process_headers #undef bfd_elf32_bfd_link_hash_table_create #define bfd_elf32_bfd_link_hash_table_create \ @@ -3993,7 +3952,7 @@ elf_i386_vxworks_link_output_symbol_hook (struct bfd_link_info *info elf_vxworks_add_symbol_hook #undef elf_backend_link_output_symbol_hook #define elf_backend_link_output_symbol_hook \ - elf_i386_vxworks_link_output_symbol_hook + elf_vxworks_link_output_symbol_hook #undef elf_backend_emit_relocs #define elf_backend_emit_relocs elf_vxworks_emit_relocs #undef elf_backend_final_write_processing diff --git a/bfd/elf32-m32c.c b/bfd/elf32-m32c.c index 8004795e3b..f56efd2e4d 100644 --- a/bfd/elf32-m32c.c +++ b/bfd/elf32-m32c.c @@ -493,14 +493,15 @@ m32c_elf_relocate_section } #if 0 - printf("relocate %s at %06lx relocation %06lx addend %ld ", - m32c_elf_howto_table[ELF32_R_TYPE(rel->r_info)].name, - rel->r_offset, relocation, rel->r_addend); + printf ("relocate %s at %06lx relocation %06lx addend %ld ", + m32c_elf_howto_table[ELF32_R_TYPE(rel->r_info)].name, + rel->r_offset + input_section->output_section->vma + input_section->output_offset, + relocation, rel->r_addend); { int i; for (i=0; i<4; i++) - printf(" %02x", contents[rel->r_offset+i]); - printf("\n"); + printf (" %02x", contents[rel->r_offset+i]); + printf ("\n"); } #endif r = _bfd_final_link_relocate (howto, input_bfd, input_section, @@ -1219,10 +1220,9 @@ compare_reloc (const void *e1, const void *e2) return i1->r_offset < i2->r_offset ? -1 : 1; } -#define OFFSET_FOR_RELOC(rel) m32c_offset_for_reloc (abfd, sec, rel, symtab_hdr, shndx_buf, intsyms) +#define OFFSET_FOR_RELOC(rel) m32c_offset_for_reloc (abfd, rel, symtab_hdr, shndx_buf, intsyms) static bfd_vma m32c_offset_for_reloc (bfd *abfd, - asection * sec, Elf_Internal_Rela *rel, Elf_Internal_Shdr *symtab_hdr, Elf_External_Sym_Shndx *shndx_buf, @@ -1236,13 +1236,17 @@ m32c_offset_for_reloc (bfd *abfd, /* A local symbol. */ Elf_Internal_Sym *isym; Elf_External_Sym_Shndx *shndx; + asection *ssec; + isym = intsyms + ELF32_R_SYM (rel->r_info); + ssec = bfd_section_from_elf_index (abfd, isym->st_shndx); shndx = shndx_buf + (shndx_buf ? ELF32_R_SYM (rel->r_info) : 0); - symval = (isym->st_value - + sec->output_section->vma - + sec->output_offset); + symval = isym->st_value; + if (ssec) + symval += ssec->output_section->vma + + ssec->output_offset; } else { @@ -1532,6 +1536,7 @@ m32c_elf_relax_section /* Setting gap_size nonzero is the flag which means "something shrunk". */ gap_size = 0; + gap = NULL; new_type = ELF32_R_TYPE(srel->r_info); pc = sec->output_section->vma + sec->output_offset diff --git a/bfd/elf32-m32r.c b/bfd/elf32-m32r.c index 672d5f4731..aecf0fea29 100644 --- a/bfd/elf32-m32r.c +++ b/bfd/elf32-m32r.c @@ -3358,7 +3358,7 @@ m32r_elf_finish_dynamic_symbol (bfd *output_bfd, /* Mark some specially defined symbols as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + || h == htab->root.hgot) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elf32-m68k.c b/bfd/elf32-m68k.c index 7b3a1e91ba..98b0b12229 100644 --- a/bfd/elf32-m68k.c +++ b/bfd/elf32-m68k.c @@ -2140,7 +2140,7 @@ elf_m68k_finish_dynamic_symbol (output_bfd, info, h, sym) /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + || h == elf_hash_table (info)->hgot) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c index ec407fdb40..b3d8308fb0 100644 --- a/bfd/elf32-ppc.c +++ b/bfd/elf32-ppc.c @@ -2313,6 +2313,13 @@ struct ppc_elf_link_hash_entry #define ppc_elf_hash_entry(ent) ((struct ppc_elf_link_hash_entry *) (ent)) +enum ppc_elf_plt_type { + PLT_UNSET, + PLT_OLD, + PLT_NEW, + PLT_VXWORKS +}; + /* PPC ELF linker hash table. */ struct ppc_elf_link_hash_table @@ -2349,9 +2356,11 @@ struct ppc_elf_link_hash_table /* Non-zero if allocating the header left a gap. */ unsigned int got_gap; - /* Whether to use new plt/got layout or not. */ - unsigned int new_plt:1; - unsigned int old_plt:1; + /* The type of PLT we have chosen to use. */ + enum ppc_elf_plt_type plt_type; + + /* Whether we can use the new PLT layout. */ + unsigned int can_use_new_plt:1; /* Set if we should emit symbols for stubs. */ unsigned int emit_stub_syms:1; @@ -2539,19 +2548,9 @@ ppc_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) return FALSE; } - /* Create the section for VxWorks static plt relocations. */ - if (htab->is_vxworks && !info->shared) - { - s = bfd_make_section (abfd, ".rela.plt.unloaded"); - flags = (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY - | SEC_LINKER_CREATED); - if (s == NULL - || ! bfd_set_section_flags (abfd, s, flags) - || ! bfd_set_section_alignment (abfd, s, - get_elf_backend_data (abfd)->s->log_file_align)) - return FALSE; - htab->srelplt2 = s; - } + if (htab->is_vxworks + && !elf_vxworks_create_dynamic_sections (abfd, info, &htab->srelplt2)) + return FALSE; htab->relplt = bfd_get_section_by_name (abfd, ".rela.plt"); htab->plt = s = bfd_get_section_by_name (abfd, ".plt"); @@ -2559,6 +2558,9 @@ ppc_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info) abort (); flags = SEC_ALLOC | SEC_CODE | SEC_LINKER_CREATED; + if (htab->plt_type == PLT_VXWORKS) + /* The VxWorks PLT is a loaded section with contents. */ + flags |= SEC_HAS_CONTENTS | SEC_LOAD | SEC_READONLY; return bfd_set_section_flags (abfd, s, flags); } @@ -2677,9 +2679,12 @@ static bfd_boolean is_ppc_elf_target (const struct bfd_target *targ) { extern const bfd_target bfd_elf32_powerpc_vec; + extern const bfd_target bfd_elf32_powerpc_vxworks_vec; extern const bfd_target bfd_elf32_powerpcle_vec; - return targ == &bfd_elf32_powerpc_vec || targ == &bfd_elf32_powerpcle_vec; + return (targ == &bfd_elf32_powerpc_vec + || targ == &bfd_elf32_powerpc_vxworks_vec + || targ == &bfd_elf32_powerpcle_vec); } /* Hook called by the linker routine which adds symbols from an object @@ -3245,7 +3250,7 @@ ppc_elf_check_relocs (bfd *abfd, case R_PPC_REL16_LO: case R_PPC_REL16_HI: case R_PPC_REL16_HA: - htab->new_plt = 1; + htab->can_use_new_plt = 1; break; /* These are just markers. */ @@ -3273,8 +3278,8 @@ ppc_elf_check_relocs (bfd *abfd, /* This refers only to functions defined in the shared library. */ case R_PPC_LOCAL24PC: - if (h && h == htab->elf.hgot) - htab->old_plt = 1; + if (h && h == htab->elf.hgot && htab->plt_type == PLT_UNSET) + htab->plt_type = PLT_OLD; break; /* This relocation describes the C++ object vtable hierarchy. @@ -3315,7 +3320,7 @@ ppc_elf_check_relocs (bfd *abfd, && got2 != NULL && (sec->flags & SEC_CODE) != 0 && (info->shared || info->pie) - && !htab->old_plt) + && htab->plt_type == PLT_UNSET) { /* Old -fPIC gcc code has .long LCTOC1-LCFx just before the start of a function, which assembles to a REL32 @@ -3328,7 +3333,7 @@ ppc_elf_check_relocs (bfd *abfd, s = bfd_section_from_r_symndx (abfd, &htab->sym_sec, sec, r_symndx); if (s == got2) - htab->old_plt = 1; + htab->plt_type = PLT_OLD; } /* fall through */ @@ -3338,9 +3343,9 @@ ppc_elf_check_relocs (bfd *abfd, case R_PPC_REL14_BRNTAKEN: if (h == NULL) break; - if (h == htab->elf.hgot) + if (h == htab->elf.hgot && htab->plt_type == PLT_UNSET) { - htab->old_plt = 1; + htab->plt_type = PLT_OLD; break; } /* fall through */ @@ -3600,22 +3605,16 @@ ppc_elf_select_plt_layout (bfd *output_bfd ATTRIBUTE_UNUSED, flagword flags; htab = ppc_elf_hash_table (info); - if (force_old_plt || !htab->new_plt) - htab->old_plt = 1; + + if (htab->plt_type == PLT_UNSET) + htab->plt_type = (force_old_plt || !htab->can_use_new_plt + ? PLT_OLD : PLT_NEW); htab->emit_stub_syms = emit_stub_syms; - if (htab->is_vxworks) - { - /* The VxWorks PLT is a loaded section with contents. */ - flags = SEC_ALLOC | SEC_CODE | SEC_IN_MEMORY | SEC_LINKER_CREATED - | SEC_HAS_CONTENTS | SEC_LOAD | SEC_READONLY; + BFD_ASSERT (htab->plt_type != PLT_VXWORKS); - if (htab->plt != NULL - && !bfd_set_section_flags (htab->elf.dynobj, htab->plt, flags)) - return -1; - } - else if (!htab->old_plt) + if (htab->plt_type == PLT_NEW) { flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED); @@ -3637,7 +3636,7 @@ ppc_elf_select_plt_layout (bfd *output_bfd ATTRIBUTE_UNUSED, && !bfd_set_section_alignment (htab->elf.dynobj, htab->glink, 0)) return -1; } - return !htab->old_plt; + return htab->plt_type == PLT_NEW; } /* Return the section that should be marked against GC for a given @@ -3825,7 +3824,7 @@ ppc_elf_tls_setup (bfd *obfd, struct bfd_link_info *info) struct ppc_elf_link_hash_table *htab; htab = ppc_elf_hash_table (info); - if (!htab->old_plt + if (htab->plt_type == PLT_NEW && htab->plt != NULL && htab->plt->output_section != NULL) { @@ -4269,31 +4268,32 @@ static bfd_vma allocate_got (struct ppc_elf_link_hash_table *htab, unsigned int need) { bfd_vma where; - unsigned int max_before_header = 32768; + unsigned int max_before_header; - if (htab->old_plt) - max_before_header = 32764; - - if (htab->is_vxworks) + if (htab->plt_type == PLT_VXWORKS) { where = htab->got->size; htab->got->size += need; } - else if (need <= htab->got_gap) - { - where = max_before_header - htab->got_gap; - htab->got_gap -= need; - } else { - if (htab->got->size + need > max_before_header - && htab->got->size <= max_before_header) + max_before_header = htab->plt_type == PLT_NEW ? 32768 : 32764; + if (need <= htab->got_gap) { - htab->got_gap = max_before_header - htab->got->size; - htab->got->size = max_before_header + htab->got_header_size; + where = max_before_header - htab->got_gap; + htab->got_gap -= need; + } + else + { + if (htab->got->size + need > max_before_header + && htab->got->size <= max_before_header) + { + htab->got_gap = max_before_header - htab->got->size; + htab->got->size = max_before_header + htab->got_header_size; + } + where = htab->got->size; + htab->got->size += need; } - where = htab->got->size; - htab->got->size += need; } return where; } @@ -4340,7 +4340,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) { asection *s = htab->plt; - if (!(htab->old_plt || htab->is_vxworks)) + if (htab->plt_type == PLT_NEW) { if (!doneone) { @@ -4404,7 +4404,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) s->size += htab->plt_entry_size; /* After the 8192nd entry, room for two entries is allocated. */ - if (!htab->is_vxworks + if (htab->plt_type == PLT_OLD && (s->size - htab->plt_initial_entry_size) / htab->plt_entry_size > PLT_NUM_SINGLE_ENTRIES) @@ -4418,7 +4418,7 @@ allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) { htab->relplt->size += sizeof (Elf32_External_Rela); - if (htab->is_vxworks) + if (htab->plt_type == PLT_VXWORKS) { /* Allocate space for the unloaded relocations. */ if (!info->shared) @@ -4659,9 +4659,9 @@ ppc_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, } } - if (htab->old_plt) + if (htab->plt_type == PLT_OLD) htab->got_header_size = 16; - else + else if (htab->plt_type == PLT_NEW) htab->got_header_size = 12; /* Set up .got offsets for local syms, and space for local dynamic @@ -4757,25 +4757,10 @@ ppc_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, else htab->tlsld_got.offset = (bfd_vma) -1; - if (htab->is_vxworks) - { - /* Mark the GOT and PLT symbols as having relocations; they might - not, but we won't know for sure until we build the GOT in - finish_dynamic_symbol. */ - if (htab->elf.hgot) - htab->elf.hgot->indx = -2; - if (htab->elf.hplt) - { - htab->elf.hplt->indx = -2; - if (htab->plt->flags & SEC_CODE) - htab->elf.hplt->type = STT_FUNC; - } - } - /* Allocate space for global sym dynamic relocs. */ elf_link_hash_traverse (elf_hash_table (info), allocate_dynrelocs, info); - if (htab->got != NULL && !htab->is_vxworks) + if (htab->got != NULL && htab->plt_type != PLT_VXWORKS) { unsigned int g_o_t = 32768; @@ -4786,7 +4771,7 @@ ppc_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, if (htab->got->size <= 32768) { g_o_t = htab->got->size; - if (htab->old_plt) + if (htab->plt_type == PLT_OLD) g_o_t += 4; htab->got->size += htab->got_header_size; } @@ -5122,7 +5107,7 @@ ppc_elf_relax_section (bfd *abfd, if (ent != NULL) { - if (!htab->old_plt) + if (htab->plt_type == PLT_NEW) { tsec = htab->glink; toff = ent->glink_offset; @@ -6337,7 +6322,7 @@ ppc_elf_relocate_section (bfd *output_bfd, { struct plt_entry *ent = find_plt_ent (h, got2, addend); - if (!htab->old_plt) + if (htab->plt_type == PLT_NEW) relocation = (htab->glink->output_section->vma + htab->glink->output_offset + ent->glink_offset); @@ -6427,7 +6412,7 @@ ppc_elf_relocate_section (bfd *output_bfd, } unresolved_reloc = FALSE; - if (!htab->old_plt) + if (htab->plt_type == PLT_NEW) relocation = (htab->glink->output_section->vma + htab->glink->output_offset + ent->glink_offset); @@ -6747,20 +6732,20 @@ ppc_elf_finish_dynamic_symbol (bfd *output_bfd, bfd_byte *loc; bfd_vma reloc_index; - if (!(htab->old_plt || htab->is_vxworks)) + if (htab->plt_type == PLT_NEW) reloc_index = ent->plt.offset / 4; else { reloc_index = ((ent->plt.offset - htab->plt_initial_entry_size) / htab->plt_slot_size); if (reloc_index > PLT_NUM_SINGLE_ENTRIES - && !htab->is_vxworks) + && htab->plt_type == PLT_OLD) reloc_index -= (reloc_index - PLT_NUM_SINGLE_ENTRIES) / 2; } /* This symbol has an entry in the procedure linkage table. Set it up. */ - if (htab->is_vxworks) + if (htab->plt_type == PLT_VXWORKS) { bfd_vma got_offset; const bfd_vma *plt_entry; @@ -6894,7 +6879,7 @@ ppc_elf_finish_dynamic_symbol (bfd *output_bfd, rela.r_offset = (htab->plt->output_section->vma + htab->plt->output_offset + ent->plt.offset); - if (htab->old_plt) + if (htab->plt_type == PLT_OLD) { /* We don't need to fill in the .plt. The ppc dynamic linker will fill it in. */ @@ -6932,7 +6917,7 @@ ppc_elf_finish_dynamic_symbol (bfd *output_bfd, doneone = TRUE; } - if (!htab->old_plt) + if (htab->plt_type == PLT_NEW) { bfd_vma plt; unsigned char *p; @@ -7154,7 +7139,7 @@ ppc_elf_finish_dynamic_sections (bfd *output_bfd, bfd_vma val; p += htab->elf.hgot->root.u.def.value; - if (htab->old_plt && !htab->is_vxworks) + if (htab->plt_type == PLT_OLD) bfd_put_32 (output_bfd, 0x4e800021 /* blrl */, p - 4); val = 0; @@ -7526,6 +7511,7 @@ ppc_elf_vxworks_link_hash_table_create (bfd *abfd) struct ppc_elf_link_hash_table *htab = (struct ppc_elf_link_hash_table *)ret; htab->is_vxworks = 1; + htab->plt_type = PLT_VXWORKS; htab->plt_entry_size = VXWORKS_PLT_ENTRY_SIZE; htab->plt_slot_size = VXWORKS_PLT_ENTRY_SIZE; htab->plt_initial_entry_size = VXWORKS_PLT_INITIAL_ENTRY_SIZE; @@ -7550,23 +7536,6 @@ ppc_elf_vxworks_add_symbol_hook (bfd *abfd, return ppc_elf_add_symbol_hook(abfd, info, sym,namep, flagsp, secp, valp); } -/* Tweak magic VxWorks symbols as they are written to the output file. */ -static bfd_boolean -elf_i386_vxworks_link_output_symbol_hook (struct bfd_link_info *info - ATTRIBUTE_UNUSED, - const char *name, - Elf_Internal_Sym *sym, - asection *input_sec ATTRIBUTE_UNUSED, - struct elf_link_hash_entry *h - ATTRIBUTE_UNUSED) -{ - /* Ignore the first dummy symbol. */ - if (!name) - return TRUE; - - return elf_vxworks_link_output_symbol_hook (name, sym); -} - static void ppc_elf_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker) { @@ -7597,7 +7566,7 @@ ppc_elf_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker) ppc_elf_vxworks_add_symbol_hook #undef elf_backend_link_output_symbol_hook #define elf_backend_link_output_symbol_hook \ - elf_i386_vxworks_link_output_symbol_hook + elf_vxworks_link_output_symbol_hook #undef elf_backend_final_write_processing #define elf_backend_final_write_processing \ ppc_elf_vxworks_final_write_processing diff --git a/bfd/elf32-s390.c b/bfd/elf32-s390.c index afe6c7650d..1c527552be 100644 --- a/bfd/elf32-s390.c +++ b/bfd/elf32-s390.c @@ -3309,8 +3309,8 @@ elf_s390_finish_dynamic_symbol (output_bfd, info, h, sym) /* Mark some specially defined symbols as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0 - || strcmp (h->root.root.string, "_PROCEDURE_LINKAGE_TABLE_") == 0) + || h == htab->elf.hgot + || h == htab->elf.hplt) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elf32-sh.c b/bfd/elf32-sh.c index 25077cc82f..d03f60b2b5 100644 --- a/bfd/elf32-sh.c +++ b/bfd/elf32-sh.c @@ -7036,7 +7036,7 @@ sh_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info, /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + || h == htab->root.hgot) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elf32-vax.c b/bfd/elf32-vax.c index 7a150ba739..e0d059c0cb 100644 --- a/bfd/elf32-vax.c +++ b/bfd/elf32-vax.c @@ -1954,7 +1954,7 @@ elf_vax_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info, /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + || h == elf_hash_table (info)->hgot) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elf32-xtensa.c b/bfd/elf32-xtensa.c index 2cafb3ed10..18610c720f 100644 --- a/bfd/elf32-xtensa.c +++ b/bfd/elf32-xtensa.c @@ -2384,7 +2384,7 @@ elf_xtensa_finish_dynamic_symbol (bfd *output_bfd ATTRIBUTE_UNUSED, /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + || h == elf_hash_table (info)->hgot) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elf64-alpha.c b/bfd/elf64-alpha.c index b6cbf23d64..60deadb8dd 100644 --- a/bfd/elf64-alpha.c +++ b/bfd/elf64-alpha.c @@ -4717,8 +4717,8 @@ elf64_alpha_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info, /* Mark some specially defined symbols as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0 - || strcmp (h->root.root.string, "_PROCEDURE_LINKAGE_TABLE_") == 0) + || h == elf_hash_table (info)->hgot + || h == elf_hash_table (info)->hplt) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elf64-s390.c b/bfd/elf64-s390.c index 83eb836280..7beda9dcd0 100644 --- a/bfd/elf64-s390.c +++ b/bfd/elf64-s390.c @@ -3252,8 +3252,8 @@ elf_s390_finish_dynamic_symbol (output_bfd, info, h, sym) /* Mark some specially defined symbols as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0 - || strcmp (h->root.root.string, "_PROCEDURE_LINKAGE_TABLE_") == 0) + || h == htab->elf.hgot + || h == htab->elf.hplt) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elf64-sh64.c b/bfd/elf64-sh64.c index d915478309..f76e91676e 100644 --- a/bfd/elf64-sh64.c +++ b/bfd/elf64-sh64.c @@ -3889,7 +3889,7 @@ sh64_elf64_finish_dynamic_symbol (bfd *output_bfd, /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + || h == elf_hash_table (info)->hgot) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elf64-x86-64.c b/bfd/elf64-x86-64.c index a35400e2db..8c1a712c1e 100644 --- a/bfd/elf64-x86-64.c +++ b/bfd/elf64-x86-64.c @@ -3131,7 +3131,7 @@ elf64_x86_64_finish_dynamic_symbol (bfd *output_bfd, /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0) + || h == htab->elf.hgot) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elfxx-ia64.c b/bfd/elfxx-ia64.c index 409ce8b362..7a0cc90371 100644 --- a/bfd/elfxx-ia64.c +++ b/bfd/elfxx-ia64.c @@ -4835,8 +4835,8 @@ elfNN_ia64_finish_dynamic_symbol (output_bfd, info, h, sym) /* Mark some specially defined symbols as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0 - || strcmp (h->root.root.string, "_PROCEDURE_LINKAGE_TABLE_") == 0) + || h == ia64_info->root.hgot + || h == ia64_info->root.hplt) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index 2675ee08a1..89acbc57a3 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -7492,7 +7492,7 @@ _bfd_mips_elf_finish_dynamic_symbol (bfd *output_bfd, /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */ name = h->root.root.string; if (strcmp (name, "_DYNAMIC") == 0 - || strcmp (name, "_GLOBAL_OFFSET_TABLE_") == 0) + || h == elf_hash_table (info)->hgot) sym->st_shndx = SHN_ABS; else if (strcmp (name, "_DYNAMIC_LINK") == 0 || strcmp (name, "_DYNAMIC_LINKING") == 0) diff --git a/bfd/elfxx-sparc.c b/bfd/elfxx-sparc.c index 71eed13e80..cdf8c83cd8 100644 --- a/bfd/elfxx-sparc.c +++ b/bfd/elfxx-sparc.c @@ -3578,8 +3578,8 @@ _bfd_sparc_elf_finish_dynamic_symbol (bfd *output_bfd, /* Mark some specially defined symbols as absolute. */ if (strcmp (h->root.root.string, "_DYNAMIC") == 0 - || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0 - || strcmp (h->root.root.string, "_PROCEDURE_LINKAGE_TABLE_") == 0) + || h == htab->elf.hgot + || h == htab->elf.hplt) sym->st_shndx = SHN_ABS; return TRUE; diff --git a/bfd/libbfd.h b/bfd/libbfd.h index 0b13b6e1ef..03e2fa527c 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -1474,9 +1474,11 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_AVR_LO8_LDI", "BFD_RELOC_AVR_HI8_LDI", "BFD_RELOC_AVR_HH8_LDI", + "BFD_RELOC_AVR_MS8_LDI", "BFD_RELOC_AVR_LO8_LDI_NEG", "BFD_RELOC_AVR_HI8_LDI_NEG", "BFD_RELOC_AVR_HH8_LDI_NEG", + "BFD_RELOC_AVR_MS8_LDI_NEG", "BFD_RELOC_AVR_LO8_LDI_PM", "BFD_RELOC_AVR_HI8_LDI_PM", "BFD_RELOC_AVR_HH8_LDI_PM", diff --git a/bfd/po/Make-in b/bfd/po/Make-in index 26ca7817fc..0885b6f464 100644 --- a/bfd/po/Make-in +++ b/bfd/po/Make-in @@ -198,7 +198,7 @@ check: all cat-id-tbl.o: ../intl/libgettext.h -dvi info tags TAGS ID: +html dvi info tags TAGS ID: mostlyclean: rm -f core core.* *.pox $(PACKAGE).po *.old.po cat-id-tbl.tmp diff --git a/bfd/reloc.c b/bfd/reloc.c index b621217ef5..31314e7246 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -3586,6 +3586,11 @@ ENUMDOC This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit of program memory address) into 8 bit immediate value of LDI insn. ENUM + BFD_RELOC_AVR_MS8_LDI +ENUMDOC + This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit + of 32 bit value) into 8 bit immediate value of LDI insn. +ENUM BFD_RELOC_AVR_LO8_LDI_NEG ENUMDOC This is a 16 bit reloc for the AVR that stores negated 8 bit value @@ -3603,6 +3608,11 @@ ENUMDOC (most high 8 bit of program memory address) into 8 bit immediate value of LDI or SUBI insn. ENUM + BFD_RELOC_AVR_MS8_LDI_NEG +ENUMDOC + This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb + of 32 bit value) into 8 bit immediate value of LDI insn. +ENUM BFD_RELOC_AVR_LO8_LDI_PM ENUMDOC This is a 16 bit reloc for the AVR that stores 8 bit value (usually diff --git a/bfd/version.h b/bfd/version.h index 40bfc30be8..bdc58dc4b2 100644 --- a/bfd/version.h +++ b/bfd/version.h @@ -1,3 +1,3 @@ -#define BFD_VERSION_DATE 20060226 +#define BFD_VERSION_DATE 20060303 #define BFD_VERSION @bfd_version@ #define BFD_VERSION_STRING @bfd_version_string@ diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 9e30be74ff..74e89b14f2 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,10 @@ +2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com) + + * xc16x.opc (parse_hash): Return NULL if the input was parsed or + an error message otherwise. + (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise. + Fix up comments to correctly describe the functions. + 2006-02-24 DJ Delorie <dj@redhat.com> * m32c.cpu (RL_TYPE): New attribute, with macros. diff --git a/cpu/xc16x.cpu b/cpu/xc16x.cpu index 5537094fc4..29eaff3f44 100644 --- a/cpu/xc16x.cpu +++ b/cpu/xc16x.cpu @@ -1,3129 +1,245 @@ -; Infineon XC16X CPU description. -*- Scheme -*- -; -; Copyright 2006 Free Software Foundation, Inc. -; -; Contributed by KPIT Cummins Infosystems Ltd.; developed under contract -; from Infineon Systems, GMBH , Germany. -; -; This file is part of the GNU Binutils. -; -; This program is free software; you can redistribute it and/or modify -; it under the terms of the GNU General Public License as published by -; the Free Software Foundation; either version 2 of the License, or -; (at your option) any later version. -; -; This program is distributed in the hope that it will be useful, -; but WITHOUT ANY WARRANTY; without even the implied warranty of -; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -; GNU General Public License for more details. -; -; You should have received a copy of the GNU General Public License -; along with this program; if not, write to the Free Software -; Foundation, 51 Franklin Street - Fifth Floor, Boston, MA -; 02110-1301, USA. - -(include "simplify.inc") - -; define-arch appears first - -(define-arch - (name xc16x) ; name of cpu family - (comment "Infineon XC16X") - (default-alignment aligned) - (insn-lsb0? #t) - (machs xc16x) - (isas xc16x) -) - -; Attributes. -; An attribute to describe which pipeline an insn runs in generally OS. -(define-attr - (for insn) - (type enum) - (name PIPE) - (comment "parallel execution pipeline selection") - (values NONE OS) -) - -; Instruction set parameters. - -(define-isa - (name xc16x) - (default-insn-bitsize 32) - (base-insn-bitsize 32) - (default-insn-word-bitsize 16) - (decode-assist (15 14 13 12)) - ; The XC16X fetches 1 insn at a time. - (liw-insns 1) - (parallel-insns 1) -) - -; Cpu family definitions. - -(define-cpu - ; cpu names must be distinct from the architecture name and machine names. - ; The "b" suffix stands for "base" and is the convention. - ; The "f" suffix stands for "family" and is the convention. - (name xc16xbf) - (comment "Infineon XC16X base family") - (endian little) - (insn-chunk-bitsize 32) - (word-bitsize 16) - (parallel-insns 1) -) - -(define-mach - (name xc16x) - (comment "Infineon XC16X cpu") - (cpu xc16xbf) -) - -; Model descriptions. - -(define-model - (name xc16x) (comment "XC16X") (attrs) - (mach xc16x) - - (pipeline p-mem "" () ((prefetch) (fetch) (decode) (address) (memory) (execute) (writeback))) - - ; `state' is a list of variables for recording model state - (state - ; bit mask of h-gr registers, =1 means value being loaded from memory - (h-gr UINT) - ) - - (unit u-exec "Execution Unit" () - 1 1 ; issue done - () ; state - ((dr INT -1) (sr INT -1)) ; inputs - ((dr INT -1)) ; outputs - () ; profile action (default) - ) - (unit u-cmp "Compare Unit" () - 1 1 ; issue done - () ; state - ((src1 INT -1) (src2 INT -1)) ; inputs - () ; outputs - () ; profile action (default) - ) - (unit u-cti "Jump & Call Unit" () - 1 1 ; issue done - () ; state - ((condbit) (sr INT -1)) ; inputs - ((pc)) ; outputs - () ; profile action (default) - ) - (unit u-mov "Data Movement Unit" () - 1 1 ; issue done - () ;state - ((dr INT -1) (sr INT -1)) ; inputs - ((dr INT -1)) ; output - () ; profile action (default) - ) - ) - -; Instruction fields. -; -; Attributes: -; PCREL-ADDR: pc relative value (for reloc and disassembly purposes) -; ABS-ADDR: absolute address (for reloc and disassembly purposes) -; RELOC: there is a relocation associated with this field (experiment) - -(define-attr - (for ifield operand) - (type boolean) - (name RELOC) - (comment "there is a reloc associated with this field (experiment)") -) - -(dnf f-op1 "op1" () 7 4) -(dnf f-op2 "op2" () 3 4) -(dnf f-condcode "condcode" () 7 4) ;condition code required in other jmps and calls -(dnf f-icondcode "indrct condcode" () 15 4) ;condition code required in other jmpi and calli -(dnf f-rcond "relative-cond" () 7 4) ;condition code required in JMPR -(dnf f-qcond "qbit" () 7 4) ;used in enum of bset/bclear macro -(dnf f-extccode "extended condcode" () 15 5) ;condition code required in other jmpa and calla -(dnf f-r0 "r0" () 9 2) ;required where 2 bit register used(only R0-R3) -(dnf f-r1 "r1" () 15 4) -(dnf f-r2 "r2" () 11 4) -(dnf f-r3 "r3" () 12 4) -(dnf f-r4 "r4" () 11 4) -(dnf f-uimm2 "uimm2" () 13 2) ;used for immediate data,eg in ADD,MOV insns -(dnf f-uimm3 "uimm3" () 10 3) ;used for immediate data,eg in ADD,SUB insns -(dnf f-uimm4 "uimm4" () 15 4) ;used for immediate data,eg in MOV insns -(dnf f-uimm7 "uimm7" (PCREL-ADDR RELOC) 15 7) ;used in TRAP -(dnf f-uimm8 "uimm8" () 23 8) ;used in immediate byte data,eg in ADDB,MOVB insns -(dnf f-uimm16 "uimm16" () 31 16) ;used for immediate word data -(dnf f-memory "memory" () 31 16) ; used for memory operands -(dnf f-memgr8 "memory" () 31 16) ; memory location of gr -(dnf f-rel8 "rel8" (PCREL-ADDR RELOC) 15 8) ;used in JMPR,CALLR -(dnf f-relhi8 "relhi8" (PCREL-ADDR RELOC) 23 8) ;used in JB,JBC,JNB,JNBS -(dnf f-reg8 "reg8" () 15 8) ;required where 8bit gp register used -(dnf f-regmem8 "regmem8" () 15 8) ;required where 8bit register used -(dnf f-regoff8 "regoff8" () 15 8) ;required for offset calc -(dnf f-reghi8 "reghi8" () 23 8) ;required where 8bit register number used -(dnf f-regb8 "regb8" () 15 8) ;required for byte registers RL0,RH0, till RL8,RH8 -(dnf f-seg8 "seg8" () 15 8) ;used as segment number in JMPS,CALLS -(dnf f-segnum8 "segnum8" () 23 8) ;used in EXTS,EXTSR -(dnf f-mask8 "mask8" () 23 8) ;used as mask in BFLDH,BFLDL insns -(dnf f-pagenum "page num" () 25 10);used in EXTP,EXTPR -(dnf f-datahi8 "datahi8" () 31 8) ;used for filling with const data -(dnf f-data8 "data8" () 23 8) ;used for filling with const data -(dnf f-offset16 "address offset16" (ABS-ADDR RELOC) 31 16) ;used in JMPS,JMPA,CALLA,CALLS -(dnf f-op-bit1 "gap of 1 bit" () 11 1) ;used for filling with const data -(dnf f-op-bit2 "gap of 2 bits" () 11 2) ;used for filling with const data -(dnf f-op-bit4 "gap of 4 bits" () 11 4) ;used for filling with const data -(dnf f-op-bit3 "gap of 3 bits" () 10 3) ;used in CALLA, JMPA -(dnf f-op-2bit "gap of 2 bits" () 10 2) ;used in CALLA -(dnf f-op-bitone "gap of 1 bit " () 10 1) ;used in JMPA -(dnf f-op-onebit "gap of 1 bit " () 9 1) ;used in JMPA -(dnf f-op-1bit "gap of 1 bit " () 8 1) ;used in JMPA, CALLA -(dnf f-op-lbit4 "gap of 4 bits" () 15 4) ;used for filling with const data -(dnf f-op-lbit2 "gap of 2 bits" () 15 2) ;used for filling with const data -(dnf f-op-bit8 "gap of 8 bits" () 31 8) ;used for filling with const data -(dnf f-op-bit16 "gap of 16 bits" () 31 16) ;used for filling with const data -(dnf f-qbit "qbit" () 7 4) ;used in bit field of bset/bclear -(dnf f-qlobit "qlobit" () 31 4) ;used for filling with const data -(dnf f-qhibit "qhibit" () 27 4) ;used for filling with const data -(dnf f-qlobit2 "qlobit2" () 27 2) ;used for filling with const data -(dnf f-pof "upof16" () 31 16) ; used for memory operands - -; Enums. -; insn-op1: bits 0-3 -(define-normal-insn-enum insn-op1 "insn format enums" () OP1_ f-op1 - ("0" "1" "2" "3" "4" "5" "6" "7" - "8" "9" "10" "11" "12" "13" "14" "15") -) - -; insn-op2: bits 4-7 -(define-normal-insn-enum insn-op2 "op2 enums" () OP2_ f-op2 - ("0" "1" "2" "3" "4" "5" "6" "7" - "8" "9" "10" "11" "12" "13" "14" "15") -) - -;/*for bclr/bset*/ -; insn-rcond: bits 0-3 -(define-normal-insn-enum insn-qcond "bit set/clear enums" () QBIT_ f-qcond - (("0" 0) ("1" 1) ("2" 2) ("3" 3) ("4" 4) ("5" 5) ("6" 6) ("7" 7) ("8" 8) ("9" 9) ("10" 10) - ("11" 11) ("12" 12) ("13" 13) ("14" 14) ("15" 15)) -) -;/************/ -; insn-rcond: bits 0-3 -(define-normal-insn-enum insn-rcond "relative jump condition code op2 enums" () COND_ f-rcond - (("UC" 0) ("NET" 1) ("Z" 2) ("NE_NZ" 3) ("V" 4) ("NV" 5) ("N" 6) ("NN" 7) - ("C" 8) ("NC" 9) ("SGT" 10) ("SLE" 11) ("SLT" 12) ("SGE" 13) ("UGT" 14) ("ULE" 15) - ("EQ" 2) ("NE" 3) ("ULT" 8) ("UGE" 9)) -) - - - -; Hardware pieces. -; These entries list the elements of the raw hardware. -; They're also used to provide tables and other elements of the assembly -; language. - -(dnh h-pc "program counter" (PC) (pc) () () ()) - -(define-keyword - (name gr-names) - (print-name h-gr) - (prefix "") - (values (r0 0) (r1 1) (r2 2) (r3 3) (r4 4) (r5 5) (r6 6) (r7 7) - (r8 8) (r9 9) (r10 10) (r11 11) (r12 12) (r13 13) (r14 14) (r15 15)) - -) -(define-hardware - (name h-gr) - (comment "general registers") - (attrs PROFILE CACHE-ADDR) - (type register HI (16)) - (indices extern-keyword gr-names) -) - -(define-keyword - (name ext-names) - (print-name h-ext) - (prefix "") - (values (0x1 0) (0x2 1) (0x3 2) (0x4 3) - ("1" 0) ("2" 1) ("3" 2) ("4" 3)) - -) - -(define-hardware - (name h-ext) - (comment "ext values") - (attrs PROFILE CACHE-ADDR) - (type register HI (8)) - (indices extern-keyword ext-names) -) - -(define-keyword - (name psw-names) - (print-name h-psw) - (prefix "") - (values ("IEN" 136) ("r0.11" 240) ("r1.11" 241) ("r2.11" 242) ("r3.11" 243) ("r4.11" 244) - ("r5.11" 245) ("r6.11" 246) ("r7.11" 247) ("r8.11" 248) - ("r9.11" 249) ("r10.11" 250) ("r11.11" 251) ("r12.11" 252) - ("r13.11" 253) ("r14.11" 254) ("r15.11" 255)) -) - -(define-hardware - (name h-psw) - (comment "ext values") - (attrs PROFILE CACHE-ADDR) - (type register HI (1)) - (indices extern-keyword psw-names) -) - -(define-keyword - (name grb-names) - (print-name h-grb) - (prefix "") - (values (rl0 0) (rh0 1) (rl1 2) (rh1 3) (rl2 4) (rh2 5) (rl3 6) (rh3 7) - (rl4 8) (rh4 9) (rl5 10) (rh5 11) (rl6 12) (rh6 13) (rl7 14) (rh7 15)) -) - -(define-hardware - (name h-grb) - (comment "general registers") - (attrs PROFILE CACHE-ADDR) - (type register QI (16)) - (indices extern-keyword grb-names) -) - -(define-keyword - (name conditioncode-names) - (print-name h-cc) - (prefix "") - (values (cc_UC 0) (cc_NET 1) (cc_Z 2) (cc_EQ 2) (cc_NZ 3) (cc_NE 3) (cc_V 4) (cc_NV 5) (cc_N 6) (cc_NN 7) (cc_ULT 8) (cc_UGE 9) - (cc_C 8) (cc_NC 9) (cc_SGT 10) (cc_SLE 11) (cc_SLT 12) (cc_SGE 13) (cc_UGT 14) - (cc_ULE 15)) -) -(define-hardware - (name h-cc) - (comment "condition codes") - (attrs PROFILE CACHE-ADDR) - (type register QI (16)) - (indices extern-keyword conditioncode-names) -) - -(define-keyword - (name extconditioncode-names) - (print-name h-ecc) - (prefix "") - (values(cc_UC 0) (cc_NET 2) (cc_Z 4) (cc_EQ 4) (cc_NZ 6) (cc_NE 6) (cc_V 8) (cc_NV 10) (cc_N 12) (cc_NN 14) (cc_ULT 16) (cc_UGE 18) (cc_C 16) (cc_NC 18) (cc_SGT 20) - (cc_SLE 22) (cc_SLT 24) (cc_SGE 26) (cc_UGT 28) (cc_ULE 30) (cc_nusr0 1) - (cc_nusr1 3) (cc_usr0 5) (cc_usr1 7)) -) -(define-hardware - (name h-ecc) - (comment "extended condition codes") - (attrs PROFILE CACHE-ADDR) - (type register QI (4)) - (indices extern-keyword extconditioncode-names) -) - -(define-keyword - (name grb8-names) - (print-name h-grb8) - (prefix "") - (values (dpp0 0) (dpp1 1) (dpp2 2) (dpp3 3) - (psw 136) (cp 8) (mdl 7) (mdh 6) - (mdc 135) (sp 9) (csp 4) (vecseg 137) - (stkov 10) (stkun 11) (cpucon1 12) (cpucon2 13) - (zeros 142) (ones 143) (spseg 134) (tfr 214) - (rl0 240) (rh0 241) (rl1 242) (rh1 243) (rl2 244) (rh2 245) (rl3 246) (rh3 247) - (rl4 248) (rh4 249) (rl5 250) (rh5 251) (rl6 252) (rh6 253) (rl7 254) (rh7 255)) -) - -(define-hardware - (name h-grb8) - (comment "general byte registers") - (attrs PROFILE CACHE-ADDR) - (type register QI (36)) - (indices extern-keyword grb8-names) -) - -(define-keyword - (name r8-names) - (print-name h-r8) - (prefix "") - (values (dpp0 0) (dpp1 1) (dpp2 2) (dpp3 3) - (psw 136) (cp 8) (mdl 7) (mdh 6) - (mdc 135) (sp 9) (csp 4) (vecseg 137) - (stkov 10) (stkun 11) (cpucon1 12) (cpucon2 13) - (zeros 142) (ones 143) (spseg 134) (tfr 214) - (r0 240) (r1 241) (r2 242) (r3 243) (r4 244) (r5 245) (r6 246) (r7 247) - (r8 248) (r9 249) (r10 250) (r11 251) (r12 252) (r13 253) (r14 254) (r15 255)) -) - -(define-hardware - (name h-r8) - (comment "registers") - (attrs PROFILE CACHE-ADDR) - (type register HI (36)) - (indices extern-keyword r8-names) -) - -(define-keyword - (name regmem8-names) - (print-name h-regmem8) - (prefix "") - (values (dpp0 0) (dpp1 1) (dpp2 2) (dpp3 3) - (psw 136) (cp 8) (mdl 7) (mdh 6) - (mdc 135) (sp 9) (csp 4) (vecseg 137) - (stkov 10) (stkun 11) (cpucon1 12) (cpucon2 13) - (zeros 142) (ones 143) (spseg 134) (tfr 214) - (r0 240) (r1 241) (r2 242) (r3 243) (r4 244) (r5 245) (r6 246) (r7 247) - (r8 248) (r9 249) (r10 250) (r11 251) (r12 252) (r13 253) (r14 254) (r15 255)) -) - -(define-hardware - (name h-regmem8) - (comment "registers") - (attrs ) - (type register HI (16)) - (indices extern-keyword regmem8-names) -) - -(define-keyword - (name regdiv8-names) - (print-name h-regdiv8) - (prefix "") - (values (r0 0) (r1 17) (r2 34) (r3 51) (r4 68) (r5 85) (r6 102) (r7 119) - (r8 136) (r9 153) (r10 170) (r11 187) (r12 204) (r13 221) (r14 238) (r15 255)) -) - -(define-hardware - (name h-regdiv8) - (comment "division insn registers") - (attrs PROFILE CACHE-ADDR) - (type register HI (16)) - (indices extern-keyword regdiv8-names) -) - -(define-keyword - (name reg0-name) - (print-name h-reg0) - (prefix "") - (values (0x1 1) (0x2 2) (0x3 3) (0x4 4) (0x5 5) (0x6 6) (0x7 7) (0x8 8) (0x9 9) (0xa 10) (0xb 11) - (0xc 12) (0xd 13) (0xe 14) (0xf 15) - ("1" 1) ("2" 2) ("3" 3) ("4" 4) ("5" 5) ("6" 6) ("7" 7) ("8" 8) ("9" 9) ("10" 10) ("11" 11) - ("12" 12) ("13" 13) ("14" 14) ("15" 15)) -) - -(define-hardware - (name h-r0) - (comment "for 4-bit data excuding 0") - (attrs PROFILE CACHE-ADDR) - (type register HI (30)) - (indices extern-keyword reg0-name) -) - -(define-keyword - (name reg0-name1) - (print-name h-reg01) - (prefix "") - (values (0x1 1) (0x2 2) (0x3 3) (0x4 4) (0x5 5) (0x6 6) (0x7 7) - ("1" 1) ("2" 2) ("3" 3) ("4" 4) ("5" 5) ("6" 6) ("7" 7)) -) - -(define-hardware - (name h-r01) - (comment "for 4-bit data excuding 0") - (attrs PROFILE CACHE-ADDR) - (type register HI (14)) - (indices extern-keyword reg0-name1) -) - -(define-keyword - (name regbmem8-names) - (print-name h-regbmem8) - (prefix "") - (values (dpp0 0) (dpp1 1) (dpp2 2) (dpp3 3) - (psw 136) (cp 8) (mdl 7) (mdh 6) - (mdc 135) (sp 9) (csp 4) (vecseg 137) - (stkov 10) (stkun 11) (cpucon1 12) (cpucon2 13) - (zeros 142) (ones 143) (spseg 134) (tfr 214) - (rl0 240) (rh0 241) (rl1 242) (rh1 243) (rl2 244) (rh2 245) (rl3 246) (rh3 247) - (rl4 248) (rh4 249) (rl5 250) (rh5 251) (rl6 252) (rh6 253) (rl7 254) (rh7 255)) -) - -(define-hardware - (name h-regbmem8) - (comment "registers") - (attrs PROFILE CACHE-ADDR) - (type register HI (36)) - (indices extern-keyword regbmem8-names) -) - -(define-keyword - (name memgr8-names) - (print-name h-memgr8) - (prefix "") - (values (dpp0 65024) (dpp1 65026) (dpp2 65028) (dpp3 65030) - (psw 65296) (cp 65040) (mdl 65038) (mdh 65036) - (mdc 65294) (sp 65042) (csp 65032) (vecseg 65298) - (stkov 65044) (stkun 65046) (cpucon1 65048) (cpucon2 65050) - (zeros 65308) (ones 65310) (spseg 65292) (tfr 65452) ) -) - -(define-hardware - (name h-memgr8) - (comment "memory location of registers") - (attrs ) - (type register HI (20)) - (indices extern-keyword memgr8-names) -) - -(dsh h-cond "condition bit" () (register BI)) ;any bit from PSW while comparison -; This bit is part of the PSW register -(dsh h-cbit "carry bit" () (register BI)) - -(dsh h-sgtdis "segmentation enable bit" () (register BI)) ;0 means segmentation enabled - -;Instruction operands -; -- layer between the assembler and the raw hardware description -; -- the main means of manipulating instruction fields in the semantic code - -; XC16X specific operand attributes: - -(define-attr - (for operand) - (type boolean) - (name HASH-PREFIX) - (comment "immediates have an optional '#' prefix") -) - -(define-attr - (for operand) - (type boolean) - (name DOT-PREFIX) - (comment "bit addr have an optional '.' prefix") -) - -(define-attr - (for operand) - (type boolean) - (name POF-PREFIX) - (comment "page offset ") -) - -(define-attr - (for operand) - (type boolean) - (name PAG-PREFIX) - (comment "page ") -) - -(define-attr - (for operand) - (type boolean) - (name SOF-PREFIX) - (comment "segment offset selection") -) - -(define-attr - (for operand) - (type boolean) - (name SEG-PREFIX) - (comment "segment") -) - -(dnop sr "source register" () h-gr f-r2) -(dnop dr "destination register" () h-gr f-r1) -(dnop dri "destination register" () h-gr f-r4) -(dnop srb "source register" () h-grb f-r2) -(dnop drb "destination register" () h-grb f-r1) -(dnop sr2 "2 bit source register" () h-gr f-r0) -(dnop src1 "source register 1" () h-gr f-r1) -(dnop src2 "source register 2" () h-gr f-r2) -(dnop srdiv "source register 2" () h-regdiv8 f-reg8) -(dnop RegNam "PSW bits" () h-psw f-reg8) -(dnop uimm2 "2 bit unsigned number" (HASH-PREFIX) h-ext f-uimm2) -(dnop uimm3 "3 bit unsigned number" (HASH-PREFIX) h-r01 f-uimm3) -(dnop uimm4 "4 bit unsigned number" (HASH-PREFIX) h-uint f-uimm4) -(dnop uimm7 "7 bit trap number" (HASH-PREFIX) h-uint f-uimm7) -(dnop uimm8 "8 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm8) -(dnop uimm16 "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm16) -(dnop upof16 "16 bit unsigned immediate" (POF-PREFIX) h-addr f-memory) -(dnop reg8 "8 bit word register number" () h-r8 f-reg8) -(dnop regmem8 "8 bit word register number" () h-regmem8 f-regmem8) -(dnop regbmem8 "8 bit byte register number" () h-regbmem8 f-regmem8) -(dnop regoff8 "8 bit word register number" () h-r8 f-regoff8) -(dnop reghi8 "8 bit word register number" () h-r8 f-reghi8) -(dnop regb8 "8 bit byte register number" () h-grb8 f-regb8) -(dnop genreg "8 bit word register number" () h-r8 f-regb8) -(dnop seg "8 bit segment number" () h-uint f-seg8) -(dnop seghi8 "8 bit hi segment number" () h-uint f-segnum8) -(dnop caddr "16 bit address offset" () h-addr f-offset16) -(dnop rel "8 bit signed relative offset" () h-sint f-rel8) -(dnop relhi "hi 8 bit signed relative offset" () h-sint f-relhi8) -(dnop condbit "condition bit" (SEM-ONLY) h-cond f-nil) -(dnop bit1 "gap of 1 bit" () h-uint f-op-bit1) -(dnop bit2 "gap of 2 bits" () h-uint f-op-bit2) -(dnop bit4 "gap of 4 bits" () h-uint f-op-bit4) -(dnop lbit4 "gap of 4 bits" () h-uint f-op-lbit4) -(dnop lbit2 "gap of 2 bits" () h-uint f-op-lbit2) -(dnop bit8 "gap of 8 bits" () h-uint f-op-bit8) -(dnop u4 "gap of 4 bits" () h-r0 f-uimm4) -(dnop bitone "field of 1 bit" () h-uint f-op-onebit) -(dnop bit01 "field of 1 bit" () h-uint f-op-1bit) -(dnop cond "condition code" () h-cc f-condcode) -(dnop icond "indirect condition code" () h-cc f-icondcode) -(dnop extcond "extended condition code" () h-ecc f-extccode) -(dnop memory "16 bit memory" () h-addr f-memory) -(dnop memgr8 "16 bit memory" () h-memgr8 f-memgr8) -(dnop cbit "carry bit" (SEM-ONLY) h-cbit f-nil) -(dnop qbit "bit addr" (DOT-PREFIX) h-uint f-qbit) -(dnop qlobit "bit addr" (DOT-PREFIX) h-uint f-qlobit) -(dnop qhibit "bit addr" (DOT-PREFIX) h-uint f-qhibit) -(dnop mask8 "8 bit mask" (HASH-PREFIX) h-uint f-mask8) -(dnop masklo8 "8 bit mask" (HASH-PREFIX) h-uint f-datahi8) -(dnop pagenum "10 bit page number" (HASH-PREFIX) h-uint f-pagenum) -(dnop data8 "8 bit data" (HASH-PREFIX) h-uint f-data8) -(dnop datahi8 "8 bit data" (HASH-PREFIX) h-uint f-datahi8) -(dnop sgtdisbit "segmentation enable bit" (SEM-ONLY) h-sgtdis f-nil) -(dnop upag16 "16 bit unsigned immediate" (PAG-PREFIX) h-uint f-uimm16) -(dnop useg8 "8 bit segment " (SEG-PREFIX) h-uint f-seg8) -(dnop useg16 "16 bit address offset" (SEG-PREFIX) h-uint f-offset16) -(dnop usof16 "16 bit address offset" (SOF-PREFIX) h-uint f-offset16) - -; define hash operator -(define-operand (name hash) (comment "# prefix") (attrs) - (type h-sint) - (index f-nil) - (handlers (parse "hash") (print "hash")) -) - -; define dot operator -(define-operand (name dot) (comment ". prefix") (attrs) - (type h-sint) - (index f-nil) - (handlers (parse "dot") (print "dot")) -) - -; define pof operator -(define-operand (name pof) (comment "pof: prefix") (attrs) - (type h-sint) - (index f-nil) - (handlers (parse "pof") (print "pof")) -) - -; define pag operator -(define-operand (name pag) (comment "pag: prefix") (attrs) - (type h-sint) - (index f-nil) - (handlers (parse "pag") (print "pag")) -) - -; define sof operator -(define-operand (name sof) (comment "sof: prefix") (attrs) - (type h-sint) - (index f-nil) - (handlers (parse "sof") (print "sof")) -) - -; define seg operator -(define-operand (name segm) (comment "seg: prefix") (attrs) - (type h-sint) - (index f-nil) - (handlers (parse "seg") (print "seg")) -) - -; IDOC attribute for instruction documentation. -(define-attr - (for insn) - (type enum) - (name IDOC) - (comment "insn kind for documentation") - (attrs META) - (values - (MOVE - () "Data Movement") - (ALU - () "Arithmatic & logical") - (CMP - () "Compare") - (JMP - () "Jump & Call") - (MISC - () "Miscellaneous") - (SYSC - () "System control") - ) -) - -; Include the instruction set descriptions from their respective -; source files. - -;Arithmatic insns -;****************************************************************** - -;add/sub register and immediate -(define-pmacro (arithmetic16 name insn insn1 opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$"dir"$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 (mem HI op2))) - () - ) -) -(arithmetic16 addrpof add add OP1_0 OP2_2 reg8 upof16 HI "pof") -(arithmetic16 subrpof sub sub OP1_2 OP2_2 reg8 upof16 HI "pof") -(arithmetic16 addbrpof addb add OP1_0 OP2_3 regb8 upof16 QI "pof") -(arithmetic16 subbrpof subb sub OP1_2 OP2_3 regb8 upof16 QI "pof") -(arithmetic16 addrpag add add OP1_0 OP2_2 reg8 upag16 HI "pag") -(arithmetic16 subrpag sub sub OP1_2 OP2_2 reg8 upag16 HI "pag") -(arithmetic16 addbrpag addb add OP1_0 OP2_3 regb8 upag16 QI "pag") -(arithmetic16 subbrpag subb sub OP1_2 OP2_3 regb8 upag16 QI "pag") - -;add/sub register and immediate -(define-pmacro (arithmetic17 name insn insn1 opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$"dir"$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 (mem HI op2) cbit)) - () - ) -) -(arithmetic17 addcrpof addc addc OP1_1 OP2_2 reg8 upof16 HI "pof") -(arithmetic17 subcrpof subc subc OP1_3 OP2_2 reg8 upof16 HI "pof") -(arithmetic17 addcbrpof addcb addc OP1_1 OP2_3 regb8 upof16 QI "pof") -(arithmetic17 subcbrpof subcb subc OP1_3 OP2_3 regb8 upof16 QI "pof") -(arithmetic17 addcrpag addc addc OP1_1 OP2_2 reg8 upag16 HI "pag") -(arithmetic17 subcrpag subc subc OP1_3 OP2_2 reg8 upag16 HI "pag") -(arithmetic17 addcbrpag addcb addc OP1_1 OP2_3 regb8 upag16 QI "pag") -(arithmetic17 subcbrpag subcb subc OP1_3 OP2_3 regb8 upag16 QI "pag") - -;add/sub register and immediate -(define-pmacro (arithmetic18 name insn insn1 opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"dir"$"op1 ",$"op2) - (+ opc1 opc2 op2 op1) - (set (mem HI op1) (insn1 (mem HI op1) op2 )) - () - ) -) -(arithmetic18 addrpofr add add OP1_0 OP2_4 upof16 reg8 HI "pof") -(arithmetic18 subrpofr sub sub OP1_2 OP2_4 upof16 reg8 HI "pof") -(arithmetic18 addbrpofr addb add OP1_0 OP2_5 upof16 regb8 QI "pof") -(arithmetic18 subbrpofr subb sub OP1_2 OP2_5 upof16 regb8 QI "pof") - -;add/sub register and immediate -(define-pmacro (arithmetic19 name insn insn1 opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"dir"$"op1 ",$"op2) - (+ opc1 opc2 op2 op1) - (set (mem HI op1) (insn1 mode (mem HI op1) op2 cbit)) - () - ) -) -(arithmetic19 addcrpofr addc addc OP1_1 OP2_4 upof16 reg8 HI "pof") -(arithmetic19 subcrpofr subc subc OP1_3 OP2_4 upof16 reg8 HI "pof") -(arithmetic19 addcbrpofr addcb addc OP1_1 OP2_5 upof16 regb8 QI "pof") -(arithmetic19 subcbrpofr subcb subc OP1_3 OP2_5 upof16 regb8 QI "pof") - -;add/sub register and immediate -(define-pmacro (arithmetic20 name insn insn1 opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"dir"$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) -(arithmetic20 addrhpof add add OP1_0 OP2_6 reg8 uimm16 HI "pof") -(arithmetic20 subrhpof sub sub OP1_2 OP2_6 reg8 uimm16 HI "pof") -(arithmetic20 addbrhpof add add OP1_0 OP2_6 reg8 uimm16 HI "pag") -(arithmetic20 subbrhpof sub sub OP1_2 OP2_6 reg8 uimm16 HI "pag") - -;add/sub register and immediate -(define-pmacro (arithmetic21 name insn insn1 opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"dir"$"op2) - (+ opc1 opc2 op1 (f-op-bit1 0) op2) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) -(arithmetic21 addrhpof3 add add OP1_0 OP2_8 dr uimm3 HI "pof") -(arithmetic21 subrhpof3 sub sub OP1_2 OP2_8 dr uimm3 HI "pof") -(arithmetic21 addbrhpag3 addb add OP1_0 OP2_9 drb uimm3 QI "pag") -(arithmetic21 subbrhpag3 subb sub OP1_2 OP2_9 drb uimm3 QI "pag") -(arithmetic21 addrhpag3 add add OP1_0 OP2_8 dr uimm3 HI "pag") -(arithmetic21 subrhpag3 sub sub OP1_2 OP2_8 dr uimm3 HI "pag") -(arithmetic21 addbrhpof3 addb add OP1_0 OP2_9 drb uimm3 QI "pof") -(arithmetic21 subbrhpof3 subb sub OP1_2 OP2_9 drb uimm3 QI "pof") - -;add/sub register and immediate -(define-pmacro (arithmetic22 name insn insn1 opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"dir"$"op2) - (+ opc1 opc2 op1 op2 (f-op-bit8 0)) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) -(arithmetic22 addrbhpof addb add OP1_0 OP2_7 regb8 uimm8 QI "pof") -(arithmetic22 subrbhpof subb sub OP1_2 OP2_7 regb8 uimm8 QI "pof") -(arithmetic22 addbrhpag addb add OP1_0 OP2_7 regb8 uimm8 QI "pag") -(arithmetic22 subbrhpag subb sub OP1_2 OP2_7 regb8 uimm8 QI "pag") - -;add/sub register and immediate -(define-pmacro (arithmetic23 name insn insn1 opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"dir"$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 op2 cbit)) - () - ) -) -(arithmetic23 addcrhpof addc addc OP1_1 OP2_6 reg8 uimm16 HI "pof") -(arithmetic23 subcrhpof subc subc OP1_3 OP2_6 reg8 uimm16 HI "pof") -(arithmetic23 addcbrhpof addc addc OP1_1 OP2_6 reg8 uimm16 HI "pag") -(arithmetic23 subcbrhpof subc subc OP1_3 OP2_6 reg8 uimm16 HI "pag") - -;add/sub register and immediate -(define-pmacro (arithmetic24 name insn insn1 opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"dir"$"op2) - (+ opc1 opc2 op1 (f-op-bit1 0) op2) - (set mode op1 (insn1 mode op1 op2 cbit)) - () - ) -) -(arithmetic24 addcrhpof3 addc addc OP1_1 OP2_8 dr uimm3 HI "pof") -(arithmetic24 subcrhpof3 subc subc OP1_3 OP2_8 dr uimm3 HI "pof") -(arithmetic24 addcbrhpag3 addcb addc OP1_1 OP2_9 drb uimm3 QI "pag") -(arithmetic24 subcbrhpag3 subcb subc OP1_3 OP2_9 drb uimm3 QI "pag") -(arithmetic24 addcrhpag3 addc addc OP1_1 OP2_8 dr uimm3 HI "pag") -(arithmetic24 subcrhpag3 subc subc OP1_3 OP2_8 dr uimm3 HI "pag") -(arithmetic24 addcbrhpof3 addcb addc OP1_1 OP2_9 drb uimm3 QI "pof") -(arithmetic24 subcbrhpof3 subcb subc OP1_3 OP2_9 drb uimm3 QI "pof") - -;add/sub register and immediate -(define-pmacro (arithmetic25 name insn insn1 opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"dir"$"op2) - (+ opc1 opc2 op1 op2 (f-op-bit8 0)) - (set mode op1 (insn1 mode op1 op2 cbit)) - () - ) -) -(arithmetic25 addcrbhpof addcb addc OP1_1 OP2_7 regb8 uimm8 QI "pof") -(arithmetic25 subcrbhpof subcb subc OP1_3 OP2_7 regb8 uimm8 QI "pof") -(arithmetic25 addcbrhpag addcb addc OP1_1 OP2_7 regb8 uimm8 QI "pag") -(arithmetic25 subcbrhpag subcb subc OP1_3 OP2_7 regb8 uimm8 QI "pag") - -;add/sub register and immediate -(define-pmacro (arithmetic10 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"op2) - (+ opc1 opc2 op1 (f-op-bit1 0) op2) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) -(arithmetic10 addri add add OP1_0 OP2_8 dr uimm3 HI) -(arithmetic10 subri sub sub OP1_2 OP2_8 dr uimm3 HI) -(arithmetic10 addbri addb add OP1_0 OP2_9 drb uimm3 QI) -(arithmetic10 subbri subb sub OP1_2 OP2_9 drb uimm3 QI) - -;add/sub register and immediate -(define-pmacro (arithmetic11 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) -(arithmetic11 addrim add add OP1_0 OP2_6 reg8 uimm16 HI) -(arithmetic11 subrim sub sub OP1_2 OP2_6 reg8 uimm16 HI) - -;add/sub register and immediate -(define-pmacro (arithmetic12 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"op2) - (+ opc1 opc2 op1 op2 (f-op-bit8 0)) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) -(arithmetic12 addbrim addb add OP1_0 OP2_7 regb8 uimm8 QI) -(arithmetic12 subbrim subb sub OP1_2 OP2_7 regb8 uimm8 QI) - -;add/sub register and immediate with carry -(define-pmacro (arithmetic13 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"op2) - (+ opc1 opc2 op1 (f-op-bit1 0) op2) - (set mode op1 (insn1 mode op1 op2 cbit)) - () - ) -) -(arithmetic13 addcri addc addc OP1_1 OP2_8 dr uimm3 HI) -(arithmetic13 subcri subc subc OP1_3 OP2_8 dr uimm3 HI) -(arithmetic13 addcbri addcb addc OP1_1 OP2_9 drb uimm3 QI) -(arithmetic13 subcbri subcb subc OP1_3 OP2_9 drb uimm3 QI) - -;add/sub register and immediate with carry -(define-pmacro (arithmetic14 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 op2 cbit)) - () - ) -) -(arithmetic14 addcrim addc addc OP1_1 OP2_6 reg8 uimm16 HI) -(arithmetic14 subcrim subc subc OP1_3 OP2_6 reg8 uimm16 HI) - -;add/sub register and immediate with carry -(define-pmacro (arithmetic15 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"op2) - (+ opc1 opc2 op1 op2 (f-op-bit8 0)) - (set mode op1 (insn1 mode op1 op2 cbit)) - () - ) -) -(arithmetic15 addcbrim addcb addc OP1_1 OP2_7 regb8 uimm8 QI) -(arithmetic15 subcbrim subcb subc OP1_3 OP2_7 regb8 uimm8 QI) - - -;add/sub registers -(define-pmacro (arithmetic name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) -(arithmetic addr add add OP1_0 OP2_0 dr sr HI) -(arithmetic subr sub sub OP1_2 OP2_0 dr sr HI) -(arithmetic addbr addb add OP1_0 OP2_1 drb srb QI) -(arithmetic subbr subb sub OP1_2 OP2_1 drb srb QI) - -;add/sub register and indirect memory -(define-pmacro (arithmetic1 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",[$"op2"]") - (+ opc1 opc2 op1 (f-op-bit2 2) op2) - (set mode op1 (insn1 mode op1 (mem HI op2))) - () - ) -) -(arithmetic1 add2 add add OP1_0 OP2_8 dr sr2 HI) -(arithmetic1 sub2 sub sub OP1_2 OP2_8 dr sr2 HI) -(arithmetic1 addb2 addb add OP1_0 OP2_9 drb sr2 QI) -(arithmetic1 subb2 subb sub OP1_2 OP2_9 drb sr2 QI) - -;add/sub register and indirect memory post increment -(define-pmacro (arithmetic2 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",[$"op2"+]") - (+ opc1 opc2 op1 (f-op-bit2 3) op2) - (sequence () - (set mode op1 (insn1 mode op1 (mem HI op2))) - (set HI op2 (add HI op2 (const 2))) - ) - () - ) -) -(arithmetic2 add2i add add OP1_0 OP2_8 dr sr2 HI) -(arithmetic2 sub2i sub sub OP1_2 OP2_8 dr sr2 HI) -(arithmetic2 addb2i addb add OP1_0 OP2_9 drb sr2 QI) -(arithmetic2 subb2i subb sub OP1_2 OP2_9 drb sr2 QI) - -;add/sub registers with carry -(define-pmacro (arithmetic3 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 op2 cbit)) - () - ) -) -(arithmetic3 addcr addc addc OP1_1 OP2_0 dr sr HI) -(arithmetic3 subcr subc subc OP1_3 OP2_0 dr sr HI) -(arithmetic3 addbcr addcb addc OP1_1 OP2_1 drb srb QI) -(arithmetic3 subbcr subcb subc OP1_3 OP2_1 drb srb QI) - - -;add/sub register and indirect memory -(define-pmacro (arithmetic4 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",[$"op2"]") - (+ opc1 opc2 op1 (f-op-bit2 2) op2) - (set mode op1 (insn1 mode op1 (mem HI op2) cbit)) - () - ) -) -(arithmetic4 addcr2 addc addc OP1_1 OP2_8 dr sr2 HI) -(arithmetic4 subcr2 subc subc OP1_3 OP2_8 dr sr2 HI) -(arithmetic4 addbcr2 addcb addc OP1_1 OP2_9 drb sr2 QI) -(arithmetic4 subbcr2 subcb subc OP1_3 OP2_9 drb sr2 QI) - -;add/sub register and indirect memory post increment -(define-pmacro (arithmetic5 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",[$"op2"+]") - (+ opc1 opc2 op1 (f-op-bit2 3) op2) - (sequence () - (set mode op1 (insn1 mode op1 (mem HI op2) cbit)) - (set HI op2 (add HI op2 (const 2))) - ) - () - ) -) -(arithmetic5 addcr2i addc addc OP1_1 OP2_8 dr sr2 HI) -(arithmetic5 subcr2i subc subc OP1_3 OP2_8 dr sr2 HI) -(arithmetic5 addbcr2i addcb addc OP1_1 OP2_9 drb sr2 QI) -(arithmetic5 subbcr2i subcb subc OP1_3 OP2_9 drb sr2 QI) - -;add/sub register and direct memory -(define-pmacro (arithmetic6 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) - -;add/sub register and direct memory -(define-pmacro (arithmetic7 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op2 op1) - (set (mem HI op1) (insn1 (mem HI op1) op2)) - () - ) -) -(arithmetic6 addrm2 add add OP1_0 OP2_2 regmem8 memgr8 HI) -(arithmetic7 addrm3 add add OP1_0 OP2_4 memgr8 regmem8 HI) -(arithmetic6 addrm add add OP1_0 OP2_2 reg8 memory HI) -(arithmetic7 addrm1 add add OP1_0 OP2_4 memory reg8 HI) -(arithmetic6 subrm3 sub sub OP1_2 OP2_2 regmem8 memgr8 HI) -(arithmetic7 subrm2 sub sub OP1_2 OP2_4 memgr8 regmem8 HI) -(arithmetic6 subrm1 sub sub OP1_2 OP2_2 reg8 memory HI) -(arithmetic7 subrm sub sub OP1_2 OP2_4 memory reg8 HI) -(arithmetic6 addbrm2 addb add OP1_0 OP2_3 regbmem8 memgr8 QI) -(arithmetic7 addbrm3 addb add OP1_0 OP2_5 memgr8 regbmem8 QI) -(arithmetic6 addbrm addb add OP1_0 OP2_3 regb8 memory QI) -(arithmetic7 addbrm1 addb add OP1_0 OP2_5 memory regb8 QI) -(arithmetic6 subbrm3 subb sub OP1_2 OP2_3 regbmem8 memgr8 QI) -(arithmetic7 subbrm2 subb sub OP1_2 OP2_5 memgr8 regbmem8 QI) -(arithmetic6 subbrm1 subb sub OP1_2 OP2_3 regb8 memory QI) -(arithmetic7 subbrm subb sub OP1_2 OP2_5 memory regb8 QI) - -;add/sub registers with carry -(define-pmacro (arithmetic8 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 op2 cbit)) - () - ) -) - -;add/sub registers with carry -(define-pmacro (arithmetic9 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op2 op1) - (set (mem HI op1) (insn1 (mem HI op1) op2 cbit)) - () - ) -) -(arithmetic8 addcrm2 addc addc OP1_1 OP2_2 regmem8 memgr8 HI) -(arithmetic9 addcrm3 addc addc OP1_1 OP2_4 memgr8 regmem8 HI) -(arithmetic8 addcrm addc addc OP1_1 OP2_2 reg8 memory HI) -(arithmetic9 addcrm1 addc addc OP1_1 OP2_4 memory reg8 HI) -(arithmetic8 subcrm3 subc subc OP1_3 OP2_2 regmem8 memgr8 HI) -(arithmetic9 subcrm2 subc subc OP1_3 OP2_4 memgr8 regmem8 HI) -(arithmetic8 subcrm1 subc subc OP1_3 OP2_2 reg8 memory HI) -(arithmetic9 subcrm subc subc OP1_3 OP2_4 memory reg8 HI) -(arithmetic8 addcbrm2 addcb addc OP1_1 OP2_3 regbmem8 memgr8 QI) -(arithmetic9 addcbrm3 addcb addc OP1_1 OP2_5 memgr8 regbmem8 QI) -(arithmetic8 addcbrm addcb addc OP1_1 OP2_3 regb8 memory QI) -(arithmetic9 addcbrm1 addcb addc OP1_1 OP2_5 memory regb8 QI) -(arithmetic8 subcbrm3 subcb subc OP1_3 OP2_3 regbmem8 memgr8 QI) -(arithmetic9 subcbrm2 subcb subc OP1_3 OP2_5 memgr8 regbmem8 QI) -(arithmetic8 subcbrm1 subcb subc OP1_3 OP2_3 regb8 memory QI) -(arithmetic9 subcbrm subcb subc OP1_3 OP2_5 memory regb8 QI) - -; MUL Rwn,Rwm -(dni muls "signed multiplication" - ((PIPE OS) (IDOC ALU)) - "mul $src1,$src2" - (+ OP1_0 OP2_11 src1 src2) - (reg SI h-md 0) - () -) -; MULU Rwn,Rwm -(dni mulu "unsigned multiplication" - ((PIPE OS) (IDOC ALU)) - "mulu $src1,$src2" - (+ OP1_1 OP2_11 src1 src2) - (reg SI h-md 0) - () -) -; DIV Rwn -(dni div "16-by-16 signed division" - ((PIPE OS) (IDOC ALU)) - "div $srdiv" - (+ OP1_4 OP2_11 srdiv ) - (sequence () - (set HI (reg HI h-cr 6) (div HI (reg HI h-cr 6) srdiv)) - (set HI (reg HI h-cr 7) (mod HI (reg HI h-cr 6) srdiv)) - ) - () -) -; DIVL Rwn -(dni divl "32-by16 signed division" - ((PIPE OS) (IDOC ALU)) - "divl $srdiv" - (+ OP1_6 OP2_11 srdiv ) - (sequence () - (set HI (reg HI h-cr 6) (div SI (reg SI h-md 0) srdiv)) - (set HI (reg HI h-cr 7) (mod SI (reg SI h-md 0) srdiv)) - ) - () -) -; DIVLU Rwn -(dni divlu "32-by16 unsigned division" - ((PIPE OS) (IDOC ALU)) - "divlu $srdiv" - (+ OP1_7 OP2_11 srdiv ) - (sequence () - (set HI (reg HI h-cr 6) (udiv SI (reg SI h-md 0) srdiv)) - (set HI (reg HI h-cr 7) (umod SI (reg SI h-md 0) srdiv)) - ) - () -) -; DIVU Rwn -(dni divu "16-by-16 unsigned division" - ((PIPE OS) (IDOC ALU)) - "divu $srdiv" - (+ OP1_5 OP2_11 srdiv ) - (sequence () - (set HI (reg HI h-cr 6) (udiv HI (reg HI h-cr 6) srdiv)) - (set HI (reg HI h-cr 7) (umod HI (reg HI h-cr 6) srdiv)) - ) - () -) - -;Integer one's complement -; CPL Rwn -(dni cpl "Integer Ones complement" - ((PIPE OS) (IDOC MISC)) - "cpl $dr" - (+ OP1_9 OP2_1 dr (f-op-bit4 0)) - (set dr (inv HI dr)) - () -) - -;Bytes one's complement -; CPLB Rbn -(dni cplb "Byte Ones complement" - ((PIPE OS) (IDOC MISC)) - "cplb $drb" - (+ OP1_11 OP2_1 drb (f-op-bit4 0)) - (set drb (inv QI drb)) - () -) -;Integer two's complement -; NEG Rwn -(dni neg "Integer two's complement" - ((PIPE OS) (IDOC MISC)) - "neg $dr" - (+ OP1_8 OP2_1 dr (f-op-bit4 0)) - (set dr (neg HI dr)) - () -) -;Bytes two's complement -; NEGB Rbn -(dni negb "byte twos complement" - ((PIPE OS) (IDOC MISC)) - "negb $drb" - (+ OP1_10 OP2_1 drb (f-op-bit4 0)) - (set drb (neg QI drb)) - () -) - -;**************************************************************** -;logical insn -;**************************************************************** -;and/or/xor registers -(define-pmacro (logical name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "logical" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) - -(logical andr and and OP1_6 OP2_0 dr sr HI) -(logical orr or or OP1_7 OP2_0 dr sr HI) -(logical xorr xor xor OP1_5 OP2_0 dr sr HI) -(logical andbr andb and OP1_6 OP2_1 drb srb QI) -(logical orbr orb or OP1_7 OP2_1 drb srb QI) -(logical xorbr xorb xor OP1_5 OP2_1 drb srb QI) - -;and/or/xor register and immediate -(define-pmacro (logical1 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "logical" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"op2) - (+ opc1 opc2 op1 (f-op-bit1 0) op2) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) -(logical1 andri and and OP1_6 OP2_8 dr uimm3 HI) -(logical1 orri or or OP1_7 OP2_8 dr uimm3 HI) -(logical1 xorri xor xor OP1_5 OP2_8 dr uimm3 HI) -(logical1 andbri andb and OP1_6 OP2_9 drb uimm3 QI) -(logical1 orbri orb or OP1_7 OP2_9 drb uimm3 QI) -(logical1 xorbri xorb xor OP1_5 OP2_9 drb uimm3 QI) - -;and/or/xor register and immediate -(define-pmacro (logical2 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "logical" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) -(logical2 andrim and and OP1_6 OP2_6 reg8 uimm16 HI) -(logical2 orrim or or OP1_7 OP2_6 reg8 uimm16 HI) -(logical2 xorrim xor xor OP1_5 OP2_6 reg8 uimm16 HI) - -;and/or/xor register and immediate -(define-pmacro (logical3 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "logical" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"op2) - (+ opc1 opc2 op1 op2 (f-op-bit8 0)) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) -(logical3 andbrim andb and OP1_6 OP2_7 regb8 uimm8 QI) -(logical3 orbrim orb or OP1_7 OP2_7 regb8 uimm8 QI) -(logical3 xorbrim xorb xor OP1_5 OP2_7 regb8 uimm8 QI) - -;and/or/xor register and indirect memory -(define-pmacro (logical4 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "logical" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",[$"op2"]") - (+ opc1 opc2 op1 (f-op-bit2 2) op2) - (set mode op1 (insn1 mode op1 (mem HI op2))) - () - ) -) -(logical4 and2 and and OP1_6 OP2_8 dr sr2 HI) -(logical4 or2 or or OP1_7 OP2_8 dr sr2 HI) -(logical4 xor2 xor xor OP1_5 OP2_8 dr sr2 HI) -(logical4 andb2 andb and OP1_6 OP2_9 drb sr2 QI) -(logical4 orb2 orb or OP1_7 OP2_9 drb sr2 QI) -(logical4 xorb2 xorb xor OP1_5 OP2_9 drb sr2 QI) - -;and/or/xor register and indirect memory post increment -(define-pmacro (logical5 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "logical" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",[$"op2"+]") - (+ opc1 opc2 op1 (f-op-bit2 3) op2) - (sequence () - (set mode op1 (insn1 mode op1 (mem HI op2))) - (set HI op2 (add HI op2 (const 2))) - ) - () - ) -) -(logical5 and2i and and OP1_6 OP2_8 dr sr2 HI) -(logical5 or2i or or OP1_7 OP2_8 dr sr2 HI) -(logical5 xor2i xor xor OP1_5 OP2_8 dr sr2 HI) -(logical5 andb2i andb and OP1_6 OP2_9 drb sr2 QI) -(logical5 orb2i orb or OP1_7 OP2_9 drb sr2 QI) -(logical5 xorb2i xorb xor OP1_5 OP2_9 drb sr2 QI) - -;add/sub register and immediate -(define-pmacro (logical7 name insn insn1 opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"dir"$"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (set (mem HI op1) (insn1 (mem HI op1) op2 )) - () - ) -) -(logical7 andpofr and and OP1_6 OP2_2 reg8 upof16 HI "pof") -(logical7 orpofr or or OP1_7 OP2_2 reg8 upof16 HI "pof") -(logical7 xorpofr xor xor OP1_5 OP2_2 reg8 upof16 HI "pof") -(logical7 andbpofr andb and OP1_6 OP2_3 regb8 upof16 QI "pof") -(logical7 orbpofr orb or OP1_7 OP2_3 regb8 upof16 QI "pof") -(logical7 xorbpofr xorb xor OP1_5 OP2_3 regb8 upof16 QI "pof") - -;add/sub register and immediate -(define-pmacro (logical8 name insn insn1 opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"dir"$"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (set (mem HI op1) (insn1 (mem HI op1) op2 )) - () - ) -) -(logical8 andrpofr and and OP1_6 OP2_4 upof16 reg8 HI "pof") -(logical8 orrpofr or or OP1_7 OP2_4 upof16 reg8 HI "pof") -(logical8 xorrpofr xor xor OP1_5 OP2_4 upof16 reg8 HI "pof") -(logical8 andbrpofr andb and OP1_6 OP2_5 upof16 regb8 QI "pof") -(logical8 orbrpofr orb or OP1_7 OP2_5 upof16 regb8 QI "pof") -(logical8 xorbrpofr xorb xor OP1_5 OP2_5 upof16 regb8 QI "pof") - -;and/or/xor register and direct memory -(define-pmacro (logical6 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) - -;and/or/xor register and direct memory -(define-pmacro (logical7 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "arithmetic" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op2 op1) - (set (mem HI op1) (insn1 (mem HI op1) op2)) - () - ) -) -(logical6 andrm2 and and OP1_6 OP2_2 regmem8 memgr8 HI) -(logical7 andrm3 and and OP1_6 OP2_4 memgr8 regmem8 HI) -(logical6 andrm and and OP1_6 OP2_2 reg8 memory HI) -(logical7 andrm1 and and OP1_6 OP2_4 memory reg8 HI) -(logical6 orrm3 or or OP1_7 OP2_2 regmem8 memgr8 HI) -(logical7 orrm2 or or OP1_7 OP2_4 memgr8 regmem8 HI) -(logical6 orrm1 or or OP1_7 OP2_2 reg8 memory HI) -(logical7 orrm or or OP1_7 OP2_4 memory reg8 HI) -(logical6 xorrm3 xor xor OP1_5 OP2_2 regmem8 memgr8 HI) -(logical7 xorrm2 xor xor OP1_5 OP2_4 memgr8 regmem8 HI) -(logical6 xorrm1 xor xor OP1_5 OP2_2 reg8 memory HI) -(logical7 xorrm xor xor OP1_5 OP2_4 memory reg8 HI) -(logical6 andbrm2 andb and OP1_6 OP2_3 regbmem8 memgr8 QI) -(logical7 andbrm3 andb and OP1_6 OP2_5 memgr8 regbmem8 QI) -(logical6 andbrm andb and OP1_6 OP2_3 regb8 memory QI) -(logical7 andbrm1 andb and OP1_6 OP2_5 memory regb8 QI) -(logical6 orbrm3 orb or OP1_7 OP2_3 regbmem8 memgr8 QI) -(logical7 orbrm2 orb or OP1_7 OP2_5 memgr8 regbmem8 QI) -(logical6 orbrm1 orb or OP1_7 OP2_3 regb8 memory QI) -(logical7 orbrm orb or OP1_7 OP2_5 memory regb8 QI) -(logical6 xorbrm3 xorb xor OP1_5 OP2_3 regbmem8 memgr8 QI) -(logical7 xorbrm2 xorb xor OP1_5 OP2_5 memgr8 regbmem8 QI) -(logical6 xorbrm1 xorb xor OP1_5 OP2_3 regb8 memory QI) -(logical7 xorbrm xorb xor OP1_5 OP2_5 memory regb8 QI) - -;**************************************************************** -;logical insn -;**************************************************************** -;mov registers -(define-pmacro (move name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "mov registers" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 op2) - () - ) -) -(move movr mov OP1_15 OP2_0 dr sr HI) -(move movrb movb OP1_15 OP2_1 drb srb HI) - -;mov register and immediate -(define-pmacro (move1 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op1 ",$hash$"op2) - (+ opc1 opc2 op2 op1) - (set mode op1 op2) - () - ) -) -(move1 movri mov OP1_14 OP2_0 dri u4 HI) -(move1 movbri movb OP1_14 OP2_1 srb u4 QI) - -; MOV Rwn,#data16 -(dni movi "move immediate to register" - ((PIPE OS) (IDOC MOVE)) - "mov $reg8,$hash$uimm16" - (+ OP1_14 OP2_6 reg8 uimm16) - (set HI reg8 uimm16) - () -) - -; MOVB reg,#data8 -(dni movbi "move immediate to register" - ((PIPE OS) (IDOC MOVE)) - "movb $regb8,$hash$uimm8" - (+ OP1_14 OP2_7 regb8 uimm8 (f-op-bit8 0)) - (set QI regb8 uimm8) - () -) - -;move and indirect memory -(define-pmacro (mov2 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op1 ",[$"op2"]") - (+ opc1 opc2 op1 op2) - (set mode op1 (mem HI op2)) - () - ) -) -(mov2 movr2 mov OP1_10 OP2_8 dr sr HI) -(mov2 movbr2 movb OP1_10 OP2_9 drb sr QI) - -;move and indirect memory -(define-pmacro (mov3 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " [$"op2 "],$"op1) - (+ opc1 opc2 op1 op2) - (set mode op1 (mem HI op2)) - () - ) -) -(mov3 movri2 mov OP1_11 OP2_8 dr sr HI) -(mov3 movbri2 movb OP1_11 OP2_9 drb sr QI) - -;move and indirect memory -(define-pmacro (mov4 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " [-$"op2 "],$"op1) - (+ opc1 opc2 op1 op2) - (sequence HI () - (set op1 (sub op2 (const HI 2))) - (set HI (mem HI op2) op1) - ) - () - ) -) -(mov4 movri3 mov OP1_8 OP2_8 dr sr HI) -(mov4 movbri3 movb OP1_8 OP2_9 drb sr QI) - -;mov register and indirect memory post increment -(define-pmacro (mov5 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op1 ",[$"op2"+]") - (+ opc1 opc2 op1 op2) - (sequence () - (set mode op1 (mem HI op2)) - (set HI op2 (add HI op2 (const 2))) - ) - () - ) -) -(mov5 mov2i mov OP1_9 OP2_8 dr sr HI) -(mov5 movb2i movb OP1_9 OP2_9 drb sr HI) - -;mov indirect memory -(define-pmacro (mov6 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " [$"op1 "],[$"op2"]") - (+ opc1 opc2 op1 op2) - (set HI (mem HI op1) (mem HI op2)) - () - ) -) -(mov6 mov6i mov OP1_12 OP2_8 dr sr HI) -(mov6 movb6i movb OP1_12 OP2_9 dr sr HI) - -;mov indirect memory -(define-pmacro (mov7 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " [$"op1 "+],[$"op2"]") - (+ opc1 opc2 op1 op2) - (sequence () - (set mode (mem mode op1) (mem mode op2)) - (set mode op1 (add mode op1 (const mode 2))) - ) - () - ) -) -(mov7 mov7i mov OP1_13 OP2_8 dr sr HI) -(mov7 movb7i movb OP1_13 OP2_9 dr sr HI) - -;mov indirect memory -(define-pmacro (mov8 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " [$"op1 "],[$"op2"+]") - (+ opc1 opc2 op1 op2) - (sequence () - (set mode (mem mode op1) (mem mode op2)) - (set mode op2 (add mode op2 (const mode 2))) - ) - () - ) -) -(mov8 mov8i mov OP1_14 OP2_8 dr sr HI) -(mov8 movb8i movb OP1_14 OP2_9 dr sr HI) - -;mov indirect memory -(define-pmacro (mov9 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op1 ",[$"op2"+$hash$"uimm16"]") - (+ opc1 opc2 op1 op2 uimm16) - (sequence mode ((mode tmp1)) - (set mode tmp1 (add HI op2 uimm16)) - (set mode op1 (mem HI tmp1)) - ) - () - ) -) -(mov9 mov9i mov OP1_13 OP2_4 dr sr HI) -(mov9 movb9i movb OP1_15 OP2_4 drb sr QI) - -;mov indirect memory -(define-pmacro (mov10 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " [$"op2"+$hash$"uimm16 "],$"op1) - (+ opc1 opc2 op1 op2 uimm16) - (sequence mode ((mode tmp1)) - (set mode tmp1 (add HI op1 uimm16)) - (set mode (mem HI tmp1) op1) - ) - () - ) -) -(mov10 mov10i mov OP1_12 OP2_4 dr sr HI) -(mov10 movb10i movb OP1_14 OP2_4 drb sr QI) - -;move and indirect memory -(define-pmacro (mov11 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " [$"op1 "],$"op2) - (+ opc1 opc2 (f-op-lbit4 0) op1 op2) - (set (mem mode op1) (mem HI op2)) - () - ) -) -(mov11 movri11 mov OP1_8 OP2_4 src2 memory HI) -(mov11 movbri11 movb OP1_10 OP2_4 src2 memory HI) - -;move and indirect memory -(define-pmacro (mov12 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op2 ",[$"op1"]") - (+ opc1 opc2 (f-op-lbit4 0) op1 op2) - (set (mem HI op2) (mem mode op1)) - () - ) -) -(mov12 movri12 mov OP1_9 OP2_4 src2 memory HI) -(mov12 movbri12 movb OP1_11 OP2_4 src2 memory HI) - -(define-pmacro (movemem3 name insn opc1 opc2 op1 op2 dir) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op1 ",$hash$"dir"$"op2) - (+ opc1 opc2 op1 op2) - (set HI op1 op2) - () - ) -) -(movemem3 movehm5 mov OP1_14 OP2_6 regoff8 upof16 "pof") -(movemem3 movehm6 mov OP1_14 OP2_6 regoff8 upag16 "pag") -(movemem3 movehm7 mov OP1_14 OP2_6 regoff8 useg16 "segm") -(movemem3 movehm8 mov OP1_14 OP2_6 regoff8 usof16 "sof") - -(define-pmacro (movemem4 name insn opc1 opc2 op1 op2 dir) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op1 ",$hash$"dir"$"op2) - (+ opc1 opc2 op1 op2 (f-op-bit8 0)) - (set QI op1 op2) - () - ) -) -(movemem4 movehm9 movb OP1_14 OP2_7 regb8 uimm8 "pof") -(movemem4 movehm10 movb OP1_14 OP2_7 regoff8 uimm8 "pag") - -(define-pmacro (movemem name insn opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op1 ",$"dir"$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (mem HI op2)) - () - ) -) -(movemem movrmp mov OP1_15 OP2_2 regoff8 upof16 HI "pof") -(movemem movrmp1 movb OP1_15 OP2_3 regb8 upof16 QI "pof") -(movemem movrmp2 mov OP1_15 OP2_2 regoff8 upag16 HI "pag") -(movemem movrmp3 movb OP1_15 OP2_3 regb8 upag16 QI "pag") - -(define-pmacro (movemem1 name insn opc1 opc2 op1 op2 dir) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"dir"$"op1 ",$"op2) - (+ opc1 opc2 op2 op1) - (set (mem HI op1) op2 ) - () - ) -) -(movemem1 movrmp4 mov OP1_15 OP2_6 upof16 regoff8 "pof") -(movemem1 movrmp5 movb OP1_15 OP2_7 upof16 regb8 "pof") - -(define-pmacro (movemem2 name insn opc1 opc2 op1 op2 mode dir) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op1 ",$hash$"dir"$"op2) - (+ opc1 opc2 op2 op1) - (set mode op1 op2) - () - ) -) -(movemem2 movehm1 mov OP1_14 OP2_0 dri u4 HI "pof") -(movemem2 movehm2 movb OP1_14 OP2_1 srb u4 QI "pof") -(movemem2 movehm3 mov OP1_14 OP2_0 dri u4 HI "pag") -(movemem2 movehm4 movb OP1_14 OP2_1 srb u4 QI "pag") - -;move register and direct memory -(define-pmacro (move12 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (mem HI op2)) - () - ) -) - -;move register and direct memory -(define-pmacro (move13 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op2 op1) - (set (mem HI op1) op2) - () - ) -) -(move12 mve12 mov OP1_15 OP2_2 regmem8 memgr8 HI) -(move13 mve13 mov OP1_15 OP2_6 memgr8 regmem8 HI) -(move12 mover12 mov OP1_15 OP2_2 reg8 memory HI) -(move13 mvr13 mov OP1_15 OP2_6 memory reg8 HI) -(move12 mver12 movb OP1_15 OP2_3 regbmem8 memgr8 QI) -(move13 mver13 movb OP1_15 OP2_7 memgr8 regbmem8 QI) -(move12 movr12 movb OP1_15 OP2_3 regb8 memory QI) -(move13 movr13 movb OP1_15 OP2_7 memory regb8 QI) - -; MOVBS Rw,Rb -(dni movbsrr "mov byte register with sign extension to word register" - ((PIPE OS) (IDOC MOVE)) - "movbs $sr,$drb" - (+ OP1_13 OP2_0 drb sr) - (sequence () - (if QI (and QI drb (const 128)) - (set HI sr (or HI (const HI 65280) drb))) - (set HI sr (and HI (const HI 255) drb)) - ) - () -) - -; MOVBZ Rw,Rb -(dni movbzrr "mov byte register with zero extension to word register" - ((PIPE OS) (IDOC MOVE)) - "movbz $sr,$drb" - (+ OP1_12 OP2_0 drb sr) - (set HI sr (and HI (const HI 255) drb)) - () -) - -; MOVBS reg,POF mem -(dni movbsrpofm "mov memory to byte register" - ((PIPE OS) (IDOC MOVE)) - "movbs $regmem8,$pof$upof16" - (+ OP1_13 OP2_2 regmem8 upof16) - (set QI regmem8 (mem HI upof16)) - () -) - -; MOVBS pof,reg -(dni movbspofmr "mov memory to byte register" - ((PIPE OS) (IDOC MOVE)) - "movbs $pof$upof16,$regbmem8" - (+ OP1_13 OP2_5 upof16 regbmem8 ) - (set QI (mem HI upof16) regbmem8) - () -) - -; MOVBZ reg,POF mem -(dni movbzrpofm "mov memory to byte register" - ((PIPE OS) (IDOC MOVE)) - "movbz $reg8,$pof$upof16" - (+ OP1_12 OP2_2 reg8 upof16) - (set QI reg8 (mem HI upof16)) - () -) - -; MOVBZ pof,reg -(dni movbzpofmr "mov memory to byte register" - ((PIPE OS) (IDOC MOVE)) - "movbz $pof$upof16,$regb8" - (+ OP1_12 OP2_5 upof16 regb8 ) - (set QI (mem HI upof16) regb8) - () -) - -;move register and direct memory -(define-pmacro (move14 name insn opc1 opc2 op1 op2 ) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (set HI op1 (and HI (const HI 255) (mem QI op2))) - () - ) -) - -;move register and direct memory -(define-pmacro (move15 name insn opc1 opc2 op1 op2 ) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op2 op1) - (set HI (mem HI op1) (and HI (const HI 255) op2)) - () - ) -) -(move14 movebs14 movbs OP1_13 OP2_2 regmem8 memgr8 ) -(move15 movebs15 movbs OP1_13 OP2_5 memgr8 regbmem8 ) -(move14 moverbs14 movbs OP1_13 OP2_2 reg8 memory ) -(move15 movrbs15 movbs OP1_13 OP2_5 memory regb8 ) -(move14 movebz14 movbz OP1_12 OP2_2 regmem8 memgr8 ) -(move15 movebz15 movbz OP1_12 OP2_5 memgr8 regbmem8 ) -(move14 moverbz14 movbz OP1_12 OP2_2 reg8 memory ) -(move15 movrbz15 movbz OP1_12 OP2_5 memory regb8 ) - - -;mov registers -(define-pmacro (moveb1 name insn opc1 opc2 op1 op2) - (dni name - (.str name "move" ) - ((PIPE OS) (IDOC MOVE)) - (.str insn " $"op2 ",$"op1) - (+ opc1 opc2 op1 op2) - (sequence () - (if QI (and QI op1 (const 128)) - (set HI op2 (or HI (const HI 65280) op1))) - (set HI op2 (and HI (const HI 255) op1)) - ) - () - ) -) -(moveb1 movrbs movbs OP1_13 OP2_0 drb sr ) -(moveb1 movrbz movbz OP1_12 OP2_0 drb sr ) - - - -;jump and call insns -;****************************************************************** -;Absolute conditional jump -(define-pmacro (jmpabs name insn) - (dni name - (.str name "Absolute conditional jump" ) - ((PIPE OS) (IDOC JMP)) - (.str insn " $extcond,$caddr") - (+ OP1_14 OP2_10 extcond (f-op-bitone 0) bitone bit01 caddr) - (sequence ((HI tmp1) (HI tmp2)) - (set tmp1 (mem HI caddr)) - (set tmp2 (sub HI pc (mem HI caddr))) - (if (gt tmp2 (const 0)) (lt tmp2 (const 32)) (eq tmp2 (const 32)) - (set bitone (const 1))) - (if (lt tmp2 (const 0)) (eq tmp2 (const 0)) (gt tmp2 (const 32)) - (set bitone (const 0))) - (if (eq extcond (const 1) (ne extcond cc_Z)) - (set bit01 (const 0)) - (set HI pc (mem HI caddr))) - (if (ne extcond (const 1) (eq extcond cc_Z)) - (set bit01 (const 1)) - (set HI pc (add HI pc (const 2)))) - ) - () - ) -) - -(jmpabs jmpa0 jmpa+) -(jmpabs jmpa1 jmpa) - -; JMPA- cc,caddr -(dni jmpa- "Absolute conditional jump" - (COND-CTI (PIPE OS) (IDOC JMP)) - "jmpa- $extcond,$caddr" - (+ OP1_14 OP2_10 extcond (f-op-bitone 0) bitone (f-op-1bit 1) caddr) - (sequence ((HI tmp1) (HI tmp2)) - (set tmp1 (mem HI caddr)) - (set tmp2 (sub HI pc (mem HI caddr))) - (if (gt tmp2 (const 0)) (lt tmp2 (const 32)) (eq tmp2 (const 32)) - (set bitone (const 1))) - (if (lt tmp2 (const 0)) (eq tmp2 (const 0)) (gt tmp2 (const 32)) - (set bitone (const 0))) - (set HI pc (add HI pc (const 2))) - ) - () -) - -; JMPI cc,[Rwn] -(dni jmpi "Indirect conditional jump" - (COND-CTI (PIPE OS) (IDOC JMP)) - "jmpi $icond,[$sr]" - (+ OP1_9 OP2_12 icond sr) - (sequence () - (if (eq icond (const 1)) - (set HI pc (mem HI sr))) - (set HI pc (add HI pc (const 2))) - ) - () -) - -(define-pmacro (jmprel name insn opc1) - (dni name - (.str name "conditional" ) - (COND-CTI (PIPE OS) (IDOC JMP)) - (.str insn " $cond,$rel") - (+ opc1 OP2_13 rel) - (sequence () - (if (eq cond (const 1)) - (sequence () - (if QI (lt QI rel (const 0)) - (sequence () - (neg QI rel) - (add QI rel (const 1)) - (mul QI rel (const 2)) - (set HI pc (sub HI pc rel)) - )) - (set HI pc (add HI pc (mul QI rel (const 2)))) - ) - ) - (set HI pc pc) - ) - () - ) -) - -(jmprel jmpr_nenz jmpr COND_NE_NZ ) -(jmprel jmpr_sgt jmpr COND_SGT ) -(jmprel jmpr_z jmpr COND_Z ) -(jmprel jmpr_v jmpr COND_V ) -(jmprel jmpr_nv jmpr COND_NV ) -(jmprel jmpr_n jmpr COND_N ) -(jmprel jmpr_nn jmpr COND_NN ) -(jmprel jmpr_c jmpr COND_C ) -(jmprel jmpr_nc jmpr COND_NC ) -(jmprel jmpr_eq jmpr COND_EQ ) -(jmprel jmpr_ne jmpr COND_NE ) -(jmprel jmpr_ult jmpr COND_ULT ) -(jmprel jmpr_ule jmpr COND_ULE ) -(jmprel jmpr_uge jmpr COND_UGE ) -(jmprel jmpr_ugt jmpr COND_UGT ) -(jmprel jmpr_sle jmpr COND_SLE ) -(jmprel jmpr_sge jmpr COND_SGE ) -(jmprel jmpr_net jmpr COND_NET ) -(jmprel jmpr_uc jmpr COND_UC ) -(jmprel jmpr_slt jmpr COND_SLT ) - - - - -; JMPS seg,caddr -(dni jmpseg "absolute inter-segment jump" - (UNCOND-CTI(PIPE OS) (IDOC JMP)) - "jmps $hash$segm$useg8,$hash$sof$usof16" - (+ OP1_15 OP2_10 seg usof16) - (sequence () - (if QI (eq BI sgtdisbit (const BI 0)) - (set QI (reg h-cr 10) useg8)) - (nop) - (set HI pc usof16) - ) - () -) - -; JMPS seg,caddr -(dni jmps "absolute inter-segment jump" - (UNCOND-CTI(PIPE OS) (IDOC JMP)) - "jmps $seg,$caddr" - (+ OP1_15 OP2_10 seg caddr) - (sequence () - (if QI (eq BI sgtdisbit (const BI 0)) - (set QI (reg h-cr 10) seg)) - (nop) - (set HI pc caddr) - ) - () -) - - -;relative jump if bit set -;JB bitaddrQ.q,rel -(dni jb "relative jump if bit set" - ((PIPE OS) (IDOC JMP)) - "jb $genreg$dot$qlobit,$relhi" - (+ OP1_8 OP2_10 genreg relhi qlobit (f-qhibit 0)) - (sequence ((HI tmp1) (HI tmp2)) - (set HI tmp1 genreg) - (set HI tmp2 (const 1)) - (sll HI tmp2 qlobit) - (set HI tmp2 (and tmp1 tmp2)) - (if (eq tmp2 (const 1)) - (sequence () - (if QI (lt QI relhi (const 0)) - (set HI pc (add HI pc (mul QI relhi (const 2))))) - )) - (set HI pc (add HI pc (const 4))) - ) - () -) - -;relative jump if bit set and clear bit -;JBC bitaddrQ.q,rel -(dni jbc "relative jump if bit set and clear bit" - ((PIPE OS) (IDOC JMP)) - "jbc $genreg$dot$qlobit,$relhi" - (+ OP1_10 OP2_10 genreg relhi qlobit (f-qhibit 0)) - (sequence ((HI tmp1) (HI tmp2)) - (set HI tmp1 genreg) - (set HI tmp2 (const 1)) - (sll HI tmp2 qlobit) - (set HI tmp2 (and tmp1 tmp2)) - (if (eq tmp2 (const 1)) - (sequence () - (if QI (lt QI relhi (const 0)) - (set tmp2 (const 1)) - (set tmp1 genreg) - (sll tmp2 qlobit) - (inv tmp2) - (set HI tmp1(and tmp1 tmp2)) - (set HI genreg tmp1) - (set HI pc (add HI pc (mul QI relhi (const 2))))) - )) - (set HI pc (add HI pc (const 4))) - ) - () -) - -;relative jump if bit set -;JNB bitaddrQ.q,rel -(dni jnb "relative jump if bit not set" - ((PIPE OS) (IDOC JMP)) - "jnb $genreg$dot$qlobit,$relhi" - (+ OP1_9 OP2_10 genreg relhi qlobit (f-qhibit 0)) - (sequence ((HI tmp1) (HI tmp2)) - (set HI tmp1 genreg) - (set HI tmp2 (const 1)) - (sll HI tmp2 qlobit) - (set HI tmp2 (and tmp1 tmp2)) - (if (eq tmp2 (const 0)) - (sequence () - (if QI (lt QI relhi (const 0)) - (set HI pc (add HI pc (mul QI relhi (const 2))))) - )) - (set HI pc (add HI pc (const 4))) - ) - () -) - -;relative jump if bit not set and set bit -;JNBS bitaddrQ.q,rel -(dni jnbs "relative jump if bit not set and set bit" - ((PIPE OS) (IDOC JMP)) - "jnbs $genreg$dot$qlobit,$relhi" - (+ OP1_11 OP2_10 genreg relhi qlobit (f-qhibit 0)) - (sequence ((HI tmp1) (HI tmp2)) - (set HI tmp1 genreg) - (set HI tmp2 (const 1)) - (sll HI tmp2 qlobit) - (set HI tmp2 (and tmp1 tmp2)) - (if (eq tmp2 (const 0)) - (sequence () - (if QI (lt QI relhi (const 0)) - (set tmp2 (const 1)) - (set tmp1 reg8) - (sll tmp2 qbit) - (set BI tmp1(or tmp1 tmp2)) - (set HI reg8 tmp1) - (set HI pc (add HI pc (mul QI relhi (const 2))))) - )) - (set HI pc (add HI pc (const 4))) - ) - () -) - - -;Absolute conditional call -(define-pmacro (callabs name insn) - (dni name - (.str name "Absolute conditional call" ) - ((PIPE OS) (IDOC JMP)) - (.str insn " $extcond,$caddr") - (+ OP1_12 OP2_10 extcond (f-op-2bit 0) bit01 caddr) - (sequence () - (if (eq extcond (const 1)) - (set bit01 (const 0)) - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) pc) - (set HI pc (mem HI caddr))) - (if (ne extcond (const 1)) - (set bit01 (const 1)) - (set HI pc (add HI pc (const 2)))) - ) - () - ) -) - -(callabs calla0 calla+) -(callabs calla1 calla) - -; CALLA- cc,caddr -(dni calla- "Absolute conditional call" - (COND-CTI (PIPE OS) (IDOC JMP)) - "calla- $extcond,$caddr" - (+ OP1_12 OP2_10 extcond (f-op-bit3 1) caddr) - (sequence () - (if (eq extcond (const 1)) - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) pc) - (set HI pc (mem HI caddr))) - (set HI pc (add HI pc (const 2))) - ) - () -) - -; CALLI cc,[Rwn] -(dni calli "indirect subroutine call" - (COND-CTI (PIPE OS) (IDOC JMP)) - "calli $icond,[$sr]" - (+ OP1_10 OP2_11 icond sr) - (sequence () - (if (eq icond (const 1)) - (sequence () - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) pc) - (set HI pc (mem HI sr)) - ) - ) - (set HI pc (add HI pc (const 2))) - ) - () -) - -; CALLR rel -(dni callr "Call subroutine with PC relative signed 8 bit offset" - ( COND-CTI (PIPE OS) (IDOC JMP)) - "callr $rel" - (+ OP1_11 OP2_11 rel) - (sequence () - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) pc) - (sequence () - (if QI (lt QI rel (const 0)) - (sequence () - (neg QI rel) - (add QI rel (const 1)) - (mul QI rel (const 2)) - (set HI pc (sub HI pc rel)) - )) - (set HI pc (add HI pc (mul QI rel (const 2)))) - ) - ) - () -) - - -; CALLS seg,caddr -(dni callseg "call inter-segment subroutine" - (UNCOND-CTI (PIPE OS) (IDOC JMP)) - "calls $hash$segm$useg8,$hash$sof$usof16" - (+ OP1_13 OP2_10 useg8 usof16) - (sequence () - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) (reg h-cr 10)) - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) pc) - (if QI (eq BI sgtdisbit (const BI 0)) - (set QI (reg h-cr 10) useg8)) - (nop) - (set HI pc usof16) - ) - () -) - -; CALLS seg,caddr -(dni calls "call inter-segment subroutine" - (UNCOND-CTI (PIPE OS) (IDOC JMP)) - "calls $seg,$caddr" - (+ OP1_13 OP2_10 seg caddr) - (sequence () - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) (reg h-cr 10)) - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) pc) - (if QI (eq BI sgtdisbit (const BI 0)) - (set QI (reg h-cr 10) seg)) - (nop) - (set HI pc caddr) - ) - () -) - -; PCALL reg,caddr -(dni pcall "push word and call absolute subroutine" - (UNCOND-CTI (PIPE OS) (IDOC JMP)) - "pcall $reg8,$caddr" - (+ OP1_14 OP2_2 reg8 caddr) - (sequence ((HI tmp1)) - (set HI tmp1 reg8) - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) tmp1) - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) pc) - (set HI pc caddr) - ) - () -) - -; TRAP #uimm7 -(dni trap "software trap" - (UNCOND-CTI (PIPE OS) (IDOC JMP)) - "trap $hash$uimm7" - (+ OP1_9 OP2_11 uimm7 (f-op-1bit 0)) - (sequence () - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) (reg h-cr 4)) - (if QI (eq BI sgtdisbit (const BI 0)) - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) (reg h-cr 10) ) - ) - (nop) - (set HI (reg h-cr 10) (reg h-cr 11)) - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) pc) - (set HI pc (mul QI uimm7 (const 4))) - ) - () -) - -;Return insns -; RET -(dni ret "return from subroutine" - (UNCOND-CTI (PIPE OS) (IDOC JMP)) - "ret" - (+ OP1_12 OP2_11 (f-op-bit8 0)) - (sequence () - (set HI pc (mem HI (reg h-cr 9))) - (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) - ) - () -) - -; RETS -(dni rets "return from inter-segment sunroutine" - (UNCOND-CTI (PIPE OS) (IDOC JMP)) - "rets" - (+ OP1_13 OP2_11 (f-op-bit8 0)) - (sequence () - (set HI pc (mem HI (reg h-cr 9))) - (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) - (if QI (eq BI sgtdisbit (const BI 0)) - (set HI (reg h-cr 10) (mem HI (reg h-cr 9))) - ) - (nop) - (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) - ) - () -) - -; RETP reg -(dni retp "return from subroutine and pop word register" - (UNCOND-CTI (PIPE OS) (IDOC JMP)) - "retp $reg8" - (+ OP1_14 OP2_11 reg8) - (sequence ((HI tmp1)) - (set HI pc (mem HI (reg h-cr 9))) - (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) - (set HI tmp1 (mem HI (reg h-cr 9))) - (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) - (set HI reg8 tmp1) - ) - () -) - -; RETI -(dni reti "return from ISR" - (UNCOND-CTI (PIPE OS) (IDOC JMP)) - "reti" - (+ OP1_15 OP2_11 (f-op-lbit4 8) (f-op-bit4 8)) - (sequence () - (set HI pc (mem HI (reg h-cr 9))) - (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) - (if QI (eq BI sgtdisbit (const BI 0)) - (sequence () - (set HI (reg h-cr 10) (mem HI (reg h-cr 9))) - (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) - ) - ) - (nop) - (set HI (reg h-cr 4) (mem HI (reg h-cr 9))) - (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) - ) - () -) - -;stack operation insn -;****************************************************************** -; POP reg -(dni pop "restore register from system stack" - ((PIPE OS) (IDOC MISC)) - "pop $reg8" - (+ OP1_15 OP2_12 reg8) - (sequence ((HI tmp1)) - (set HI tmp1 (mem HI (reg h-cr 9))) - (set (reg h-cr 9) (add HI (reg h-cr 9) (const 2))) - (set HI reg8 tmp1) - ) - () -) - -; PUSH reg -(dni push "save register on system stack" - ((PIPE OS) (IDOC MISC)) - "push $reg8" - (+ OP1_14 OP2_12 reg8) - (sequence ((HI tmp1)) - (set HI tmp1 reg8) - (set (reg h-cr 9) (sub HI (reg h-cr 9) (const 2))) - (set HI (mem HI (reg h-cr 9)) tmp1) - ) - () -) - -;context switching insns -; SCXT reg,#data16 -(dni scxti "Push word register on stack and update same with immediate data" - ((PIPE OS) (IDOC MISC)) - "scxt $reg8,$hash$uimm16" - (+ OP1_12 OP2_6 reg8 uimm16) - (sequence ((HI tmp1) (HI tmp2)) - (set HI tmp1 reg8) - (set HI tmp2 uimm16) - (sub HI (reg HI h-cr 9) (const 2)) - (set HI (reg HI h-cr 9) tmp1) - (set HI reg8 tmp2) - ) - () -) - -; SCXT reg,POF mem -(dni scxtrpofm "mov memory to byte register" - ((PIPE OS) (IDOC MOVE)) - "scxt $reg8,$pof$upof16" - (+ OP1_13 OP2_6 reg8 upof16) - (set QI reg8 (mem HI upof16)) - () -) - -; SCXT regmem8,memgr8 -(dni scxtmg "Push word register on stack and update same with direct memory" - ((PIPE OS) (IDOC MISC)) - "scxt $regmem8,$memgr8" - (+ OP1_13 OP2_6 regmem8 memgr8) - (sequence ((HI tmp1) (HI tmp2)) - (set HI tmp1 regmem8) - (set HI tmp2 memgr8) - (sub HI (reg HI h-cr 9) (const 2)) - (set HI (reg HI h-cr 9) tmp1) - (set HI regmem8 tmp2) - ) - () -) - -; SCXT reg,mem -(dni scxtm "Push word register on stack and update same with direct memory" - ((PIPE OS) (IDOC MISC)) - "scxt $reg8,$memory" - (+ OP1_13 OP2_6 reg8 memory) - (sequence ((HI tmp1) (HI tmp2)) - (set HI tmp1 reg8) - (set HI tmp2 memory) - (sub HI (reg HI h-cr 9) (const 2)) - (set HI (reg HI h-cr 9) tmp1) - (set HI reg8 tmp2) - ) - () -) - -;No operation -; NOP -(dni nop "nop" - ((PIPE OS) (IDOC MISC)) - "nop" - (+ OP1_12 OP2_12 (f-op-bit8 0)) - () - () -) - -;*********system control instructions *********************/ - -(define-pmacro (sysctrl name insn opc1 opc2 op1 op2 op3) - (dni name - (.str name "miscellaneous" ) - ((PIPE OS) (IDOC MISC)) - (.str insn ) - (+ opc1 opc2 (f-op-lbit4 op1) (f-op-bit4 op2) (f-data8 op3) (f-op-bit8 op3)) - () - () - ) -) -(sysctrl srstm srst OP1_11 OP2_7 4 8 183 ) -(sysctrl idlem idle OP1_8 OP2_7 7 8 135) -(sysctrl pwrdnm pwrdn OP1_9 OP2_7 6 8 151) -(sysctrl diswdtm diswdt OP1_10 OP2_5 5 10 165) -(sysctrl enwdtm enwdt OP1_8 OP2_5 7 10 133) -(sysctrl einitm einit OP1_11 OP2_5 4 10 181) -(sysctrl srvwdtm srvwdt OP1_10 OP2_7 5 8 167 ) - -;s/w brk -; SBRK -(dni sbrk "sbrk" - ((PIPE OS) (IDOC MISC)) - "sbrk" - (+ OP1_8 OP2_12 (f-op-bit8 0)) - () - () -) - -; atomic sequence -; ATOMIC #irang2 -(dni atomic "begin atomic sequence" - ((PIPE OS) (IDOC SYSC)) - "atomic $hash$uimm2" - (+ OP1_13 OP2_1 (f-op-lbit2 0) uimm2 (f-op-bit4 0)) - (sequence ((HI count)) - (set HI count uimm2) - (cond HI - ((ne HI count (const 0)) - (sequence () - (set HI pc (add HI pc (const 2))) - (set HI count (sub HI count (const 1))) - )) - ) - (set HI count (const 0)) - ) - () -) - -;extended register sequence -; EXTR #irang2 -(dni extr "begin extended register sequence" - ((PIPE OS) (IDOC SYSC)) - "extr $hash$uimm2" - (+ OP1_13 OP2_1 (f-op-lbit2 2) uimm2 (f-op-bit4 0)) - (sequence ((HI count)) - (set HI count uimm2) - (cond HI - ((ne HI count (const 0)) - (sequence () - (set HI pc (add HI pc (const 2))) - (set HI count (sub HI count (const 1))) - )) - ) - (set HI count (const 0)) - ) - () -) - -;extended page sequence -; EXTP Rw,#irang2 -(dni extp "begin extended page sequence" - ((PIPE OS) (IDOC SYSC)) - "extp $sr,$hash$uimm2" - (+ OP1_13 OP2_12 (f-op-lbit2 1) uimm2 sr) - (sequence ((HI count)) - (set HI count uimm2) - (cond HI - ((ne HI count (const 0)) - (sequence () - (set HI pc (add HI pc (const 2))) - (set HI count (sub HI count (const 1))) - )) - ) - (set HI count (const 0)) - ) - () -) - -;extended page sequence -; EXTP #pag10,#irang2 -(dni extp1 "begin extended page sequence" - ((PIPE OS) (IDOC SYSC)) - "extp $hash$pagenum,$hash$uimm2" - (+ OP1_13 OP2_7 (f-op-lbit2 1) uimm2 (f-op-bit4 0) pagenum (f-qlobit 0) (f-qlobit2 0)) - (sequence ((HI count)) - (set HI count uimm2) - (cond HI - ((ne HI count (const 0)) - (sequence () - (set HI pc (add HI pc (const 2))) - (set HI count (sub HI count (const 1))) - )) - ) - (set HI count (const 0)) - ) - () -) - -; EXTP #pag10,#irang2 -(dni extpg1 "begin extended page sequence" - ((PIPE OS) (IDOC SYSC)) - "extp $hash$pag$upag16,$hash$uimm2" - (+ OP1_13 OP2_7 (f-op-lbit2 1) uimm2 (f-op-bit4 0) upag16 ) - (sequence ((HI count)) - (set HI count uimm2) - (cond HI - ((ne HI count (const 0)) - (sequence () - (set HI pc (add HI pc (const 2))) - (set HI count (sub HI count (const 1))) - )) - ) - (set HI count (const 0)) - ) - () -) - -;extended page and register sequence -; EXTPR Rw,#irang2 -(dni extpr "begin extended page and register sequence" - ((PIPE OS) (IDOC SYSC)) - "extpr $sr,$hash$uimm2" - (+ OP1_13 OP2_12 (f-op-lbit2 3) uimm2 sr) - (sequence ((HI count)) - (set HI count uimm2) - (cond HI - ((ne HI count (const 0)) - (sequence () - (set HI pc (add HI pc (const 2))) - (set HI count (sub HI count (const 1))) - )) - ) - (set HI count (const 0)) - ) - () -) - -;extended page and register sequence -; EXTPR #pag10,#irang2 -(dni extpr1 "begin extended page sequence" - ((PIPE OS) (IDOC SYSC)) - "extpr $hash$pagenum,$hash$uimm2" - (+ OP1_13 OP2_7 (f-op-lbit2 3) uimm2 (f-op-bit4 0) pagenum (f-qlobit 0) (f-qlobit2 0)) - (sequence ((HI count)) - (set HI count uimm2) - (cond HI - ((ne HI count (const 0)) - (sequence () - (set HI pc (add HI pc (const 2))) - (set HI count (sub HI count (const 1))) - )) - ) - (set HI count (const 0)) - ) - () -) - -;extended segment sequence -; EXTS Rw,#irang2 -(dni exts "begin extended segment sequence" - ((PIPE OS) (IDOC SYSC)) - "exts $sr,$hash$uimm2" - (+ OP1_13 OP2_12 (f-op-lbit2 0) uimm2 sr) - (sequence ((HI count)) - (set HI count uimm2) - (cond HI - ((ne HI count (const 0)) - (sequence () - (set HI pc (add HI pc (const 2))) - (set HI count (sub HI count (const 1))) - )) - ) - (set HI count (const 0)) - ) - () -) - -;extended segment sequence -; EXTS #seg8,#irang2 -(dni exts1 "begin extended segment sequence" - ((PIPE OS) (IDOC SYSC)) - "exts $hash$seghi8,$hash$uimm2" - (+ OP1_13 OP2_7 (f-op-lbit2 0) uimm2 (f-op-bit4 0) seghi8 (f-op-bit8 0)) - (sequence ((HI count)) - (set HI count uimm2) - (cond HI - ((ne HI count (const 0)) - (sequence () - (set HI pc (add HI pc (const 2))) - (set HI count (sub HI count (const 1))) - )) - ) - (set HI count (const 0)) - ) - () -) - -;extended segment register sequence -; EXTSR Rwm,#irang2 -(dni extsr "begin extended segment and register sequence" - ((PIPE OS) (IDOC SYSC)) - "extsr $sr,$hash$uimm2" - (+ OP1_13 OP2_12 (f-op-lbit2 2) uimm2 sr) - (sequence ((HI count)) - (set HI count uimm2) - (cond HI - ((ne HI count (const 0)) - (sequence () - (set HI pc (add HI pc (const 2))) - (set HI count (sub HI count (const 1))) - )) - ) - (set HI count (const 0)) - ) - () -) - -;extended segment register sequence -; EXTSR #pag10,#irang2 -(dni extsr1 "begin extended segment and register sequence" - ((PIPE OS) (IDOC SYSC)) - "extsr $hash$seghi8,$hash$uimm2" - (+ OP1_13 OP2_7 (f-op-lbit2 2) uimm2 (f-op-bit4 0) seghi8 (f-op-bit8 0)) - (sequence ((HI count)) - (set HI count uimm2) - (cond HI - ((ne HI count (const 0)) - (sequence () - (set HI pc (add HI pc (const 2))) - (set HI count (sub HI count (const 1))) - )) - ) - (set HI count (const 0)) - ) - () -) - -;prioritize register -;PRIOR Rwn,Rwm -(dni prior "add registers" - ((PIPE OS) (IDOC ALU)) - "prior $dr,$sr" - (+ OP1_2 OP2_11 dr sr) - (sequence ((HI count) (HI tmp1) (HI tmp2)) - (set HI count (const 0)) - (set HI tmp1 sr) - (set HI tmp2 (and tmp1 (const 32768))) - (cond HI - ((ne HI tmp2 (const 1)) (ne HI sr (const 0)) - (sll HI tmp1 (const 1)) - (set HI tmp2 (and tmp1 (const 32768))) - (set HI count (add HI count (const 1))) - ) - ) - (set HI dr count) - ) - () -) - - -;bit instructions -;****************************************************************** -;bit clear -(define-pmacro (bclear name insn opc1) - (dni name - (.str name "bit clear" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $reg8$dot$qbit") - (+ opc1 OP2_14 reg8) - (sequence ((HI tmp1) (HI tmp2)) - (set tmp2 (const 1)) - (set tmp1 reg8) - (sll tmp2 qbit) - (inv tmp2) - (set BI tmp1(and tmp1 tmp2)) - (set HI reg8 tmp1)) - () - ) -) - -;clear direct bit -(dni bclr18 "bit logical MOVN" - ((PIPE OS) (IDOC ALU)) - "bclr $RegNam" - (+ OP1_11 OP2_14 RegNam) - (sequence ((HI tmp1) (HI tmp2)) - (set tmp2 (const 1)) - (set tmp1 reg8) - (sll tmp2 qbit) - (inv tmp2) - (set BI tmp1(and tmp1 tmp2)) - (set HI reg8 tmp1)) - () -) - - -(bclear bclr0 bclr QBIT_0 ) -(bclear bclr1 bclr QBIT_1 ) -(bclear bclr2 bclr QBIT_2 ) -(bclear bclr3 bclr QBIT_3 ) -(bclear bclr4 bclr QBIT_4 ) -(bclear bclr5 bclr QBIT_5 ) -(bclear bclr6 bclr QBIT_6 ) -(bclear bclr7 bclr QBIT_7 ) -(bclear bclr8 bclr QBIT_8 ) -(bclear bclr9 bclr QBIT_9 ) -(bclear bclr10 bclr QBIT_10 ) -(bclear bclr11 bclr QBIT_11 ) -(bclear bclr12 bclr QBIT_12 ) -(bclear bclr13 bclr QBIT_13 ) -(bclear bclr14 bclr QBIT_14 ) -(bclear bclr15 bclr QBIT_15 ) - -;set direct bit -(dni bset19 "bit logical MOVN" - ((PIPE OS) (IDOC ALU)) - "bset $RegNam" - (+ OP1_11 OP2_15 RegNam) - (sequence ((HI tmp1) (HI tmp2)) - (set tmp2 (const 1)) - (set tmp1 reg8) - (sll tmp2 qbit) - (set BI tmp1(or tmp1 tmp2)) - (set HI reg8 tmp1)) - () -) - -;bit set -(define-pmacro (bitset name insn opc1) - (dni name - (.str name "bit set" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $reg8$dot$qbit") - (+ opc1 OP2_15 reg8) - (sequence ((HI tmp1) (HI tmp2)) - (set tmp2 (const 1)) - (set tmp1 reg8) - (sll tmp2 qbit) - (set BI tmp1(or tmp1 tmp2)) - (set HI reg8 tmp1)) - () - ) -) - - -(bitset bset0 bset QBIT_0 ) -(bitset bset1 bset QBIT_1 ) -(bitset bset2 bset QBIT_2 ) -(bitset bset3 bset QBIT_3 ) -(bitset bset4 bset QBIT_4 ) -(bitset bset5 bset QBIT_5 ) -(bitset bset6 bset QBIT_6 ) -(bitset bset7 bset QBIT_7 ) -(bitset bset8 bset QBIT_8 ) -(bitset bset9 bset QBIT_9 ) -(bitset bset10 bset QBIT_10 ) -(bitset bset11 bset QBIT_11 ) -(bitset bset12 bset QBIT_12 ) -(bitset bset13 bset QBIT_13 ) -(bitset bset14 bset QBIT_14 ) -(bitset bset15 bset QBIT_15 ) - -;mov direct bit -;BMOV bitaddrZ.z,bitaddrQ.q -(dni bmov "bit logical MOV" - ((PIPE OS) (IDOC ALU)) - "bmov $reghi8$dot$qhibit,$reg8$dot$qlobit" - (+ OP1_4 OP2_10 reg8 reghi8 qhibit qlobit) - (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4)) - (set HI tmp1 reghi8) - (set HI tmp2 reg8) - (set tmp3 (const 1)) - (set tmp4 (const 1)) - (sll tmp3 qlobit) - (sll tmp4 qhibit) - (and tmp1 tmp3) - (and tmp2 tmp4) - (set BI tmp1 tmp2) - (set HI reghi8 tmp1) - (set HI reg8 tmp2)) - () -) - -;movn direct bit -;BMOVN bitaddrZ.z,bitaddrQ.q -(dni bmovn "bit logical MOVN" - ((PIPE OS) (IDOC ALU)) - "bmovn $reghi8$dot$qhibit,$reg8$dot$qlobit" - (+ OP1_3 OP2_10 reg8 reghi8 qhibit qlobit) - (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4)) - (set HI tmp1 reghi8) - (set HI tmp2 reg8) - (set tmp3 (const 1)) - (set tmp4 (const 1)) - (sll tmp3 qlobit) - (sll tmp4 qhibit) - (and tmp1 tmp3) - (and tmp2 tmp4) - (inv HI tmp2) - (set BI tmp1 tmp2) - (set HI reghi8 tmp1) - (set HI reg8 tmp2)) - () -) - -;and direct bit -;BAND bitaddrZ.z,bitaddrQ.q -(dni band "bit logical AND" - ((PIPE OS) (IDOC ALU)) - "band $reghi8$dot$qhibit,$reg8$dot$qlobit" - (+ OP1_6 OP2_10 reg8 reghi8 qhibit qlobit) - (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4)) - (set HI tmp1 reghi8) - (set HI tmp2 reg8) - (set tmp3 (const 1)) - (set tmp4 (const 1)) - (sll tmp3 qlobit) - (sll tmp4 qhibit) - (and tmp1 tmp3) - (and tmp2 tmp4) - (set BI tmp1(and tmp1 tmp2)) - (set HI reghi8 tmp1) - (set HI reg8 tmp2)) - () -) - -;or direct bit -;BOR bitaddrZ.z,bitaddrQ.q -(dni bor "bit logical OR" - ((PIPE OS) (IDOC ALU)) - "bor $reghi8$dot$qhibit,$reg8$dot$qlobit" - (+ OP1_5 OP2_10 reg8 reghi8 qhibit qlobit) - (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4)) - (set HI tmp1 reghi8) - (set HI tmp2 reg8) - (set tmp3 (const 1)) - (set tmp4 (const 1)) - (sll tmp3 qlobit) - (sll tmp4 qhibit) - (and tmp1 tmp3) - (and tmp2 tmp4) - (set BI tmp1(or tmp1 tmp2)) - (set HI reghi8 tmp1) - (set HI reg8 tmp2)) - () -) - -;xor direct bit -;BXOR bitaddrZ.z,bitaddrQ.q -(dni bxor "bit logical XOR" - ((PIPE OS) (IDOC ALU)) - "bxor $reghi8$dot$qhibit,$reg8$dot$qlobit" - (+ OP1_7 OP2_10 reg8 reghi8 qhibit qlobit) - (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4)) - (set HI tmp1 reghi8) - (set HI tmp2 reg8) - (set tmp3 (const 1)) - (set tmp4 (const 1)) - (sll tmp3 qlobit) - (sll tmp4 qhibit) - (and tmp1 tmp3) - (and tmp2 tmp4) - (set BI tmp1(xor tmp1 tmp2)) - (set HI reghi8 tmp1) - (set HI reg8 tmp2)) - () -) - -;cmp direct bit to bit -;BCMP bitaddrZ.z,bitaddrQ.q -(dni bcmp "bit to bit compare" - ((PIPE OS) (IDOC ALU)) - "bcmp $reghi8$dot$qhibit,$reg8$dot$qlobit" - (+ OP1_2 OP2_10 reg8 reghi8 qhibit qlobit) - (sequence ((HI tmp1) (HI tmp2) (HI tmp3) (HI tmp4)) - (set HI tmp1 reghi8) - (set HI tmp2 reg8) - (set tmp3 (const 1)) - (set tmp4 (const 1)) - (sll tmp3 qlobit) - (sll tmp4 qhibit) - (and tmp1 tmp3) - (and tmp2 tmp4) - (set BI tmp1(xor tmp1 tmp2)) - (set HI reghi8 tmp1) - (set HI reg8 tmp2)) - () -) - -;bit field low byte -;BFLDL op1,op2,op3 -(dni bfldl "bit field low byte" - ((PIPE OS) (IDOC MOVE)) - "bfldl $reg8,$hash$mask8,$hash$datahi8" - (+ OP1_0 OP2_10 reg8 mask8 datahi8) - (sequence ((HI tmp1) (QI tmp2) (QI tmp3)) - (set HI tmp1 reg8) - (set QI tmp2 mask8) - (set QI tmp3 datahi8) - (inv QI tmp2) - (set HI tmp1 (and tmp1 tmp2)) - (set HI tmp1 (or tmp1 tmp3)) - (set HI reg8 tmp1) - ) - () -) - -;bit field high byte -;BFLDH op1,op2,op3 -(dni bfldh "bit field high byte" - ((PIPE OS) (IDOC MOVE)) - "bfldh $reg8,$hash$masklo8,$hash$data8" - (+ OP1_1 OP2_10 reg8 masklo8 data8) - (sequence ((HI tmp1) (HI tmp2) (HI tmp3)) - (set HI tmp1 reg8) - (set QI tmp2 masklo8) - (set HI tmp3 data8) - (sll tmp2 (const 8)) - (inv HI tmp2) - (sll tmp3 (const 8)) - (set HI tmp1 (and tmp1 tmp2)) - (set HI tmp1 (or tmp1 tmp3)) - (set HI reg8 tmp1) - ) - () -) - -;/**********compare instructions****************** - -;Compare register -;CMP Rwn,Rwm -(dni cmpr "compare two registers" - ((PIPE OS) (IDOC CMP)) - "cmp $src1,$src2" - (+ OP1_4 OP2_0 src1 src2) - (set condbit (lt HI src1 src2)) - () -) - -;Compare byte register -;CMPB Rbn,Rbm -(dni cmpbr "compare two byte registers" - ((PIPE OS) (IDOC CMP)) - "cmpb $drb,$srb" - (+ OP1_4 OP2_1 drb srb) - (set condbit (lt QI drb srb)) - () -) - -(define-pmacro (cmp1 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "compare" ) - ((PIPE OS) (IDOC CMP)) - (.str insn " $"op1 ",$hash$"op2) - (+ opc1 opc2 op1 (f-op-bit1 0) op2) - (set condbit (lt mode op1 op2)) - () - ) -) -(cmp1 cmpri cmp OP1_4 OP2_8 src1 uimm3 HI) -(cmp1 cmpbri cmpb OP1_4 OP2_9 drb uimm3 QI) - -; CMP Rwn,#data16 -(dni cmpi "compare" - ((PIPE OS) (IDOC CMP)) - "cmp $reg8,$hash$uimm16" - (+ OP1_4 OP2_6 reg8 uimm16) - (set condbit (lt HI reg8 uimm16)) - () -) - -; CMPB reg,#data8 -(dni cmpbi "compare" - ((PIPE OS) (IDOC CMP)) - "cmpb $regb8,$hash$uimm8" - (+ OP1_4 OP2_7 regb8 uimm8 (f-op-bit8 0)) - (set condbit (lt QI regb8 uimm8)) - () -) - -;compare reg and indirect memory -(define-pmacro (cmp2 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "compare" ) - ((PIPE OS) (IDOC CMP)) - (.str insn " $"op1 ",[$"op2"]") - (+ opc1 opc2 op1 (f-op-bit2 2) op2) - (set condbit (lt mode op1 op2)) - () - ) -) -(cmp2 cmpr2 cmp OP1_4 OP2_8 dr sr2 HI) -(cmp2 cmpbr2 cmpb OP1_4 OP2_9 drb sr2 QI) - -;compare register and indirect memory post increment -(define-pmacro (cmp3 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "compare" ) - ((PIPE OS) (IDOC CMP)) - (.str insn " $"op1 ",[$"op2"+]") - (+ opc1 opc2 op1 (f-op-bit2 3) op2) - (sequence () - (set condbit (lt mode op1 op2)) - (set HI op2 (add HI op2 (const 2))) - ) - () - ) -) -(cmp3 cmp2i cmp OP1_4 OP2_8 dr sr2 HI) -(cmp3 cmpb2i cmpb OP1_4 OP2_9 drb sr2 QI) - -;compare register and direct memory -(define-pmacro (cmp4 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "compare" ) - ((PIPE OS) (IDOC CMP)) - (.str insn " $"op1 ",$pof$"op2) - (+ opc1 opc2 op1 op2) - (set condbit (lt HI op1 (mem HI op2))) - () - ) -) -(cmp4 cmp04 cmp OP1_4 OP2_2 reg8 upof16 HI) -(cmp4 cmpb4 cmpb OP1_4 OP2_3 regb8 upof16 QI) - -;compare register and direct memory -(define-pmacro (cmp4 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "compare" ) - ((PIPE OS) (IDOC CMP)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (set condbit (lt HI op1 (mem HI op2))) - () - ) -) -(cmp4 cmp004 cmp OP1_4 OP2_2 regmem8 memgr8 HI) -(cmp4 cmp0004 cmp OP1_4 OP2_2 reg8 memory HI) -(cmp4 cmpb04 cmpb OP1_4 OP2_3 regbmem8 memgr8 QI) -(cmp4 cmpb004 cmpb OP1_4 OP2_3 regb8 memory QI) - -;compare register and immediate -(define-pmacro (cmp5 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "compare" ) - ((PIPE OS) (IDOC CMP)) - (.str insn " $"op1 ",$hash$"op2) - (+ opc1 opc2 op2 op1) - (sequence () - (set condbit (lt HI op1 op2)) - (set mode op1 (sub HI op1 (const 1))) - ) - () - ) -) -(cmp5 cmpd1ri cmpd1 OP1_10 OP2_0 sr uimm4 HI) -(cmp5 cmpd2ri cmpd2 OP1_11 OP2_0 sr uimm4 HI) -(cmp5 cmpi1ri cmpi1 OP1_8 OP2_0 sr uimm4 HI) -(cmp5 cmpi2ri cmpi2 OP1_9 OP2_0 sr uimm4 HI) -(cmp5 cmpd1rim cmpd1 OP1_10 OP2_6 reg8 uimm16 HI) -(cmp5 cmpd2rim cmpd2 OP1_11 OP2_6 reg8 uimm16 HI) -(cmp5 cmpi1rim cmpi1 OP1_8 OP2_6 reg8 uimm16 HI) -(cmp5 cmpi2rim cmpi2 OP1_9 OP2_6 reg8 uimm16 HI) - -;compare register and direct memory -(define-pmacro (cmp6 name insn opc1 opc2 op1 op2 mode ) - (dni name - (.str name "compare" ) - ((PIPE OS) (IDOC CMP)) - (.str insn " $"op1 ",$pof$"op2) - (+ opc1 opc2 op1 op2) - (sequence () - (set condbit (lt HI op1 (mem HI op2))) - (set mode op1 (sub HI op1 (const 1))) - ) - () - ) -) -(cmp6 cmpd1rp cmpd1 OP1_10 OP2_2 reg8 upof16 HI ) -(cmp6 cmpd2rp cmpd2 OP1_11 OP2_2 reg8 upof16 HI ) -(cmp6 cmpi1rp cmpi1 OP1_8 OP2_2 reg8 upof16 HI ) -(cmp6 cmpi2rp cmpi2 OP1_9 OP2_2 reg8 upof16 HI ) - -;compare register and direct memory -(define-pmacro (cmp7 name insn opc1 opc2 op1 op2 mode) - (dni name - (.str name "compare" ) - ((PIPE OS) (IDOC CMP)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (sequence () - (set condbit (lt HI op1 (mem HI op2))) - (set mode op1 (sub HI op1 (const 1))) - ) - () - ) -) -(cmp7 cmpd1rm cmpd1 OP1_10 OP2_2 regmem8 memgr8 HI) -(cmp7 cmpd2rm cmpd2 OP1_11 OP2_2 regmem8 memgr8 HI) -(cmp7 cmpi1rm cmpi1 OP1_8 OP2_2 regmem8 memgr8 HI) -(cmp7 cmpi2rm cmpi2 OP1_9 OP2_2 regmem8 memgr8 HI) -(cmp7 cmpd1rmi cmpd1 OP1_10 OP2_2 reg8 memory HI) -(cmp7 cmpd2rmi cmpd2 OP1_11 OP2_2 reg8 memory HI) -(cmp7 cmpi1rmi cmpi1 OP1_8 OP2_2 reg8 memory HI) -(cmp7 cmpi2rmi cmpi2 OP1_9 OP2_2 reg8 memory HI) - - -;Shift and rotate insns -;**************************************************************** -(define-pmacro (shift name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "shift" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$"op2) - (+ opc1 opc2 op1 op2) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) -(shift shlr shl sll OP1_4 OP2_12 dr sr HI) -(shift shrr shr srl OP1_6 OP2_12 dr sr HI) -(shift rolr rol rol OP1_0 OP2_12 dr sr HI) -(shift rorr ror ror OP1_2 OP2_12 dr sr HI) -(shift ashrr ashr sra OP1_10 OP2_12 dr sr HI) - -(define-pmacro (shift1 name insn insn1 opc1 opc2 op1 op2 mode) - (dni name - (.str name "shift" ) - ((PIPE OS) (IDOC ALU)) - (.str insn " $"op1 ",$hash$"op2) - (+ opc1 opc2 op2 op1) - (set mode op1 (insn1 mode op1 op2)) - () - ) -) -(shift1 shlri shl sll OP1_5 OP2_12 sr uimm4 HI) -(shift1 shrri shr srl OP1_7 OP2_12 sr uimm4 HI) -(shift1 rolri rol rol OP1_1 OP2_12 sr uimm4 HI) -(shift1 rorri ror ror OP1_3 OP2_12 sr uimm4 HI) -(shift1 ashrri ashr sra OP1_11 OP2_12 sr uimm4 HI) +/* XC16X opcode support. -*- C -*- + + Copyright 2006 Free Software Foundation, Inc. + + Contributed by KPIT Cummins Infosystems Ltd.; developed under contract + from Infineon Systems, GMBH , Germany. + + This file is part of the GNU Binutils. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 51 Franklin Street - Fifth Floor, Boston, MA + 02110-1301, USA. */ + + +/* This file is an addendum to xc16x.cpu. Heavy use of C code isn't + appropriate in .cpu files, so it resides here. This especially applies + to assembly/disassembly where parsing/printing can be quite involved. + Such things aren't really part of the specification of the cpu, per se, + so .cpu files provide the general framework and .opc files handle the + nitty-gritty details as necessary. + + Each section is delimited with start and end markers. + + <arch>-opc.h additions use: "-- opc.h" + <arch>-opc.c additions use: "-- opc.c" + <arch>-asm.c additions use: "-- asm.c" + <arch>-dis.c additions use: "-- dis.c" + <arch>-ibd.h additions use: "-- ibd.h" */ + +/* -- opc.h */ + +#define CGEN_DIS_HASH_SIZE 8 +#define CGEN_DIS_HASH(buf,value) (((* (unsigned char*) (buf)) >> 3) % CGEN_DIS_HASH_SIZE) + +/* -- */ + +/* -- opc.c */ + +/* -- */ + +/* -- asm.c */ +/* Handle '#' prefixes (i.e. skip over them). */ + +static const char * +parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + const char **strp, + int opindex ATTRIBUTE_UNUSED, + long *valuep ATTRIBUTE_UNUSED) +{ + if (**strp == '#') + { + ++*strp; + return NULL; + } + return _("Missing '#' prefix"); +} + +/* Handle '.' prefixes (i.e. skip over them). */ + +static const char * +parse_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + const char **strp, + int opindex ATTRIBUTE_UNUSED, + long *valuep ATTRIBUTE_UNUSED) +{ + if (**strp == '.') + { + ++*strp; + return NULL; + } + return _("Missing '.' prefix"); +} + +/* Handle 'pof:' prefixes (i.e. skip over them). */ + +static const char * +parse_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + const char **strp, + int opindex ATTRIBUTE_UNUSED, + long *valuep ATTRIBUTE_UNUSED) +{ + if (strncasecmp (*strp, "pof:", 4) == 0) + { + *strp += 4; + return NULL; + } + return _("Missing 'pof:' prefix"); +} + +/* Handle 'pag:' prefixes (i.e. skip over them). */ + +static const char * +parse_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + const char **strp, + int opindex ATTRIBUTE_UNUSED, + long *valuep ATTRIBUTE_UNUSED) +{ + if (strncasecmp (*strp, "pag:", 4) == 0) + { + *strp += 4; + return NULL; + } + return _("Missing 'pag:' prefix"); +} + +/* Handle 'sof' prefixes (i.e. skip over them). */ + +static const char * +parse_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + const char **strp, + int opindex ATTRIBUTE_UNUSED, + long *valuep ATTRIBUTE_UNUSED) +{ + if (strncasecmp (*strp, "sof:", 4) == 0) + { + *strp += 4; + return NULL; + } + return _("Missing 'sof:' prefix"); +} + +/* Handle 'seg' prefixes (i.e. skip over them). */ + +static const char * +parse_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + const char **strp, + int opindex ATTRIBUTE_UNUSED, + long *valuep ATTRIBUTE_UNUSED) +{ + if (strncasecmp (*strp, "seg:", 4) == 0) + { + *strp += 4; + return NULL; + } + return _("Missing 'seg:' prefix"); +} +/* -- */ + +/* -- dis.c */ + +#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \ + do \ + { \ + if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_DOT_PREFIX)) \ + info->fprintf_func (info->stream, "."); \ + if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_POF_PREFIX)) \ + info->fprintf_func (info->stream, "#pof:"); \ + if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_PAG_PREFIX)) \ + info->fprintf_func (info->stream, "#pag:"); \ + } \ + while (0) + +/* Print a 'pof:' prefix to an operand. */ + +static void +print_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info ATTRIBUTE_UNUSED, + long value ATTRIBUTE_UNUSED, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ +} + +/* Print a 'pag:' prefix to an operand. */ + +static void +print_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info ATTRIBUTE_UNUSED, + long value ATTRIBUTE_UNUSED, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ +} + +/* Print a 'sof:' prefix to an operand. */ + +static void +print_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value ATTRIBUTE_UNUSED, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = (disassemble_info *) dis_info; + + info->fprintf_func (info->stream, "sof:"); +} + +/* Print a 'seg:' prefix to an operand. */ + +static void +print_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value ATTRIBUTE_UNUSED, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = (disassemble_info *) dis_info; + + info->fprintf_func (info->stream, "seg:"); +} + +/* Print a '#' prefix to an operand. */ + +static void +print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info, + long value ATTRIBUTE_UNUSED, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ + disassemble_info *info = (disassemble_info *) dis_info; + + info->fprintf_func (info->stream, "#"); +} + +/* Print a '.' prefix to an operand. */ + +static void +print_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, + void * dis_info ATTRIBUTE_UNUSED, + long value ATTRIBUTE_UNUSED, + unsigned int attrs ATTRIBUTE_UNUSED, + bfd_vma pc ATTRIBUTE_UNUSED, + int length ATTRIBUTE_UNUSED) +{ +} + +/* -- */ diff --git a/cpu/xc16x.opc b/cpu/xc16x.opc index 8d0d295955..29eaff3f44 100644 --- a/cpu/xc16x.opc +++ b/cpu/xc16x.opc @@ -59,8 +59,11 @@ parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, long *valuep ATTRIBUTE_UNUSED) { if (**strp == '#') - ++*strp; - return NULL; + { + ++*strp; + return NULL; + } + return _("Missing '#' prefix"); } /* Handle '.' prefixes (i.e. skip over them). */ @@ -72,11 +75,14 @@ parse_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, long *valuep ATTRIBUTE_UNUSED) { if (**strp == '.') - ++*strp; - return NULL; + { + ++*strp; + return NULL; + } + return _("Missing '.' prefix"); } -/* Handle '.' prefixes (i.e. skip over them). */ +/* Handle 'pof:' prefixes (i.e. skip over them). */ static const char * parse_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -84,12 +90,15 @@ parse_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, int opindex ATTRIBUTE_UNUSED, long *valuep ATTRIBUTE_UNUSED) { - if (!strncasecmp (*strp, "pof:", 4)) - *strp += 4; - return NULL; + if (strncasecmp (*strp, "pof:", 4) == 0) + { + *strp += 4; + return NULL; + } + return _("Missing 'pof:' prefix"); } -/* Handle '.' prefixes (i.e. skip over them). */ +/* Handle 'pag:' prefixes (i.e. skip over them). */ static const char * parse_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -97,33 +106,44 @@ parse_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, int opindex ATTRIBUTE_UNUSED, long *valuep ATTRIBUTE_UNUSED) { - if (!strncasecmp (*strp, "pag:", 4)) - *strp += 4; - return NULL; + if (strncasecmp (*strp, "pag:", 4) == 0) + { + *strp += 4; + return NULL; + } + return _("Missing 'pag:' prefix"); } /* Handle 'sof' prefixes (i.e. skip over them). */ + static const char * parse_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, int opindex ATTRIBUTE_UNUSED, long *valuep ATTRIBUTE_UNUSED) { - if (!strncasecmp (*strp, "sof:", 4)) - *strp += 4; - return NULL; + if (strncasecmp (*strp, "sof:", 4) == 0) + { + *strp += 4; + return NULL; + } + return _("Missing 'sof:' prefix"); } /* Handle 'seg' prefixes (i.e. skip over them). */ + static const char * parse_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, int opindex ATTRIBUTE_UNUSED, long *valuep ATTRIBUTE_UNUSED) { - if (!strncasecmp (*strp, "seg:", 4)) - *strp += 4; - return NULL; + if (strncasecmp (*strp, "seg:", 4) == 0) + { + *strp += 4; + return NULL; + } + return _("Missing 'seg:' prefix"); } /* -- */ @@ -141,7 +161,7 @@ parse_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, } \ while (0) -/* Handle '.' prefixes as operands. */ +/* Print a 'pof:' prefix to an operand. */ static void print_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -153,7 +173,7 @@ print_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { } -/* Handle '.' prefixes as operands. */ +/* Print a 'pag:' prefix to an operand. */ static void print_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -165,7 +185,7 @@ print_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { } -/* Handle '.' prefixes as operands. */ +/* Print a 'sof:' prefix to an operand. */ static void print_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -180,7 +200,7 @@ print_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, info->fprintf_func (info->stream, "sof:"); } -/* Handle '.' prefixes as operands. */ +/* Print a 'seg:' prefix to an operand. */ static void print_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -195,7 +215,7 @@ print_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, info->fprintf_func (info->stream, "seg:"); } -/* Handle '#' prefixes as operands. */ +/* Print a '#' prefix to an operand. */ static void print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -210,7 +230,7 @@ print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, info->fprintf_func (info->stream, "#"); } -/* Handle '.' prefixes as operands. */ +/* Print a '.' prefix to an operand. */ static void print_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, diff --git a/etc/ChangeLog b/etc/ChangeLog index 35e23bec28..64fdee6c02 100644 --- a/etc/ChangeLog +++ b/etc/ChangeLog @@ -1,3 +1,11 @@ +2006-02-27 Carlos O'Donell <carlos@codesourcery.com> + + * Makefile.in: TEXI2HTML uses makeinfo. Define + HTMLFILES. Add html targets. + * configure.texi: Use ifnottex. Add alternative + image format specifier as jpg. + * standards.texi: Use ifnottex. + 2005-10-21 Mark Mitchell <mark@codesourcery.com> * texi2pod.pl: Substitue for @value even when part of @include. diff --git a/etc/Makefile.in b/etc/Makefile.in index b99daf99b1..df461cfd59 100644 --- a/etc/Makefile.in +++ b/etc/Makefile.in @@ -39,7 +39,10 @@ MAKEINFO = `if [ -f ../texinfo/makeinfo/makeinfo ]; \ TEXI2DVI = `if [ -f ../texinfo/util/texi2dvi ]; \ then echo ../texinfo/util/texi2dvi; \ else echo texi2dvi; fi` -TEXI2HTML = texi2html +TEXI2HTML = `if [ -f ../texinfo/makeinfo/makeinfo ]; \ + then echo "../texinfo/makeinfo/makeinfo --html"; \ + else echo "makeinfo --html"; fi` + DVIPS = dvips # Where to find texinfo.tex to format documentation with TeX. @@ -50,6 +53,7 @@ TEXIDIR = $(srcdir)/../texinfo INFOFILES = standards.info configure.info DVIFILES = standards.dvi configure.dvi +HTMLFILES = standards.html configure.html all: info install: install-info @@ -82,6 +86,18 @@ install-info: info done; \ fi +html: + for f in $(HTMLFILES); do \ + if test -f $(srcdir)/`echo $$f | sed -e 's/.html$$/.texi/'`; then \ + if $(MAKE) "TEXI2HTML=$(TEXI2HTML)" $$f; then \ + true; \ + else \ + exit 1; \ + fi; \ + fi; \ + done + + dvi: for f in $(DVIFILES); do \ if test -f $(srcdir)/`echo $$f | sed -e 's/.dvi$$/.texi/'`; then \ @@ -96,6 +112,9 @@ dvi: standards.info: $(srcdir)/standards.texi $(srcdir)/make-stds.texi $(MAKEINFO) --no-split -I$(srcdir) -o standards.info $(srcdir)/standards.texi +standards.html: $(srcdir)/standards.texi $(srcdir)/make-stds.texi + $(TEXI2HTML) --no-split -I$(srcdir) -o standards.html $(srcdir)/standards.texi + standards.dvi: $(srcdir)/standards.texi TEXINPUTS=$(TEXIDIR):$$TEXINPUTS $(TEXI2DVI) $(srcdir)/standards.texi @@ -131,12 +150,15 @@ configure.ps: configure.dvi $(srcdir)/configdev.ein $(srcdir)/configbuild.ein rm -f configdev.eps configbuild.eps configure.html: $(srcdir)/configure.texi - $(TEXI2HTML) -split_chapter $(srcdir)/configure.texi + cp $(srcdir)/configdev.jin configdev.jpg + cp $(srcdir)/configbuild.jin configbuild.jpg + $(TEXI2HTML) --no-split -I$(srcdir) -o configure.html $(srcdir)/configure.texi clean: rm -f *.aux *.cp *.cps *.dvi *.fn *.fns *.ky *.kys *.log rm -f *.pg *.pgs *.toc *.tp *.tps *.vr *.vrs - rm -f configdev.txt configbuild.txt configdev.eps configbuild.eps + rm -f configdev.txt configbuild.txt + rm -f configdev.eps configbuild.eps rm -f configdev.jpg configbuild.jpg mostlyclean: clean @@ -145,6 +167,7 @@ distclean: clean rm -f Makefile config.status config.cache maintainer-clean realclean: distclean + rm -f *.html* rm -f *.info* Makefile: $(srcdir)/Makefile.in $(host_makefile_frag) $(target_makefile_frag) diff --git a/etc/configure.texi b/etc/configure.texi index d69dc414d0..385a7c4471 100644 --- a/etc/configure.texi +++ b/etc/configure.texi @@ -10,7 +10,7 @@ * configure: (configure). The GNU configure and build system @end direntry -@ifinfo +@ifnottex This file documents the GNU configure and build system. Copyright (C) 1998 Cygnus Solutions. @@ -35,7 +35,7 @@ Permission is granted to copy and distribute translations of this manual into another language, under the above conditions for modified versions, except that this permission notice may be stated in a translation approved by the Foundation. -@end ifinfo +@end ifnottex @titlepage @title The GNU configure and build system @@ -60,7 +60,7 @@ except that this permission notice may be stated in a translation approved by the Free Software Foundation. @end titlepage -@ifinfo +@ifnottex @node Top @top GNU configure and build system @@ -79,7 +79,7 @@ The GNU configure and build system. * Index:: Index. @end menu -@end ifinfo +@end ifnottex @node Introduction @chapter Introduction @@ -1085,7 +1085,7 @@ are in rectangles with rounded corners @end ifnotinfo (e.g., @samp{autoheader} is the name of a tool, not the name of a file). -@image{configdev} +@image{configdev,,,,jpg} @node Written Developer Files @subsection Written Developer Files @@ -1235,7 +1235,7 @@ Here is a picture of the files which will be created at build time. @file{config.status} is both a created file and a shell script which is run to create other files, and the picture attempts to show that. -@image{configbuild} +@image{configbuild,,,,jpg} @node Build Files Description @subsection Build Files Description diff --git a/etc/standards.texi b/etc/standards.texi index 5aa508e018..490e15b158 100644 --- a/etc/standards.texi +++ b/etc/standards.texi @@ -6,13 +6,13 @@ @set lastupdate February 14, 2002 @c %**end of header -@ifinfo +@ifnottex @format START-INFO-DIR-ENTRY * Standards: (standards). GNU coding standards. END-INFO-DIR-ENTRY @end format -@end ifinfo +@end ifnottex @c @setchapternewpage odd @setchapternewpage off @@ -28,11 +28,11 @@ END-INFO-DIR-ENTRY @iftex @set CHAPTER chapter @end iftex -@ifinfo +@ifnottex @set CHAPTER node -@end ifinfo +@end ifnottex -@ifinfo +@ifnottex GNU Coding Standards Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. @@ -43,7 +43,7 @@ with no Invariant Sections, with no Front-Cover Texts, and with no Back-Cover Texts. A copy of the license is included in the section entitled ``GNU Free Documentation License''. -@end ifinfo +@end ifnottex @titlepage @title GNU Coding Standards @@ -63,12 +63,12 @@ A copy of the license is included in the section entitled ``GNU Free Documentation License''. @end titlepage -@ifinfo +@ifnottex @node Top, Preface, (dir), (dir) @top Version Last updated @value{lastupdate}. -@end ifinfo +@end ifnottex @menu * Preface:: About the GNU Coding Standards diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 34b1c6cf04..cbd4d1e5b5 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,96 @@ +2006-03-02 Corinna Vinschen <vinschen@redhat.com> + + * mn10300-tdep.c (mn10300_push_dummy_call): Write breakpoint + address to MDR register. + +2006-03-01 Daniel Jacobowitz <dan@codesourcery.com> + + * gdbtypes.c (lookup_struct_elt_type): Correct noerr for recursive + calls. + +2006-03-01 Randolph Chung <tausq@debian.org> + + * somread.c (som_symfile_read): Update comment and remove unneeded + use of a deprecated variable. + +2006-03-01 Randolph Chung <tausq@debian.org> + + * hppa-tdep.h (unwind_table_entry): Update field names to match HP + runtime specification. + * hppa-tdep.c (internalize_unwinds, hppa_frame_cache): Likewise. + (unwind_command): Likewise. + +2006-03-01 Randolph Chung <tausq@debian.org> + + * hppa-tdep.c (hppa_frame_cache): Handle Region_Description and + Pseudo_SP_Set in unwind record. + +2006-03-01 Randolph Chung <tausq@debian.org> + + * hppa-hpux-tdep.c (initialize_hp_cxx_exception_support): Use + TDEP->is_elf to determine if we are working with a SOM binary. + (null_symtab_and_line): Remove unused variable. + * config/pa/hppa64.mt: Use tm-hppa.h. + * config/pa/tm-hppa64.h: Remove file. + +2006-03-01 Wu Zhou <woodzltc@cn.ibm.com> + + * f-typeprint.c (f_type_print_base): Delete the redundant space. + +2006-02-28 Kevin Buettner <kevinb@redhat.com> + + * Makefile.in (mn10300-linux-tdep.o): Update dependencies. + * mn10300-linux-tdep.c (frame.h, trad-frame.h, tramp-frame.h): + Include. + (am33_linux_sigframe_cache_init): New function. + (am33_linux_sigframe, am33_linux_rt_sigframe): New signal frame + descriptions. + (AM33_SIGCONTEXT_D0, AM33_SIGCONTEXT_D1, AM33_SIGCONTEXT_D2) + (AM33_SIGCONTEXT_D3, AM33_SIGCONTEXT_A0, AM33_SIGCONTEXT_A1) + (AM33_SIGCONTEXT_A2, AM33_SIGCONTEXT_A3, AM33_SIGCONTEXT_E0) + (AM33_SIGCONTEXT_E1, AM33_SIGCONTEXT_E2, AM33_SIGCONTEXT_E3) + (AM33_SIGCONTEXT_E4, AM33_SIGCONTEXT_E5, AM33_SIGCONTEXT_E6) + (AM33_SIGCONTEXT_E7, AM33_SIGCONTEXT_LAR, AM33_SIGCONTEXT_LIR) + (AM33_SIGCONTEXT_MDR, AM33_SIGCONTEXT_MCVF, AM33_SIGCONTEXT_MCRL) + (AM33_SIGCONTEXT_MCRH, AM33_SIGCONTEXT_MDRQ, AM33_SIGCONTEXT_SP) + (AM33_SIGCONTEXT_EPSW, AM33_SIGCONTEXT_PC, AM33_SIGCONTEXT_FPUCONTEXT): + New constants. + (am33_linux_init_osabi): Register signal frame unwinders. + +2006-02-28 Kevin Buettner <kevinb@redhat.com> + + * mn10300-tdep.c (mn10300_analyze_prologue): Implement backtrack + out of pattern match by saving relevant state. Fix stack size + adjustment bug. + +2006-02-28 Alexandre Oliva <aoliva@redhat.com> + + * solib-svr4.h (struct link_map_offsets): Add l_ld_offset and + l_ld_size fields. + * solib-svr4.c (struct lm_info): Add l_addr field. + (LM_ADDR_FROM_LINK_MAP): Renamed from LM_ADDR. + (HAS_LM_DYNAMIC_FROM_LINK_MAP): New. + (LM_DYNAMIC_FROM_LINK_MAP): New. + (LM_ADDR_CHECK): New. Use it instead of LM_ADDR. + (svr4_current_sos): Initialize l_addr. Adjust. + (svr4_relocate_section_addresses): Adjust. + (svr4_ilp32_fetch_link_map_offsets): Define new members. + (svr4_lp64_fetch_link_map_offsets): Likewise. + * solib-legacy.c (legacy_svr4_fetch_link_map_offsets): Likewise. + * mipsnbsd-tdep.c (mipsnbsd_ilp32_fetch_link_map_offsets): Likewise. + (mipsnbsd_lp64_fetch_link_map_offsets): Likewise. + * Makefile.in (solib-svr4.o): Depend on $(elf_bfd_h). + +2006-02-26 David S. Miller <davem@sunset.davemloft.net> + + * config/sparc/linux.mt (TDEPFILES): Add sol2-tdep.o. + * config/sparc/linux64.mt (TDEPFILES): Likewise. + +2006-02-27 Alan Modra <amodra@bigpond.net.au> + + * ppc-linux-nat.c (ppc_linux_insert_watchpoint): Correct return type. + (ppc_linux_remove_watchpoint): Likewise, and args. + 2006-02-26 Mark Kettenis <kettenis@gnu.org> * i386obsd-tdep.c (i386obsd_trapframe_sniffer): Also recognize diff --git a/gdb/Makefile.in b/gdb/Makefile.in index acba593b0e..d5abb4f682 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in @@ -2326,7 +2326,8 @@ mipsv4-nat.o: mipsv4-nat.c $(defs_h) $(inferior_h) $(gdbcore_h) $(target_h) \ $(regcache_h) $(gregset_h) mn10300-linux-tdep.o: mn10300-linux-tdep.c $(defs_h) $(gdbcore_h) \ $(gdb_string_h) $(regcache_h) $(mn10300_tdep_h) $(gdb_assert_h) \ - $(bfd_h) $(elf_bfd_h) $(osabi_h) $(regset_h) $(solib_svr4_h) + $(bfd_h) $(elf_bfd_h) $(osabi_h) $(regset_h) $(solib_svr4_h) \ + $(frame_h) $(trad_frame_h) $(tramp_frame_h) mn10300-tdep.o: mn10300-tdep.c $(defs_h) $(arch_utils_h) $(dis_asm_h) \ $(gdbtypes_h) $(regcache_h) $(gdb_string_h) $(gdb_assert_h) \ $(frame_h) $(frame_unwind_h) $(frame_base_h) $(trad_frame_h) \ @@ -2582,7 +2583,8 @@ solib-sunos.o: solib-sunos.c $(defs_h) $(gdb_string_h) $(symtab_h) $(bfd_h) \ solib-svr4.o: solib-svr4.c $(defs_h) $(elf_external_h) $(elf_common_h) \ $(elf_mips_h) $(symtab_h) $(bfd_h) $(symfile_h) $(objfiles_h) \ $(gdbcore_h) $(target_h) $(inferior_h) $(gdb_assert_h) \ - $(solist_h) $(solib_h) $(solib_svr4_h) $(bfd_target_h) $(exec_h) + $(solist_h) $(solib_h) $(solib_svr4_h) $(bfd_target_h) $(elf_bfd_h) \ + $(exec_h) sol-thread.o: sol-thread.c $(defs_h) $(gdbthread_h) $(target_h) \ $(inferior_h) $(gdb_stat_h) $(gdbcmd_h) $(gdbcore_h) $(regcache_h) \ $(solib_h) $(symfile_h) $(gdb_string_h) $(gregset_h) diff --git a/gdb/config/pa/hppa64.mt b/gdb/config/pa/hppa64.mt index ad93375f22..c7714c2344 100644 --- a/gdb/config/pa/hppa64.mt +++ b/gdb/config/pa/hppa64.mt @@ -1,3 +1,3 @@ # Target: HP PA-RISC 2.0 running HPUX 11.00 in wide mode TDEPFILES= hppa-tdep.o hppa-hpux-tdep.o solib-som.o solib-pa64.o somread.o hpread.o solib.o -DEPRECATED_TM_FILE= tm-hppa64.h +DEPRECATED_TM_FILE= tm-hppa.h diff --git a/gdb/config/pa/tm-hppa64.h b/gdb/config/pa/tm-hppa64.h deleted file mode 100644 index 7a257d4cf1..0000000000 --- a/gdb/config/pa/tm-hppa64.h +++ /dev/null @@ -1,58 +0,0 @@ -/* Parameters for execution on any Hewlett-Packard PA-RISC machine. - Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995, 1999, 2000 - Free Software Foundation, Inc. - - Contributed by the Center for Software Science at the - University of Utah (pa-gdb-bugs@cs.utah.edu). - -This file is part of GDB. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -/* PA 64-bit specific definitions. Override those which are in - tm-hppa.h */ - -struct frame_info; - -/* jimb: this must go. I'm just using it to disable code I haven't - gotten working yet. */ -#define GDB_TARGET_IS_HPPA_20W - -/* NOTE: cagney/2003-07-27: Using CC='cc +DA2.0W -Ae' configure - hppa64-hp-hpux11.00; GDB managed to build / start / break main / - run with multi-arch enabled. Not sure about much else as there - appears to be an unrelated problem in the SOM symbol table reader - causing GDB to lose line number information. Since prior to this - switch and a other recent tweaks, 64 bit PA hadn't been building - for some months, this is probably the lesser of several evils. */ - -#include "pa/tm-hppah.h" - -#undef FP4_REGNUM -#define FP4_REGNUM 68 -#define AP_REGNUM 29 /* Argument Pointer Register */ -#define DP_REGNUM 27 -#define FP5_REGNUM 70 -#define SR5_REGNUM 48 - - -/* jimb: omitted dynamic linking stuff here */ - -#undef FUNC_LDIL_OFFSET -#undef FUNC_LDO_OFFSET -#undef SR4EXPORT_LDIL_OFFSET -#undef SR4EXPORT_LDO_OFFSET - -/* jimb: omitted purify call support */ diff --git a/gdb/config/sparc/linux.mt b/gdb/config/sparc/linux.mt index 20f4fb2752..2fc5e220d3 100644 --- a/gdb/config/sparc/linux.mt +++ b/gdb/config/sparc/linux.mt @@ -1,4 +1,4 @@ # Target: GNU/Linux SPARC -TDEPFILES= sparc-tdep.o sparc-sol2-tdep.o sparc-linux-tdep.o \ +TDEPFILES= sparc-tdep.o sparc-sol2-tdep.o sol2-tdep.o sparc-linux-tdep.o \ solib.o solib-svr4.o symfile-mem.o DEPRECATED_TM_FILE= solib.h diff --git a/gdb/config/sparc/linux64.mt b/gdb/config/sparc/linux64.mt index deb4008c92..be7cfff3b4 100644 --- a/gdb/config/sparc/linux64.mt +++ b/gdb/config/sparc/linux64.mt @@ -1,5 +1,5 @@ # Target: GNU/Linux UltraSPARC -TDEPFILES= sparc64-tdep.o sparc64-sol2-tdep.o sparc64-linux-tdep.o \ +TDEPFILES= sparc64-tdep.o sparc64-sol2-tdep.o sol2-tdep.o sparc64-linux-tdep.o \ sparc-tdep.o sparc-sol2-tdep.o sparc-linux-tdep.o \ solib.o solib-svr4.o DEPRECATED_TM_FILE= solib.h diff --git a/gdb/f-typeprint.c b/gdb/f-typeprint.c index b0de0ab011..31b96a371f 100644 --- a/gdb/f-typeprint.c +++ b/gdb/f-typeprint.c @@ -416,7 +416,7 @@ f_type_print_base (struct type *type, struct ui_file *stream, int show, the type name is, as recorded in the type itself. If there is no type name, then complain. */ if (TYPE_NAME (type) != NULL) - fprintfi_filtered (level, stream, "%s ", TYPE_NAME (type)); + fprintfi_filtered (level, stream, "%s", TYPE_NAME (type)); else error (_("Invalid type code (%d) in symbol table."), TYPE_CODE (type)); break; diff --git a/gdb/gdbserver/ChangeLog b/gdb/gdbserver/ChangeLog index a84b4784d5..119736e762 100644 --- a/gdb/gdbserver/ChangeLog +++ b/gdb/gdbserver/ChangeLog @@ -1,3 +1,8 @@ +2006-03-03 Daniel Jacobowitz <dan@codesourcery.com> + + * remote-utils.c (prepare_resume_reply): Move declaration + of gdb_id_from_wait to the top of the block. + 2006-02-15 Daniel Jacobowitz <dan@codesourcery.com> * linux-low.c (regsets_store_inferior_registers): Read the regset diff --git a/gdb/gdbserver/remote-utils.c b/gdb/gdbserver/remote-utils.c index c36570239f..b8634e877f 100644 --- a/gdb/gdbserver/remote-utils.c +++ b/gdb/gdbserver/remote-utils.c @@ -681,9 +681,11 @@ prepare_resume_reply (char *buf, char status, unsigned char signo) if (using_threads) { + unsigned int gdb_id_from_wait; + /* FIXME right place to set this? */ thread_from_wait = ((struct inferior_list_entry *)current_inferior)->id; - unsigned int gdb_id_from_wait = thread_to_gdb_id (current_inferior); + gdb_id_from_wait = thread_to_gdb_id (current_inferior); if (debug_threads) fprintf (stderr, "Writing resume reply for %ld\n\n", thread_from_wait); diff --git a/gdb/gdbtypes.c b/gdb/gdbtypes.c index dde327b5ab..0d297281a1 100644 --- a/gdb/gdbtypes.c +++ b/gdb/gdbtypes.c @@ -1271,7 +1271,7 @@ lookup_struct_elt_type (struct type *type, char *name, int noerr) { struct type *t; - t = lookup_struct_elt_type (TYPE_BASECLASS (type, i), name, noerr); + t = lookup_struct_elt_type (TYPE_BASECLASS (type, i), name, 1); if (t != NULL) { return t; diff --git a/gdb/hppa-hpux-tdep.c b/gdb/hppa-hpux-tdep.c index 4126feca05..7eba12344a 100644 --- a/gdb/hppa-hpux-tdep.c +++ b/gdb/hppa-hpux-tdep.c @@ -844,52 +844,54 @@ GDB will be unable to intercept exception events."), return 0; } -#ifndef GDB_TARGET_IS_HPPA_20W - /* Check whether the executable is dynamically linked or archive bound */ - /* With an archive-bound executable we can use the raw addresses we find - for the callback function, etc. without modification. For an executable - with shared libraries, we have to do more work to find the plabel, which - can be the target of a call through $$dyncall from the aCC runtime support - library (libCsup) which is linked shared by default by aCC. */ - /* This test below was copied from somsolib.c/somread.c. It may not be a very - reliable one to test that an executable is linked shared. pai/1997-07-18 */ - shlib_info = bfd_get_section_by_name (symfile_objfile->obfd, "$SHLIB_INFO$"); - if (shlib_info && (bfd_section_size (symfile_objfile->obfd, shlib_info) != 0)) + if (!gdbarch_tdep (current_gdbarch)->is_elf) { - /* The minsym we have has the local code address, but that's not - the plabel that can be used by an inter-load-module call. */ - /* Find solib handle for main image (which has end.o), and use - that and the min sym as arguments to __d_shl_get() (which - does the equivalent of shl_findsym()) to find the plabel. */ - - args_for_find_stub args; - static char message[] = "Error while finding exception callback hook:\n"; - - args.solib_handle = gdbarch_tdep (current_gdbarch)->solib_get_solib_by_pc (eh_notify_callback_addr); - args.msym = msym; - args.return_val = 0; - - recurse++; - catch_errors (cover_find_stub_with_shl_get, &args, message, - RETURN_MASK_ALL); - eh_notify_callback_addr = args.return_val; - recurse--; - - deprecated_exception_catchpoints_are_fragile = 1; - - if (!eh_notify_callback_addr) - { - /* We can get here either if there is no plabel in the export list - for the main image, or if something strange happened (?) */ - warning (_("\ + /* Check whether the executable is dynamically linked or archive bound */ + /* With an archive-bound executable we can use the raw addresses we find + for the callback function, etc. without modification. For an executable + with shared libraries, we have to do more work to find the plabel, which + can be the target of a call through $$dyncall from the aCC runtime + support library (libCsup) which is linked shared by default by aCC. */ + /* This test below was copied from somsolib.c/somread.c. It may not be a very + reliable one to test that an executable is linked shared. + pai/1997-07-18 */ + shlib_info = bfd_get_section_by_name (symfile_objfile->obfd, "$SHLIB_INFO$"); + if (shlib_info && (bfd_section_size (symfile_objfile->obfd, shlib_info) != 0)) + { + /* The minsym we have has the local code address, but that's not + the plabel that can be used by an inter-load-module call. */ + /* Find solib handle for main image (which has end.o), and use + that and the min sym as arguments to __d_shl_get() (which + does the equivalent of shl_findsym()) to find the plabel. */ + + args_for_find_stub args; + static char message[] = _("Error while finding exception callback hook:\n"); + + args.solib_handle = gdbarch_tdep (current_gdbarch)->solib_get_solib_by_pc (eh_notify_callback_addr); + args.msym = msym; + args.return_val = 0; + + recurse++; + catch_errors (cover_find_stub_with_shl_get, &args, message, + RETURN_MASK_ALL); + eh_notify_callback_addr = args.return_val; + recurse--; + + deprecated_exception_catchpoints_are_fragile = 1; + + if (!eh_notify_callback_addr) + { + /* We can get here either if there is no plabel in the export list + for the main image, or if something strange happened (?) */ + warning (_("\ Couldn't find a plabel (indirect function label) for the exception callback.\n\ GDB will not be able to intercept exception events.")); - return 0; - } + return 0; + } + } + else + deprecated_exception_catchpoints_are_fragile = 0; } - else - deprecated_exception_catchpoints_are_fragile = 0; -#endif /* Now, look for the breakpointable routine in end.o */ /* This should also be available in the SOM symbol dict. if end.o linked in */ @@ -1063,9 +1065,6 @@ Interception of exception events may not work.")); /* Record some information about the current exception event */ static struct exception_event_record current_ex_event; -/* Convenience struct */ -static struct symtab_and_line null_symtab_and_line = -{NULL, 0, 0, 0}; /* Report current exception event. Returns a pointer to a record that describes the kind of the event, where it was thrown from, diff --git a/gdb/hppa-tdep.c b/gdb/hppa-tdep.c index 6a3ae47ba8..f1ae88c0bc 100644 --- a/gdb/hppa-tdep.c +++ b/gdb/hppa-tdep.c @@ -280,7 +280,7 @@ internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table, table[i].Millicode = (tmp >> 30) & 0x1; table[i].Millicode_save_sr0 = (tmp >> 29) & 0x1; table[i].Region_description = (tmp >> 27) & 0x3; - table[i].reserved1 = (tmp >> 26) & 0x1; + table[i].reserved = (tmp >> 26) & 0x1; table[i].Entry_SR = (tmp >> 25) & 0x1; table[i].Entry_FR = (tmp >> 21) & 0xf; table[i].Entry_GR = (tmp >> 16) & 0x1f; @@ -290,23 +290,23 @@ internalize_unwinds (struct objfile *objfile, struct unwind_table_entry *table, table[i].Frame_Extension_Millicode = (tmp >> 12) & 0x1; table[i].Stack_Overflow_Check = (tmp >> 11) & 0x1; table[i].Two_Instruction_SP_Increment = (tmp >> 10) & 0x1; - table[i].Ada_Region = (tmp >> 9) & 0x1; + table[i].sr4export = (tmp >> 9) & 0x1; table[i].cxx_info = (tmp >> 8) & 0x1; table[i].cxx_try_catch = (tmp >> 7) & 0x1; table[i].sched_entry_seq = (tmp >> 6) & 0x1; - table[i].reserved2 = (tmp >> 5) & 0x1; + table[i].reserved1 = (tmp >> 5) & 0x1; table[i].Save_SP = (tmp >> 4) & 0x1; table[i].Save_RP = (tmp >> 3) & 0x1; table[i].Save_MRP_in_frame = (tmp >> 2) & 0x1; - table[i].extn_ptr_defined = (tmp >> 1) & 0x1; + table[i].save_r19 = (tmp >> 1) & 0x1; table[i].Cleanup_defined = tmp & 0x1; tmp = bfd_get_32 (objfile->obfd, (bfd_byte *) buf); buf += 4; table[i].MPE_XL_interrupt_marker = (tmp >> 31) & 0x1; table[i].HP_UX_interrupt_marker = (tmp >> 30) & 0x1; table[i].Large_frame = (tmp >> 29) & 0x1; - table[i].Pseudo_SP_Set = (tmp >> 28) & 0x1; - table[i].reserved4 = (tmp >> 27) & 0x1; + table[i].alloca_frame = (tmp >> 28) & 0x1; + table[i].reserved2 = (tmp >> 27) & 0x1; table[i].Total_frame_size = tmp & 0x7ffffff; /* Stub unwinds are handled elsewhere. */ @@ -1857,7 +1857,7 @@ hppa_frame_cache (struct frame_info *next_frame, void **this_cache) GCC code. */ { int final_iteration = 0; - CORE_ADDR pc, end_pc; + CORE_ADDR pc, start_pc, end_pc; int looking_for_sp = u->Save_SP; int looking_for_rp = u->Save_RP; int fp_loc = -1; @@ -1877,9 +1877,19 @@ hppa_frame_cache (struct frame_info *next_frame, void **this_cache) /* We used to use frame_func_unwind () to locate the beginning of the function to pass to skip_prologue (). However, when objects are compiled without debug symbols, frame_func_unwind can return the wrong - function (or 0). We can do better than that by using unwind records. */ + function (or 0). We can do better than that by using unwind records. + This only works if the Region_description of the unwind record + indicates that it includes the entry point of the function. + HP compilers sometimes generate unwind records for regions that + do not include the entry or exit point of a function. GNU tools + do not do this. */ + + if ((u->Region_description & 0x2) == 0) + start_pc = u->region_start; + else + start_pc = frame_func_unwind (next_frame); - prologue_end = skip_prologue_hard_way (u->region_start, 0); + prologue_end = skip_prologue_hard_way (start_pc, 0); end_pc = frame_pc_unwind (next_frame); if (prologue_end != 0 && end_pc > prologue_end) @@ -1887,7 +1897,7 @@ hppa_frame_cache (struct frame_info *next_frame, void **this_cache) frame_size = 0; - for (pc = u->region_start; + for (pc = start_pc; ((saved_gr_mask || saved_fr_mask || looking_for_sp || looking_for_rp || frame_size < (u->Total_frame_size << 3)) @@ -2054,9 +2064,12 @@ hppa_frame_cache (struct frame_info *next_frame, void **this_cache) instead of Save_SP. */ fp = frame_unwind_register_unsigned (next_frame, HPPA_FP_REGNUM); + + if (u->alloca_frame) + fp -= u->Total_frame_size << 3; if (frame_pc_unwind (next_frame) >= prologue_end - && u->Save_SP && fp != 0) + && (u->Save_SP || u->alloca_frame) && fp != 0) { cache->base = fp; @@ -2527,15 +2540,19 @@ unwind_command (char *exp, int from_tty) pif (Frame_Extension_Millicode); pif (Stack_Overflow_Check); pif (Two_Instruction_SP_Increment); - pif (Ada_Region); + pif (sr4export); + pif (cxx_info); + pif (cxx_try_catch); + pif (sched_entry_seq); pif (Save_SP); pif (Save_RP); pif (Save_MRP_in_frame); - pif (extn_ptr_defined); + pif (save_r19); pif (Cleanup_defined); pif (MPE_XL_interrupt_marker); pif (HP_UX_interrupt_marker); pif (Large_frame); + pif (alloca_frame); putchar_unfiltered ('\n'); diff --git a/gdb/hppa-tdep.h b/gdb/hppa-tdep.h index 4dbeaf53d4..8c38e6c202 100644 --- a/gdb/hppa-tdep.h +++ b/gdb/hppa-tdep.h @@ -129,7 +129,7 @@ struct unwind_table_entry unsigned int Millicode:1; /* 1 */ unsigned int Millicode_save_sr0:1; /* 2 */ unsigned int Region_description:2; /* 3..4 */ - unsigned int reserved1:1; /* 5 */ + unsigned int reserved:1; /* 5 */ unsigned int Entry_SR:1; /* 6 */ unsigned int Entry_FR:4; /* number saved *//* 7..10 */ unsigned int Entry_GR:5; /* number saved *//* 11..15 */ @@ -139,22 +139,22 @@ struct unwind_table_entry unsigned int Frame_Extension_Millicode:1; /* 19 */ unsigned int Stack_Overflow_Check:1; /* 20 */ unsigned int Two_Instruction_SP_Increment:1; /* 21 */ - unsigned int Ada_Region:1; /* 22 */ + unsigned int sr4export:1; /* 22 */ unsigned int cxx_info:1; /* 23 */ unsigned int cxx_try_catch:1; /* 24 */ unsigned int sched_entry_seq:1; /* 25 */ - unsigned int reserved2:1; /* 26 */ + unsigned int reserved1:1; /* 26 */ unsigned int Save_SP:1; /* 27 */ unsigned int Save_RP:1; /* 28 */ unsigned int Save_MRP_in_frame:1; /* 29 */ - unsigned int extn_ptr_defined:1; /* 30 */ + unsigned int save_r19:1; /* 30 */ unsigned int Cleanup_defined:1; /* 31 */ unsigned int MPE_XL_interrupt_marker:1; /* 0 */ unsigned int HP_UX_interrupt_marker:1; /* 1 */ unsigned int Large_frame:1; /* 2 */ - unsigned int Pseudo_SP_Set:1; /* 3 */ - unsigned int reserved4:1; /* 4 */ + unsigned int alloca_frame:1; /* 3 */ + unsigned int reserved2:1; /* 4 */ unsigned int Total_frame_size:27; /* 5..31 */ /* This is *NOT* part of an actual unwind_descriptor in an object diff --git a/gdb/mipsnbsd-tdep.c b/gdb/mipsnbsd-tdep.c index dfdc01d8b9..f9a8b73333 100644 --- a/gdb/mipsnbsd-tdep.c +++ b/gdb/mipsnbsd-tdep.c @@ -339,6 +339,8 @@ mipsnbsd_ilp32_fetch_link_map_offsets (void) lmo.l_addr_size = 4; lmo.l_name_offset = 8; lmo.l_name_size = 4; + lmo.l_ld_offset = 12; + lmo.l_ld_size = 4; lmo.l_next_offset = 16; lmo.l_next_size = 4; lmo.l_prev_offset = 20; @@ -369,6 +371,8 @@ mipsnbsd_lp64_fetch_link_map_offsets (void) lmo.l_addr_size = 8; lmo.l_name_offset = 16; lmo.l_name_size = 8; + lmo.l_ld_offset = 24; + lmo.l_ld_size = 8; lmo.l_next_offset = 32; lmo.l_next_size = 8; lmo.l_prev_offset = 40; diff --git a/gdb/mn10300-linux-tdep.c b/gdb/mn10300-linux-tdep.c index a659d85530..a2d6f01f74 100644 --- a/gdb/mn10300-linux-tdep.c +++ b/gdb/mn10300-linux-tdep.c @@ -30,6 +30,9 @@ #include "osabi.h" #include "regset.h" #include "solib-svr4.h" +#include "frame.h" +#include "trad-frame.h" +#include "tramp-frame.h" #include <stdlib.h> @@ -467,7 +470,240 @@ am33_regset_from_core_section (struct gdbarch *gdbarch, am33_supply_gregset_method, am33_collect_gregset_method); } + +static void +am33_linux_sigframe_cache_init (const struct tramp_frame *self, + struct frame_info *next_frame, + struct trad_frame_cache *this_cache, + CORE_ADDR func); + +static const struct tramp_frame am33_linux_sigframe = { + SIGTRAMP_FRAME, + 1, + { + /* mov 119,d0 */ + { 0x2c, -1 }, + { 0x77, -1 }, + { 0x00, -1 }, + /* syscall 0 */ + { 0xf0, -1 }, + { 0xe0, -1 }, + { TRAMP_SENTINEL_INSN, -1 } + }, + am33_linux_sigframe_cache_init +}; + +static const struct tramp_frame am33_linux_rt_sigframe = { + SIGTRAMP_FRAME, + 1, + { + /* mov 173,d0 */ + { 0x2c, -1 }, + { 0xad, -1 }, + { 0x00, -1 }, + /* syscall 0 */ + { 0xf0, -1 }, + { 0xe0, -1 }, + { TRAMP_SENTINEL_INSN, -1 } + }, + am33_linux_sigframe_cache_init +}; + +/* Relevant struct definitions for signal handling... + +From arch/mn10300/kernel/sigframe.h: + +struct sigframe +{ + void (*pretcode)(void); + int sig; + struct sigcontext sc; + struct fpucontext fpuctx; + unsigned long extramask[_NSIG_WORDS-1]; + char retcode[8]; +}; + +struct rt_sigframe +{ + void (*pretcode)(void); + int sig; + struct siginfo *pinfo; + void *puc; + struct siginfo info; + struct ucontext uc; + struct fpucontext fpuctx; + char retcode[8]; +}; + +From include/asm-mn10300/ucontext.h: + +struct ucontext { + unsigned long uc_flags; + struct ucontext *uc_link; + stack_t uc_stack; + struct sigcontext uc_mcontext; + sigset_t uc_sigmask; +}; + +From include/asm-mn10300/sigcontext.h: + +struct fpucontext { + unsigned long fs[32]; + unsigned long fpcr; +}; + +struct sigcontext { + unsigned long d0; + unsigned long d1; + unsigned long d2; + unsigned long d3; + unsigned long a0; + unsigned long a1; + unsigned long a2; + unsigned long a3; + unsigned long e0; + unsigned long e1; + unsigned long e2; + unsigned long e3; + unsigned long e4; + unsigned long e5; + unsigned long e6; + unsigned long e7; + unsigned long lar; + unsigned long lir; + unsigned long mdr; + unsigned long mcvf; + unsigned long mcrl; + unsigned long mcrh; + unsigned long mdrq; + unsigned long sp; + unsigned long epsw; + unsigned long pc; + struct fpucontext *fpucontext; + unsigned long oldmask; +}; */ + + +#define AM33_SIGCONTEXT_D0 0 +#define AM33_SIGCONTEXT_D1 4 +#define AM33_SIGCONTEXT_D2 8 +#define AM33_SIGCONTEXT_D3 12 +#define AM33_SIGCONTEXT_A0 16 +#define AM33_SIGCONTEXT_A1 20 +#define AM33_SIGCONTEXT_A2 24 +#define AM33_SIGCONTEXT_A3 28 +#define AM33_SIGCONTEXT_E0 32 +#define AM33_SIGCONTEXT_E1 36 +#define AM33_SIGCONTEXT_E2 40 +#define AM33_SIGCONTEXT_E3 44 +#define AM33_SIGCONTEXT_E4 48 +#define AM33_SIGCONTEXT_E5 52 +#define AM33_SIGCONTEXT_E6 56 +#define AM33_SIGCONTEXT_E7 60 +#define AM33_SIGCONTEXT_LAR 64 +#define AM33_SIGCONTEXT_LIR 68 +#define AM33_SIGCONTEXT_MDR 72 +#define AM33_SIGCONTEXT_MCVF 76 +#define AM33_SIGCONTEXT_MCRL 80 +#define AM33_SIGCONTEXT_MCRH 84 +#define AM33_SIGCONTEXT_MDRQ 88 +#define AM33_SIGCONTEXT_SP 92 +#define AM33_SIGCONTEXT_EPSW 96 +#define AM33_SIGCONTEXT_PC 100 +#define AM33_SIGCONTEXT_FPUCONTEXT 104 + + +static void +am33_linux_sigframe_cache_init (const struct tramp_frame *self, + struct frame_info *next_frame, + struct trad_frame_cache *this_cache, + CORE_ADDR func) +{ + CORE_ADDR sc_base, fpubase; + int i; + sc_base = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM); + if (self == &am33_linux_sigframe) + { + sc_base += 8; + } + else + { + sc_base += 12; + sc_base = get_frame_memory_unsigned (next_frame, sc_base, 4); + sc_base += 20; + } + + trad_frame_set_reg_addr (this_cache, E_D0_REGNUM, + sc_base + AM33_SIGCONTEXT_D0); + trad_frame_set_reg_addr (this_cache, E_D1_REGNUM, + sc_base + AM33_SIGCONTEXT_D1); + trad_frame_set_reg_addr (this_cache, E_D2_REGNUM, + sc_base + AM33_SIGCONTEXT_D2); + trad_frame_set_reg_addr (this_cache, E_D3_REGNUM, + sc_base + AM33_SIGCONTEXT_D3); + + trad_frame_set_reg_addr (this_cache, E_A0_REGNUM, + sc_base + AM33_SIGCONTEXT_A0); + trad_frame_set_reg_addr (this_cache, E_A1_REGNUM, + sc_base + AM33_SIGCONTEXT_A1); + trad_frame_set_reg_addr (this_cache, E_A2_REGNUM, + sc_base + AM33_SIGCONTEXT_A2); + trad_frame_set_reg_addr (this_cache, E_A3_REGNUM, + sc_base + AM33_SIGCONTEXT_A3); + + trad_frame_set_reg_addr (this_cache, E_E0_REGNUM, + sc_base + AM33_SIGCONTEXT_E0); + trad_frame_set_reg_addr (this_cache, E_E1_REGNUM, + sc_base + AM33_SIGCONTEXT_E1); + trad_frame_set_reg_addr (this_cache, E_E2_REGNUM, + sc_base + AM33_SIGCONTEXT_E2); + trad_frame_set_reg_addr (this_cache, E_E3_REGNUM, + sc_base + AM33_SIGCONTEXT_E3); + trad_frame_set_reg_addr (this_cache, E_E4_REGNUM, + sc_base + AM33_SIGCONTEXT_E4); + trad_frame_set_reg_addr (this_cache, E_E5_REGNUM, + sc_base + AM33_SIGCONTEXT_E5); + trad_frame_set_reg_addr (this_cache, E_E6_REGNUM, + sc_base + AM33_SIGCONTEXT_E6); + trad_frame_set_reg_addr (this_cache, E_E7_REGNUM, + sc_base + AM33_SIGCONTEXT_E7); + + trad_frame_set_reg_addr (this_cache, E_LAR_REGNUM, + sc_base + AM33_SIGCONTEXT_LAR); + trad_frame_set_reg_addr (this_cache, E_LIR_REGNUM, + sc_base + AM33_SIGCONTEXT_LIR); + trad_frame_set_reg_addr (this_cache, E_MDR_REGNUM, + sc_base + AM33_SIGCONTEXT_MDR); + trad_frame_set_reg_addr (this_cache, E_MCVF_REGNUM, + sc_base + AM33_SIGCONTEXT_MCVF); + trad_frame_set_reg_addr (this_cache, E_MCRL_REGNUM, + sc_base + AM33_SIGCONTEXT_MCRL); + trad_frame_set_reg_addr (this_cache, E_MDRQ_REGNUM, + sc_base + AM33_SIGCONTEXT_MDRQ); + + trad_frame_set_reg_addr (this_cache, E_SP_REGNUM, + sc_base + AM33_SIGCONTEXT_SP); + trad_frame_set_reg_addr (this_cache, E_PSW_REGNUM, + sc_base + AM33_SIGCONTEXT_EPSW); + trad_frame_set_reg_addr (this_cache, E_PC_REGNUM, + sc_base + AM33_SIGCONTEXT_PC); + + fpubase = get_frame_memory_unsigned (next_frame, + sc_base + AM33_SIGCONTEXT_FPUCONTEXT, 4); + if (fpubase) + { + for (i = 0; i < 32; i++) + { + trad_frame_set_reg_addr (this_cache, E_FS0_REGNUM + i, + fpubase + 4 * i); + } + trad_frame_set_reg_addr (this_cache, E_FPCR_REGNUM, fpubase + 4 * 32); + } + + trad_frame_set_id (this_cache, frame_id_build (sc_base, func)); +} + /* AM33 Linux osabi has been recognized. Now's our chance to register our corefile handling. */ @@ -478,6 +714,9 @@ am33_linux_init_osabi (struct gdbarch_info gdbinfo, struct gdbarch *gdbarch) am33_regset_from_core_section); set_solib_svr4_fetch_link_map_offsets (gdbarch, svr4_ilp32_fetch_link_map_offsets); + + tramp_frame_prepend_unwinder (gdbarch, &am33_linux_sigframe); + tramp_frame_prepend_unwinder (gdbarch, &am33_linux_rt_sigframe); } void diff --git a/gdb/mn10300-tdep.c b/gdb/mn10300-tdep.c index 81152ad025..bc5e8d8d15 100644 --- a/gdb/mn10300-tdep.c +++ b/gdb/mn10300-tdep.c @@ -620,6 +620,17 @@ mn10300_analyze_prologue (struct frame_info *fi, [mov sp,a3] [mov sp,a3] [add -SIZE2,sp] [add -SIZE2,sp] */ + /* Remember the address at which we started in the event that we + don't ultimately find an fmov instruction. Once we're certain + that we matched one of the above patterns, we'll set + ``restore_addr'' to the appropriate value. Note: At one time + in the past, this code attempted to not adjust ``addr'' until + there was a fair degree of certainty that the pattern would be + matched. However, that code did not wait until an fmov instruction + was actually encountered. As a consequence, ``addr'' would + sometimes be advanced even when no fmov instructions were found. */ + CORE_ADDR restore_addr = addr; + /* First, look for add -SIZE,sp (i.e. add imm8,sp (0xf8feXX) or add imm16,sp (0xfafeXXXX) or add imm32,sp (0xfcfeXXXXXXXX)) */ @@ -651,10 +662,10 @@ mn10300_analyze_prologue (struct frame_info *fi, This is a one byte instruction: mov sp,aN = 0011 11XX where XX is the register number. - Skip this instruction by incrementing addr. (We're - committed now.) The "fmov" instructions will have the - form "fmov fs#,(aN+)" in this case, but that will not - necessitate a change in the "fmov" parsing logic below. */ + Skip this instruction by incrementing addr. The "fmov" + instructions will have the form "fmov fs#,(aN+)" in this + case, but that will not necessitate a change in the + "fmov" parsing logic below. */ addr++; @@ -698,6 +709,14 @@ mn10300_analyze_prologue (struct frame_info *fi, if (buf[0] != 0xf9 && buf[0] != 0xfb) break; + /* An fmov instruction has just been seen. We can + now really commit to the pattern match. Set the + address to restore at the end of this speculative + bit of code to the actually address that we've + been incrementing (or not) throughout the + speculation. */ + restore_addr = addr; + /* Get the floating point register number from the 2nd and 3rd bytes of the "fmov" instruction: Machine Code: 0000 00X0 YYYY 0000 => @@ -719,6 +738,7 @@ mn10300_analyze_prologue (struct frame_info *fi, { /* No "fmov" was found. Reread the two bytes at the original "addr" to reset the state. */ + addr = restore_addr; if (!safe_frame_unwind_memory (fi, addr, buf, 2)) goto finish_prologue; } @@ -727,8 +747,16 @@ mn10300_analyze_prologue (struct frame_info *fi, instruction. Handle this below. */ } /* else no "add -SIZE,sp" was found indicating no floating point - registers are saved in this prologue. Do not increment addr. Pretend - this bit of code never happened. */ + registers are saved in this prologue. */ + + /* In the pattern match code contained within this block, `restore_addr' + is set to the starting address at the very beginning and then + iteratively to the next address to start scanning at once the + pattern match has succeeded. Thus `restore_addr' will contain + the address to rewind to if the pattern match failed. If the + match succeeded, `restore_addr' and `addr' will already have the + same value. */ + addr = restore_addr; } /* Now see if we set up a frame pointer via "mov sp,a3" */ @@ -777,7 +805,7 @@ mn10300_analyze_prologue (struct frame_info *fi, goto finish_prologue; /* Note the size of the stack. */ - stack_extra_size += extract_signed_integer (buf, imm_size); + stack_extra_size -= extract_signed_integer (buf, imm_size); /* We just consumed 2 + imm_size bytes. */ addr += 2 + imm_size; @@ -1027,6 +1055,11 @@ mn10300_push_dummy_call (struct gdbarch *gdbarch, /* Push the return address that contains the magic breakpoint. */ sp -= 4; write_memory_unsigned_integer (sp, push_size, bp_addr); + + /* The CPU also writes the return address always into the + MDR register on "call". */ + regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr); + /* Update $sp. */ regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); return sp; diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c index 915f7c6a1a..d4f8c585e5 100644 --- a/gdb/ppc-linux-nat.c +++ b/gdb/ppc-linux-nat.c @@ -826,7 +826,7 @@ ppc_linux_region_ok_for_hw_watchpoint (CORE_ADDR addr, int len) } /* Set a watchpoint of type TYPE at address ADDR. */ -static long +static int ppc_linux_insert_watchpoint (CORE_ADDR addr, int len, int rw) { int tid; @@ -857,8 +857,8 @@ ppc_linux_insert_watchpoint (CORE_ADDR addr, int len, int rw) return ptrace (PTRACE_SET_DEBUGREG, tid, 0, dabr_value); } -static long -ppc_linux_remove_watchpoint (CORE_ADDR addr, int len) +static int +ppc_linux_remove_watchpoint (CORE_ADDR addr, int len, int rw) { int tid; ptid_t ptid = inferior_ptid; diff --git a/gdb/solib-legacy.c b/gdb/solib-legacy.c index 6789993326..eba92d0e43 100644 --- a/gdb/solib-legacy.c +++ b/gdb/solib-legacy.c @@ -69,6 +69,9 @@ legacy_svr4_fetch_link_map_offsets (void) lmo.l_next_offset = offsetof (struct link_map, l_next); lmo.l_next_size = fieldsize (struct link_map, l_next); + lmo.l_ld_offset = offsetof (struct link_map, l_ld); + lmo.l_ld_size = fieldsize (struct link_map, l_ld); + lmo.l_prev_offset = offsetof (struct link_map, l_prev); lmo.l_prev_size = fieldsize (struct link_map, l_prev); @@ -84,6 +87,10 @@ legacy_svr4_fetch_link_map_offsets (void) lmo.l_next_offset = offsetof (struct link_map, lm_next); lmo.l_next_size = fieldsize (struct link_map, lm_next); + /* FIXME: Is this the right field name, or is it available at all? */ + lmo.l_ld_offset = offsetof (struct link_map, lm_ld); + lmo.l_ld_size = fieldsize (struct link_map, lm_ld); + lmo.l_name_offset = offsetof (struct link_map, lm_name); lmo.l_name_size = fieldsize (struct link_map, lm_name); #else /* !defined(HAVE_STRUCT_LINK_MAP_WITH_LM_MEMBERS) */ @@ -98,6 +105,10 @@ legacy_svr4_fetch_link_map_offsets (void) lmo.l_name_offset = offsetof (struct so_map, som_path); lmo.l_name_size = fieldsize (struct so_map, som_path); + + /* FIXME: Is the address of the dynamic table available? */ + lmo.l_ld_offset = 0; + lmo.l_ld_size = 0; #endif /* HAVE_STRUCT_SO_MAP_WITH_SOM_MEMBERS */ #endif /* HAVE_STRUCT_LINK_MAP_WITH_LM_MEMBERS */ #endif /* HAVE_STRUCT_LINK_MAP_WITH_L_MEMBERS */ diff --git a/gdb/solib-svr4.c b/gdb/solib-svr4.c index caadb4a26d..7d740a33b4 100644 --- a/gdb/solib-svr4.c +++ b/gdb/solib-svr4.c @@ -42,6 +42,7 @@ #include "solib-svr4.h" #include "bfd-target.h" +#include "elf-bfd.h" #include "exec.h" static struct link_map_offsets *svr4_fetch_link_map_offsets (void); @@ -59,6 +60,13 @@ struct lm_info rather than void *, so that we may use byte offsets to find the various fields without the need for a cast. */ gdb_byte *lm; + + /* Amount by which addresses in the binary should be relocated to + match the inferior. This could most often be taken directly + from lm, but when prelinking is involved and the prelink base + address changes, we may need a different offset, we want to + warn about the difference and compute it only once. */ + CORE_ADDR l_addr; }; /* On SVR4 systems, a list of symbols in the dynamic linker where @@ -127,14 +135,101 @@ static char *main_name_list[] = /* link map access functions */ static CORE_ADDR -LM_ADDR (struct so_list *so) +LM_ADDR_FROM_LINK_MAP (struct so_list *so) { struct link_map_offsets *lmo = svr4_fetch_link_map_offsets (); - return (CORE_ADDR) extract_signed_integer (so->lm_info->lm + lmo->l_addr_offset, + return (CORE_ADDR) extract_signed_integer (so->lm_info->lm + + lmo->l_addr_offset, lmo->l_addr_size); } +static int +HAS_LM_DYNAMIC_FROM_LINK_MAP () +{ + struct link_map_offsets *lmo = svr4_fetch_link_map_offsets (); + + return (lmo->l_ld_size != 0); +} + +static CORE_ADDR +LM_DYNAMIC_FROM_LINK_MAP (struct so_list *so) +{ + struct link_map_offsets *lmo = svr4_fetch_link_map_offsets (); + + gdb_assert (lmo->l_ld_size != 0); + + return (CORE_ADDR) extract_signed_integer (so->lm_info->lm + + lmo->l_ld_offset, + lmo->l_ld_size); +} + +static CORE_ADDR +LM_ADDR_CHECK (struct so_list *so, bfd *abfd) +{ + if (so->lm_info->l_addr == (CORE_ADDR)-1) + { + struct bfd_section *dyninfo_sect; + CORE_ADDR l_addr, l_dynaddr, dynaddr, align = 0x1000; + + l_addr = LM_ADDR_FROM_LINK_MAP (so); + + if (! abfd || ! HAS_LM_DYNAMIC_FROM_LINK_MAP ()) + goto set_addr; + + l_dynaddr = LM_DYNAMIC_FROM_LINK_MAP (so); + + dyninfo_sect = bfd_get_section_by_name (abfd, ".dynamic"); + if (dyninfo_sect == NULL) + goto set_addr; + + dynaddr = bfd_section_vma (abfd, dyninfo_sect); + + if (dynaddr + l_addr != l_dynaddr) + { + warning (_(".dynamic section for \"%s\" " + "is not at the expected address"), so->so_name); + + if (bfd_get_flavour (abfd) == bfd_target_elf_flavour) + { + Elf_Internal_Ehdr *ehdr = elf_tdata (abfd)->elf_header; + Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr; + int i; + + align = 1; + + for (i = 0; i < ehdr->e_phnum; i++) + if (phdr[i].p_type == PT_LOAD && phdr[i].p_align > align) + align = phdr[i].p_align; + } + + /* Turn it into a mask. */ + align--; + + /* If the changes match the alignment requirements, we + assume we're using a core file that was generated by the + same binary, just prelinked with a different base offset. + If it doesn't match, we may have a different binary, the + same binary with the dynamic table loaded at an unrelated + location, or anything, really. To avoid regressions, + don't adjust the base offset in the latter case, although + odds are that, if things really changed, debugging won't + quite work. */ + if ((l_addr & align) == 0 && ((dynaddr - l_dynaddr) & align) == 0) + { + l_addr = l_dynaddr - dynaddr; + warning (_("difference appears to be caused by prelink, " + "adjusting expectations")); + } + } + + set_addr: + so->lm_info->l_addr = l_addr; + } + + return so->lm_info->l_addr; +} + static CORE_ADDR LM_NEXT (struct so_list *so) { @@ -649,6 +744,8 @@ svr4_current_sos (void) free_so (new); else { + new->lm_info->l_addr = (CORE_ADDR)-1; + new->next = 0; *link_ptr = new; link_ptr = &new->next; @@ -912,7 +1009,7 @@ enable_break (void) if (strcmp (buf, so->so_original_name) == 0) { load_addr_found = 1; - load_addr = LM_ADDR (so); + load_addr = LM_ADDR_CHECK (so, tmp_bfd); break; } so = so->next; @@ -1272,8 +1369,10 @@ static void svr4_relocate_section_addresses (struct so_list *so, struct section_table *sec) { - sec->addr = svr4_truncate_ptr (sec->addr + LM_ADDR (so)); - sec->endaddr = svr4_truncate_ptr (sec->endaddr + LM_ADDR (so)); + sec->addr = svr4_truncate_ptr (sec->addr + LM_ADDR_CHECK (so, + sec->bfd)); + sec->endaddr = svr4_truncate_ptr (sec->endaddr + LM_ADDR_CHECK (so, + sec->bfd)); } @@ -1362,6 +1461,8 @@ svr4_ilp32_fetch_link_map_offsets (void) lmo.l_addr_size = 4; lmo.l_name_offset = 4; lmo.l_name_size = 4; + lmo.l_ld_offset = 8; + lmo.l_ld_size = 4; lmo.l_next_offset = 12; lmo.l_next_size = 4; lmo.l_prev_offset = 16; @@ -1395,6 +1496,8 @@ svr4_lp64_fetch_link_map_offsets (void) lmo.l_addr_size = 8; lmo.l_name_offset = 8; lmo.l_name_size = 8; + lmo.l_ld_offset = 16; + lmo.l_ld_size = 8; lmo.l_next_offset = 24; lmo.l_next_size = 8; lmo.l_prev_offset = 32; diff --git a/gdb/solib-svr4.h b/gdb/solib-svr4.h index ae2740e0de..58b41e0358 100644 --- a/gdb/solib-svr4.h +++ b/gdb/solib-svr4.h @@ -50,6 +50,12 @@ struct link_map_offsets /* Size of l_addr field in struct link_map. */ int l_addr_size; + /* Offset to l_ld field in struct link_map. */ + int l_ld_offset; + + /* Size of l_ld field in struct link_map. */ + int l_ld_size; + /* Offset to l_next field in struct link_map. */ int l_next_offset; diff --git a/gdb/somread.c b/gdb/somread.c index b58e69c7ca..c187d13c1d 100644 --- a/gdb/somread.c +++ b/gdb/somread.c @@ -353,9 +353,7 @@ som_symfile_read (struct objfile *objfile, int mainline) do_cleanups (back_to); /* Now read information from the stabs debug sections. - This is a no-op for SOM. - Perhaps it is intended for some kind of mixed STABS/SOM - situation? */ + This is emitted by gcc. */ stabsect_build_psymtabs (objfile, mainline, "$GDB_SYMBOLS$", "$GDB_STRINGS$", "$TEXT$"); @@ -364,9 +362,6 @@ som_symfile_read (struct objfile *objfile, int mainline) the DNTT, but is now done via the PXDB-built quick-lookup tables together with a scan of the GNTT. See hp-psymtab-read.c. */ hpread_build_psymtabs (objfile, mainline); - - /* Force hppa-tdep.c to re-read the unwind descriptors. */ - objfile->deprecated_obj_private = NULL; } /* Initialize anything that needs initializing when a completely new symbol diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog index d271dd5ff3..888069add2 100644 --- a/gdb/testsuite/ChangeLog +++ b/gdb/testsuite/ChangeLog @@ -1,3 +1,13 @@ +2006-03-01 Daniel Jacobowitz <dan@codesourcery.com> + + * gdb.cp/inherit.exp (test_print_mi_member_types): New function. + (do_tests): Call it. + +2006-02-28 Alexandre Oliva <aoliva@redhat.com> + + * gdb.base/prelink.exp: New test. + * gdb.base/prelink.c, gdb.base/prelink-lib.c: New sources. + 2006-02-24 Wu Zhou <woodzltc@cn.ibm.com> * gdb.fortran/derived-type.f90: New file. diff --git a/gdb/testsuite/gdb.base/prelink-lib.c b/gdb/testsuite/gdb.base/prelink-lib.c new file mode 100644 index 0000000000..2a712ba434 --- /dev/null +++ b/gdb/testsuite/gdb.base/prelink-lib.c @@ -0,0 +1,34 @@ +/* This testcase is part of GDB, the GNU debugger. + + Copyright 2006 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +*/ + +int +g (void (*p)(void)) +{ + p (); +} + +void +f(void (*p)(void)) { + g (p); +} + +void (*h (void)) (void (*p)(void)) +{ + return f; +} diff --git a/gdb/testsuite/gdb.base/prelink.c b/gdb/testsuite/gdb.base/prelink.c new file mode 100644 index 0000000000..c63d35b2b7 --- /dev/null +++ b/gdb/testsuite/gdb.base/prelink.c @@ -0,0 +1,30 @@ +/* This testcase is part of GDB, the GNU debugger. + + Copyright 2006 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +*/ + +#include <stdio.h> + +extern void (*h (void)) (void (*)(void)); + +int +main (void) +{ + void (*f) (void (*)(void)) = h (); + printf ("%p\n", f); + f (0); +} diff --git a/gdb/testsuite/gdb.base/prelink.exp b/gdb/testsuite/gdb.base/prelink.exp new file mode 100644 index 0000000000..c26d20e278 --- /dev/null +++ b/gdb/testsuite/gdb.base/prelink.exp @@ -0,0 +1,128 @@ +# Copyright 2006 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +# Please email any bugs, comments, and/or additions to this file to: +# bug-gdb@prep.ai.mit.edu + +# This file was written by Alexandre Oliva <aoliva@redhat.com> + +if $tracelevel then { + strace $tracelevel + } + +set prms_id 0 +set bug_id 0 + +# are we on a target board +if ![isnative] then { + return +} + +if [get_compiler_info "ignored"] { + return -1 +} + +if {$gcc_compiled == 0} { + return -1 +} + +set testfile "prelink" +set srcfile ${testfile}.c +set binfile ${objdir}/${subdir}/${testfile} + +set libsrcfile ${testfile}-lib.c +set libfile ${objdir}/${subdir}/${testfile}.so +if { [gdb_compile "${srcdir}/${subdir}/${libsrcfile}" "${libfile}" executable [list debug "additional_flags=-fpic -shared -nodefaultlibs"]] != ""} { + # If creating the shared library fails, maybe we don't have the right tools + return -1 +} + +if {[catch "system \"prelink -NR ${libfile}\""] != 0} { + # Maybe we don't have prelink. + return -1 +} + +set srcfile ${testfile}.c +set binfile ${objdir}/${subdir}/${testfile} +if { [gdb_compile "${srcdir}/${subdir}/${srcfile} ${libfile}" "${binfile}" executable [list debug "additional_flags=-Wl,-rpath,${objdir}/${subdir}"]] != ""} { + return -1; +} + +set found 0 +set coredir "${objdir}/${subdir}/coredir.[getpid]" +file mkdir $coredir +catch "system \"(cd ${coredir}; ulimit -c unlimited; ${binfile}; true) >/dev/null 2>&1\"" + +foreach i "${coredir}/core ${coredir}/core.coremaker.c ${binfile}.core" { + if [remote_file build exists $i] { + remote_exec build "mv $i ${objdir}/${subdir}/prelink.core" + set found 1 + } +} +# Check for "core.PID". +if { $found == 0 } { + set names [glob -nocomplain -directory $coredir core.*] + if {[llength $names] == 1} { + set corefile [file join $coredir [lindex $names 0]] + remote_exec build "mv $corefile ${objdir}/${subdir}/prelink.core" + set found 1 + } +} + +catch "system \"prelink -u ${libfile}\"" +catch "system \"prelink -NR ${libfile}\"" + +# Try to clean up after ourselves. +remote_file build delete [file join $coredir coremmap.data] +remote_exec build "rmdir $coredir" + +if { $found == 0 } { + warning "can't generate a core file - prelink tests suppressed - check ulimit -c" + return 0 +} + +# Start with a fresh gdb + +gdb_exit +gdb_start +gdb_reinitialize_dir $srcdir/$subdir +gdb_load ${binfile} + +set oldtimeout $timeout +set timeout [expr "$timeout + 60"] +verbose "Timeout is now $timeout seconds" 2 +send_gdb "core-file $objdir/$subdir/prelink.core\n" +gdb_expect { + -re "warning: \.dynamic section.*not at the expected address" { + pass "changed base address" + } + -re ".*$gdb_prompt $" { fail "changed base address" } + timeout { fail "(timeout) changed base address" } +} +gdb_expect { + -re "warning: difference.*caused by prelink, adjusting" { + pass "prelink adjustment" + } + -re ".*$gdb_prompt $" { fail "prelink adjustment" } + timeout { fail "(timeout) prelink adjustment" } +} +set timeout $oldtimeout +verbose "Timeout is now $timeout seconds" 2 + +gdb_exit + +return 0 + diff --git a/gdb/testsuite/gdb.cp/inherit.exp b/gdb/testsuite/gdb.cp/inherit.exp index 9ae1c1e2f3..e90c0c68e1 100644 --- a/gdb/testsuite/gdb.cp/inherit.exp +++ b/gdb/testsuite/gdb.cp/inherit.exp @@ -1,5 +1,5 @@ # Copyright 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003, -# 2004 Free Software Foundation, Inc. +# 2004, 2006 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -373,6 +373,127 @@ proc test_print_mi_members {} { gdb_test "print g_E.E::x" "$vhn = 32" } +# Multiple inheritance, print individual member types. + +proc test_print_mi_member_types {} { + global gdb_prompt + global nl + global vhn + + # Print the types of some members of g_D without qualifying them. + gdb_test "ptype g_D.b" "type = int" + gdb_test "ptype g_D.c" "type = int" + gdb_test "ptype g_D.d" "type = int" + + # Print the types of qualified members; none of these tests pass today. + + # Print all members of g_A. + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_A.A::a" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_A.A::x" "type = int" + + # Print all members of g_B. + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_B.A::a" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_B.A::x" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_B.B::b" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_B.B::x" "type = int" + + # Print all members of g_C. + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_C.A::a" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_C.A::x" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_C.C::c" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_C.C::x" "type = int" + + # Print all members of g_D. + # + # g_D.A::a and g_D.A::x are ambiguous member accesses, and gdb + # should detect these. There are no ways to PASS these tests + # because I don't know what the gdb message will be. -- chastain + # 2004-01-27. + + set name "ptype g_D.A::a" + gdb_test_multiple "ptype g_D.A::a" $name { + -re "Attempt to take address of non-lval$nl$gdb_prompt $" { + kfail "gdb/2092" "$name" + } + -re "type = int$nl$gdb_prompt $" { + kfail "gdb/68" "ptype g_D.A::a" + } + } + + set name "ptype g_D.A::x" + gdb_test_multiple "ptype g_D.A::x" $name { + -re "Attempt to take address of non-lval$nl$gdb_prompt $" { + kfail "gdb/2092" "$name" + } + -re "type = int$nl$gdb_prompt $" { + kfail "gdb/68" "ptype g_D.A::x" + } + } + + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_D.B::b" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_D.B::x" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_D.C::c" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_D.C::x" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_D.D::d" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_D.D::x" "type = int" + + # Print all members of g_E. + # g_E.A::a and g_E.A::x are ambiguous. + + set name "ptype g_E.A::a" + gdb_test_multiple "ptype g_E.A::a" $name { + -re "Attempt to take address of non-lval$nl$gdb_prompt $" { + kfail "gdb/2092" "$name" + } + -re "type = int$nl$gdb_prompt $" { + kfail "gdb/68" "ptype g_E.A::a" + } + } + + set name "ptype g_E.A::x" + gdb_test_multiple "ptype g_E.A::x" $name { + -re "Attempt to take address of non-lval$nl$gdb_prompt $" { + kfail "gdb/2092" "$name" + } + -re "type = int$nl$gdb_prompt $" { + kfail "gdb/68" "ptype g_E.A::x" + } + } + + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_E.B::b" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_E.B::x" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_E.C::c" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_E.C::x" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_E.D::d" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_E.D::x" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_E.E::e" "type = int" + setup_kfail "gdb/2092" "*-*-*" + gdb_test "ptype g_E.E::x" "type = int" +} + # Multiple inheritance, print complete classes. proc test_print_mi_classes { } { @@ -668,6 +789,7 @@ proc do_tests { } { test_print_si_members test_print_si_classes test_print_mi_members + test_print_mi_member_types test_print_mi_classes test_print_anon_union diff --git a/gdb/version.in b/gdb/version.in index 4e0cf04573..562141bc1b 100644 --- a/gdb/version.in +++ b/gdb/version.in @@ -1 +1 @@ -6.4.50.20060226-cvs +6.4.50.20060303-cvs diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index 9977e9fc89..27665852b0 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,32 @@ +2006-03-03 Bjoern Haase <bjoern.m.haase@web.de> + + * avr.h (R_AVR_MS8_LDI,R_AVR_MS8_LDI_NEG): Add. + (EF_AVR_LINKRELAX_PREPARED): Add. + +2006-03-02 Ben Elliston <bje@au.ibm.com> + + Import from the GCC tree: + 2006-03-01 Jakub Jelinek <jakub@redhat.com> + + * dwarf2.h (DW_TAG_condition, DW_TAG_shared_type): New constants + from DWARF 3. + (DW_AT_description, DW_AT_binary_scale, DW_AT_decimal_scale, + DW_AT_small, DW_AT_decimal_sign, DW_AT_digit_count, + DW_AT_picture_string, DW_AT_mutable, DW_AT_threads_scaled, + DW_AT_explicit, DW_AT_object_pointer, DW_AT_endianity, + DW_AT_elemental, DW_AT_pure, DW_AT_recursive): New. + (DW_OP_form_tls_address, DW_OP_call_frame_cfa, DW_OP_bit_piece): New. + (DW_ATE_packed_decimal, DW_ATE_numeric_string, DW_ATE_edited, + DW_ATE_signed_fixed, DW_ATE_unsigned_fixed): New. + (DW_DS_unsigned, DW_DS_leading_overpunch, DW_DS_trailing_overpunch, + DW_DS_leading_separate, DW_DS_trailing_separate): New. + (DW_END_default, DW_END_big, DW_END_little): New. + (DW_END_lo_user, DW_END_hi_user): Define. + (DW_LNE_lo_user, DW_LNE_hi_user): Define. + (DW_CFA_val_offset, DW_CFA_val_offset_sf, DW_CFA_val_expression): New. + (DW_LANG_PLI, DW_LANG_ObjC, DW_LANG_ObjC_plus_plus, DW_LANG_UPC, + DW_LANG_D): New. + 2006-02-24 DJ Delorie <dj@redhat.com> * m32c.h: Add relax relocs. diff --git a/include/elf/avr.h b/include/elf/avr.h index 68b4d9539d..f16043805e 100644 --- a/include/elf/avr.h +++ b/include/elf/avr.h @@ -26,6 +26,10 @@ /* Processor specific flags for the ELF header e_flags field. */ #define EF_AVR_MACH 0xf +/* If bit #7 is set, it is assumed that the elf file uses local symbols + as reference for the relocations so that linker relaxation is possible. */ +#define EF_AVR_LINKRELAX_PREPARED 0x80 + #define E_AVR_MACH_AVR1 1 #define E_AVR_MACH_AVR2 2 #define E_AVR_MACH_AVR3 3 @@ -56,6 +60,8 @@ START_RELOC_NUMBERS (elf_avr_reloc_type) RELOC_NUMBER (R_AVR_LDI, 19) RELOC_NUMBER (R_AVR_6, 20) RELOC_NUMBER (R_AVR_6_ADIW, 21) + RELOC_NUMBER (R_AVR_MS8_LDI, 22) + RELOC_NUMBER (R_AVR_MS8_LDI_NEG, 23) END_RELOC_NUMBERS (R_AVR_max) #endif /* _ELF_AVR_H */ diff --git a/include/elf/dwarf2.h b/include/elf/dwarf2.h index 268bae58e2..264952af13 100644 --- a/include/elf/dwarf2.h +++ b/include/elf/dwarf2.h @@ -1,7 +1,7 @@ -/* Declarations and definitions of codes relating to the DWARF2 symbolic - debugging information format. +/* Declarations and definitions of codes relating to the DWARF2 and + DWARF3 symbolic debugging information formats. Copyright (C) 1992, 1993, 1995, 1996, 1997, 1999, 2000, 2001, 2002, - 2003, 2005 Free Software Foundation, Inc. + 2003, 2004, 2005, 2006 Free Software Foundation, Inc. Written by Gary Funck (gary@intrepid.com) The Ada Joint Program Office (AJPO), Florida State University and Silicon Graphics Inc. @@ -187,6 +187,8 @@ enum dwarf_tag DW_TAG_unspecified_type = 0x3b, DW_TAG_partial_unit = 0x3c, DW_TAG_imported_unit = 0x3d, + DW_TAG_condition = 0x3f, + DW_TAG_shared_type = 0x40, /* SGI/MIPS Extensions. */ DW_TAG_MIPS_loop = 0x4081, /* HP extensions. See: ftp://ftp.hp.com/pub/lang/tools/WDB/wdb-4.0.tar.gz . */ @@ -317,6 +319,21 @@ enum dwarf_attribute DW_AT_call_column = 0x57, DW_AT_call_file = 0x58, DW_AT_call_line = 0x59, + DW_AT_description = 0x5a, + DW_AT_binary_scale = 0x5b, + DW_AT_decimal_scale = 0x5c, + DW_AT_small = 0x5d, + DW_AT_decimal_sign = 0x5e, + DW_AT_digit_count = 0x5f, + DW_AT_picture_string = 0x60, + DW_AT_mutable = 0x61, + DW_AT_threads_scaled = 0x62, + DW_AT_explicit = 0x63, + DW_AT_object_pointer = 0x64, + DW_AT_endianity = 0x65, + DW_AT_elemental = 0x66, + DW_AT_pure = 0x67, + DW_AT_recursive = 0x68, /* SGI/MIPS extensions. */ DW_AT_MIPS_fde = 0x2001, DW_AT_MIPS_loop_begin = 0x2002, @@ -518,6 +535,9 @@ enum dwarf_location_atom DW_OP_call2 = 0x98, DW_OP_call4 = 0x99, DW_OP_call_ref = 0x9a, + DW_OP_form_tls_address = 0x9b, + DW_OP_call_frame_cfa = 0x9c, + DW_OP_bit_piece = 0x9d, /* GNU extensions. */ DW_OP_GNU_push_tls_address = 0xe0, /* HP extensions. */ @@ -547,6 +567,11 @@ enum dwarf_type DW_ATE_unsigned_char = 0x8, /* DWARF 3. */ DW_ATE_imaginary_float = 0x9, + DW_ATE_packed_decimal = 0xa, + DW_ATE_numeric_string = 0xb, + DW_ATE_edited = 0xc, + DW_ATE_signed_fixed = 0xd, + DW_ATE_unsigned_fixed = 0xe, DW_ATE_decimal_float = 0xf, /* HP extensions. */ DW_ATE_HP_float80 = 0x80, /* Floating-point (80 bit). */ @@ -561,6 +586,29 @@ enum dwarf_type #define DW_ATE_lo_user 0x80 #define DW_ATE_hi_user 0xff +/* Decimal sign encodings. */ +enum dwarf_decimal_sign_encoding + { + /* DWARF 3. */ + DW_DS_unsigned = 0x01, + DW_DS_leading_overpunch = 0x02, + DW_DS_trailing_overpunch = 0x03, + DW_DS_leading_separate = 0x04, + DW_DS_trailing_separate = 0x05 + }; + +/* Endianity encodings. */ +enum dwarf_endianity_encoding + { + /* DWARF 3. */ + DW_END_default = 0x00, + DW_END_big = 0x01, + DW_END_little = 0x02 + }; + +#define DW_END_lo_user 0x40 +#define DW_END_hi_user 0xff + /* Array ordering names and codes. */ enum dwarf_array_dim_ordering { @@ -667,6 +715,9 @@ enum dwarf_line_number_x_ops DW_LNE_HP_define_proc = 0x20 }; +#define DW_LNE_lo_user 0x80 +#define DW_LNE_hi_user 0xff + /* Call frame information. */ enum dwarf_call_frame_info { @@ -694,6 +745,9 @@ enum dwarf_call_frame_info DW_CFA_offset_extended_sf = 0x11, DW_CFA_def_cfa_sf = 0x12, DW_CFA_def_cfa_offset_sf = 0x13, + DW_CFA_val_offset = 0x14, + DW_CFA_val_offset_sf = 0x15, + DW_CFA_val_expression = 0x16, /* SGI/MIPS specific. */ DW_CFA_MIPS_advance_loc8 = 0x1d, /* GNU extensions. */ @@ -727,11 +781,16 @@ enum dwarf_source_language DW_LANG_Fortran90 = 0x0008, DW_LANG_Pascal83 = 0x0009, DW_LANG_Modula2 = 0x000a, - DW_LANG_Java = 0x000b, /* DWARF 3. */ + DW_LANG_Java = 0x000b, DW_LANG_C99 = 0x000c, DW_LANG_Ada95 = 0x000d, DW_LANG_Fortran95 = 0x000e, + DW_LANG_PLI = 0x000f, + DW_LANG_ObjC = 0x0010, + DW_LANG_ObjC_plus_plus = 0x0011, + DW_LANG_UPC = 0x0012, + DW_LANG_D = 0x0013, /* MIPS. */ DW_LANG_Mips_Assembler = 0x8001, /* UPC. */ diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 76b797834b..9edfd3f3b9 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2006-02-27 H.J. Lu <hongjiu.lu@intel.com> + + * i386.h (i386_optab): Support Intel Merom New Instructions. + 2006-02-24 Paul Brook <paul@codesourcery.com> * arm.h: Add V7 feature bits. diff --git a/include/opcode/i386.h b/include/opcode/i386.h index 33f94cc628..2b2c1e0f97 100644 --- a/include/opcode/i386.h +++ b/include/opcode/i386.h @@ -1379,6 +1379,41 @@ static const template i386_optab[] = {"vmxoff", 0, 0x0f01, 0xc4, CpuVMX, NoSuf|ImmExt, { 0, 0, 0} }, {"vmxon", 1, 0xf30fc7, 6, CpuVMX, NoSuf|IgnoreSize|Modrm|NoRex64, { LLongMem, 0, 0} }, +/* Merom New Instructions. */ + +{"phaddw", 2, 0x0f3801,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"phaddw", 2, 0x660f3801,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"phaddd", 2, 0x0f3802,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"phaddd", 2, 0x660f3802,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"phaddsw", 2, 0x0f3803,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"phaddsw", 2, 0x660f3803,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"phsubw", 2, 0x0f3805,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"phsubw", 2, 0x660f3805,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"phsubd", 2, 0x0f3806,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"phsubd", 2, 0x660f3806,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"phsubsw", 2, 0x0f3807,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"phsubsw", 2, 0x660f3807,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"pmaddubsw", 2, 0x0f3804,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pmaddubsw", 2, 0x660f3804,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"pmulhrsw", 2, 0x0f380b,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pmulhrsw", 2, 0x660f380b,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"pshufb", 2, 0x0f3800,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pshufb", 2, 0x660f3800,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"psignb", 2, 0x0f3808,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psignb", 2, 0x660f3808,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"psignw", 2, 0x0f3809,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psignw", 2, 0x660f3809,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"psignd", 2, 0x0f380a,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psignd", 2, 0x660f380a,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"palignr", 3, 0x0f3a0f,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { Imm8, RegMMX|LongMem, RegMMX } }, +{"palignr", 3, 0x660f3a0f,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } }, +{"pabsb", 2, 0x0f381c,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pabsb", 2, 0x660f381c,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"pabsw", 2, 0x0f381d,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pabsw", 2, 0x660f381d,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"pabsd", 2, 0x0f381e,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pabsd", 2, 0x660f381e,X, CpuMNI, NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, + /* AMD 3DNow! instructions. */ {"prefetch", 1, 0x0f0d, 0, Cpu3dnow, NoSuf|IgnoreSize|Modrm, { ByteMem, 0, 0 } }, @@ -3550,7 +3550,7 @@ EOF # Now hardcode the library paths rpath= hardcode_libdirs= - for libdir in $compile_rpath $finalize_rpath; do + for libdir in $compile_rpath; do if test -n "$hardcode_libdir_flag_spec"; then if test -n "$hardcode_libdir_separator"; then if test -z "$hardcode_libdirs"; then diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index d97df75a4f..8d9094a2c5 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,27 @@ +2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com) + + * xc16x-asm.c: Regenerate. + * xc16x-dis.c: Regenerate. + * xc16x-ibld.c: Regenerate. + +2006-02-27 Carlos O'Donell <carlos@codesourcery.com> + + * po/Make-in: Add html target. + +2006-02-27 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by + Intel Merom New Instructions. + (THREE_BYTE_0): Likewise. + (THREE_BYTE_1): Likewise. + (three_byte_table): Likewise. + (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use + THREE_BYTE_1 for entry 0x3a. + (twobyte_has_modrm): Updated. + (twobyte_uses_SSE_prefix): Likewise. + (print_insn): Handle 3-byte opcodes used by Intel Merom New + Instructions. + 2006-02-24 David S. Miller <davem@sunset.davemloft.net> * sparc-dis.c (v9_priv_reg_names): Add "gl" entry. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 4fb487d5a4..06a842eef7 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -388,6 +388,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define USE_GROUPS 2 #define USE_PREFIX_USER_TABLE 3 #define X86_64_SPECIAL 4 +#define IS_3BYTE_OPCODE 5 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0 @@ -453,6 +454,9 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0 +#define THREE_BYTE_0 NULL, NULL, IS_3BYTE_OPCODE, NULL, 0, NULL, 0 +#define THREE_BYTE_1 NULL, NULL, IS_3BYTE_OPCODE, NULL, 1, NULL, 0 + typedef void (*op_rtn) (int bytemode, int sizeflag); struct dis386 { @@ -858,9 +862,9 @@ static const struct dis386 dis386_twobyte[] = { { "(bad)", XX, XX, XX }, { "(bad)", XX, XX, XX }, /* 38 */ + { THREE_BYTE_0 }, { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, - { "(bad)", XX, XX, XX }, + { THREE_BYTE_1 }, { "(bad)", XX, XX, XX }, { "(bad)", XX, XX, XX }, { "(bad)", XX, XX, XX }, @@ -1113,7 +1117,7 @@ static const unsigned char twobyte_has_modrm[256] = { /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */ /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */ /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */ - /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ + /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */ /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */ /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */ /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */ @@ -1136,7 +1140,7 @@ static const unsigned char twobyte_uses_SSE_prefix[256] = { /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */ /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */ - /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ + /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */ /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */ @@ -1749,6 +1753,79 @@ static const struct dis386 x86_64_table[][2] = { }, }; +static const struct dis386 three_byte_table[][32] = { + /* THREE_BYTE_0 */ + { + { "pshufb", MX, EM, XX }, + { "phaddw", MX, EM, XX }, + { "phaddd", MX, EM, XX }, + { "phaddsw", MX, EM, XX }, + { "pmaddubsw", MX, EM, XX }, + { "phsubw", MX, EM, XX }, + { "phsubd", MX, EM, XX }, + { "phsubsw", MX, EM, XX }, + { "psignb", MX, EM, XX }, + { "psignw", MX, EM, XX }, + { "psignd", MX, EM, XX }, + { "pmulhrsw", MX, EM, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "pabsb", MX, EM, XX }, + { "pabsw", MX, EM, XX }, + { "pabsd", MX, EM, XX }, + { "(bad)", XX, XX, XX } + }, + /* THREE_BYTE_1 */ + { + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "palignr", MX, EM, Ib }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX }, + { "(bad)", XX, XX, XX } + }, +}; + #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>") static void @@ -2206,7 +2283,15 @@ print_insn (bfd_vma pc, disassemble_info *info) } } - if (need_modrm) + if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE) + { + FETCH_DATA (info, codep + 2); + dp = &three_byte_table[dp->bytemode2][*codep++]; + mod = (*codep >> 6) & 3; + reg = (*codep >> 3) & 7; + rm = *codep & 7; + } + else if (need_modrm) { FETCH_DATA (info, codep + 1); mod = (*codep >> 6) & 3; diff --git a/opcodes/po/Make-in b/opcodes/po/Make-in index 67ddb0b1b2..5e35426ec1 100644 --- a/opcodes/po/Make-in +++ b/opcodes/po/Make-in @@ -185,7 +185,7 @@ check: all cat-id-tbl.o: ../intl/libgettext.h -dvi info tags TAGS ID: +html dvi info tags TAGS ID: mostlyclean: rm -f core core.* *.pox $(PACKAGE).po *.old.po cat-id-tbl.tmp diff --git a/opcodes/xc16x-asm.c b/opcodes/xc16x-asm.c index eb3a0e51b1..63d7318ce0 100644 --- a/opcodes/xc16x-asm.c +++ b/opcodes/xc16x-asm.c @@ -58,8 +58,11 @@ parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, long *valuep ATTRIBUTE_UNUSED) { if (**strp == '#') - ++*strp; - return NULL; + { + ++*strp; + return NULL; + } + return _("Missing '#' prefix"); } /* Handle '.' prefixes (i.e. skip over them). */ @@ -71,11 +74,14 @@ parse_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, long *valuep ATTRIBUTE_UNUSED) { if (**strp == '.') - ++*strp; - return NULL; + { + ++*strp; + return NULL; + } + return _("Missing '.' prefix"); } -/* Handle '.' prefixes (i.e. skip over them). */ +/* Handle 'pof:' prefixes (i.e. skip over them). */ static const char * parse_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -83,12 +89,15 @@ parse_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, int opindex ATTRIBUTE_UNUSED, long *valuep ATTRIBUTE_UNUSED) { - if (!strncasecmp (*strp, "pof:", 4)) - *strp += 4; - return NULL; + if (strncasecmp (*strp, "pof:", 4) == 0) + { + *strp += 4; + return NULL; + } + return _("Missing 'pof:' prefix"); } -/* Handle '.' prefixes (i.e. skip over them). */ +/* Handle 'pag:' prefixes (i.e. skip over them). */ static const char * parse_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -96,33 +105,44 @@ parse_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, int opindex ATTRIBUTE_UNUSED, long *valuep ATTRIBUTE_UNUSED) { - if (!strncasecmp (*strp, "pag:", 4)) - *strp += 4; - return NULL; + if (strncasecmp (*strp, "pag:", 4) == 0) + { + *strp += 4; + return NULL; + } + return _("Missing 'pag:' prefix"); } /* Handle 'sof' prefixes (i.e. skip over them). */ + static const char * parse_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, int opindex ATTRIBUTE_UNUSED, long *valuep ATTRIBUTE_UNUSED) { - if (!strncasecmp (*strp, "sof:", 4)) - *strp += 4; - return NULL; + if (strncasecmp (*strp, "sof:", 4) == 0) + { + *strp += 4; + return NULL; + } + return _("Missing 'sof:' prefix"); } /* Handle 'seg' prefixes (i.e. skip over them). */ + static const char * parse_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, int opindex ATTRIBUTE_UNUSED, long *valuep ATTRIBUTE_UNUSED) { - if (!strncasecmp (*strp, "seg:", 4)) - *strp += 4; - return NULL; + if (strncasecmp (*strp, "seg:", 4) == 0) + { + *strp += 4; + return NULL; + } + return _("Missing 'seg:' prefix"); } /* -- */ diff --git a/opcodes/xc16x-dis.c b/opcodes/xc16x-dis.c index 5d60879b35..6efc89b031 100644 --- a/opcodes/xc16x-dis.c +++ b/opcodes/xc16x-dis.c @@ -72,7 +72,7 @@ static int read_insn } \ while (0) -/* Handle '.' prefixes as operands. */ +/* Print a 'pof:' prefix to an operand. */ static void print_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -84,7 +84,7 @@ print_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { } -/* Handle '.' prefixes as operands. */ +/* Print a 'pag:' prefix to an operand. */ static void print_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -96,7 +96,7 @@ print_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { } -/* Handle '.' prefixes as operands. */ +/* Print a 'sof:' prefix to an operand. */ static void print_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -111,7 +111,7 @@ print_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, info->fprintf_func (info->stream, "sof:"); } -/* Handle '.' prefixes as operands. */ +/* Print a 'seg:' prefix to an operand. */ static void print_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -126,7 +126,7 @@ print_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, info->fprintf_func (info->stream, "seg:"); } -/* Handle '#' prefixes as operands. */ +/* Print a '#' prefix to an operand. */ static void print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, @@ -141,7 +141,7 @@ print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, info->fprintf_func (info->stream, "#"); } -/* Handle '.' prefixes as operands. */ +/* Print a '.' prefix to an operand. */ static void print_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |