diff options
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm845.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845.dtsi | 24 |
1 files changed, 19 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 11e5ff0f47c7..58fbef65fe2b 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -804,15 +804,24 @@ clock-names = "core"; }; - gpi_dma0: qcom,gpi-dma@0x800000 { + gpi_dma0: dma@800000 { #dma-cells = <5>; compatible = "qcom,gpi-dma"; reg = <0 0x00800000 0 0x60000>; reg-names = "gpi-top"; - interrupts = <0 244 0>, <0 245 0>, <0 246 0>, <0 247 0>, - <0 248 0>, <0 249 0>, <0 250 0>, <0 251 0>, - <0 252 0>, <0 253 0>, <0 254 0>, <0 255 0>, - <0 256 0>; + interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; qcom,max-num-gpii = <13>; qcom,gpii-mask = <0xfa>; qcom,ev-factor = <2>; @@ -827,6 +836,7 @@ clock-names = "m-ahb", "s-ahb"; clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; + iommus = <&apps_smmu 0x003 0>; #address-cells = <2>; #size-cells = <2>; ranges; @@ -855,6 +865,9 @@ interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + dmas = <&gpi_dma0 0 0 1 64 0>, + <&gpi_dma0 1 0 1 64 0>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -1135,6 +1148,7 @@ clock-names = "m-ahb", "s-ahb"; clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; + iommus = <&apps_smmu 0x6c3 0x0>; #address-cells = <2>; #size-cells = <2>; ranges; |