aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/socfpga_vt.dts
blob: a77846f73b343eec472b7977e89926a0b426cc8a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2013 Altera Corporation <www.altera.com>
 */

/dts-v1/;
#include "socfpga.dtsi"

/ {
	model = "Altera SOCFPGA VT";
	compatible = "altr,socfpga-vt", "altr,socfpga";

	chosen {
		bootargs = "console=ttyS0,57600";
	};

	memory@0 {
		name = "memory";
		device_type = "memory";
		reg = <0x0 0x40000000>; /* 1 GB */
	};

	soc {
		clkmgr@ffd04000 {
			clocks {
				osc1 {
					clock-frequency = <10000000>;
				};
			};
		};

		dwmmc0@ff704000 {
			broken-cd;
			bus-width = <4>;
			cap-mmc-highspeed;
			cap-sd-highspeed;
		};

		ethernet@ff700000 {
			phy-mode = "gmii";
			status = "okay";
		};

		timer0@ffc08000 {
			clock-frequency = <7000000>;
		};

		timer1@ffc09000 {
			clock-frequency = <7000000>;
		};

		timer2@ffd00000 {
			clock-frequency = <7000000>;
		};

		timer3@ffd01000 {
			clock-frequency = <7000000>;
		};

		serial0@ffc02000 {
			clock-frequency = <7372800>;
		};

		serial1@ffc03000 {
			clock-frequency = <7372800>;
		};

		sysmgr@ffd08000 {
			cpu1-start-addr = <0xffd08010>;
		};
	};
};

&gmac0 {
	status = "okay";
	phy-mode = "gmii";
};