aboutsummaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h
AgeCommit message (Expand)Author
2022-05-04drm/amdgpu: add nbio v4_3_0 ip block v2Stanley.Yang
2022-04-28drm/amdgpu: add nbio callback to query rom offsetHawking Zhang
2022-04-08drm/amdgpu: expand cg_flags from u32 to u64Evan Quan
2022-03-02drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in nbio ras ...yipechai
2022-03-02drm/amdgpu: Modify .ras_fini function pointer parameteryipechai
2022-02-17drm/amdgpu: Modify .ras_late_init function pointer parameteryipechai
2022-01-14drm/amdgpu: Modify nbio block to fit for the unified ras block data and opsyipechai
2021-07-23drm/amdgpu: Clear doorbell interrupt status for Sienna CichlidChengzhe Liu
2021-06-30drm/amdgpu: fix the hang caused by PCIe link width switchEvan Quan
2021-06-30drm/amdgpu: fix NAK-G generation during PCI-e link width switchEvan Quan
2021-04-09drm/amdgpu: split nbio callbacks into ras and non-ras onesHawking Zhang
2021-02-09drm/amdgpu: support ASPM for some specific ASICLikun Gao
2021-01-05drm/amdgpu: remove redundant logic related HDPLikun Gao
2020-10-15drm/amdgpu: add interface for setting ASPMEvan Quan
2020-10-05drm/amdgpu: add pcie port indirect read and write on nvHuang Rui
2020-04-01drm/amdgpu: cleanup all virtualization detection routineMonk Liu
2019-10-15drm/amdgpu/soc15: disable doorbell interrupt as part of BACO entry sequenceLe Ma
2019-10-03drm/amdgpu: add ras fini for nbioTao Zhou
2019-09-16drm/amdgpu: add ras error query count interface for nbioGuchun Chen
2019-09-13drm/amdgpu/nbio: switch to amdgpu_nbio_ras_late_init helper functionHawking Zhang
2019-09-13drm/amdgpu: add ras_late_init callback function for nbio v7_4 (v3)Hawking Zhang
2019-09-13drm/amdgpu: add ras_controller and err_event_athub interrupt supportHawking Zhang
2019-09-13drm/amdgpu/nbio: add functions to query ras specific interrupt statusHawking Zhang
2019-09-13drm/amdgpu: add new amdgpu nbio header fileHawking Zhang
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-23 07:04:28 +0000