aboutsummaryrefslogtreecommitdiff
path: root/arch/riscv/kernel/setup.c
AgeCommit message (Expand)Author
2021-01-14riscv: Add machine name to kernel boot log and stack dump outputKefeng Wang
2021-01-14riscv: Add numa support for riscv64 platformAtish Patra
2021-01-14riscv: Separate memory init from paging initAtish Patra
2021-01-07riscv: Cleanup sbi function stubs when RISCV_SBI disabledKefeng Wang
2020-12-18Merge tag 'riscv-for-linus-5.11-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds
2020-11-25RISC-V: Protect all kernel sections including init earlyAtish Patra
2020-11-25RISC-V: Initialize SBI earlyAtish Patra
2020-11-25RISC-V: Add missing jump label initializationAnup Patel
2020-11-09RISC-V: Add kernel image sections to the resource treeNick Kossifidis
2020-10-25treewide: Convert macro and uses of __section(foo) to __section("foo")Joe Perches
2020-10-02RISC-V: Add EFI runtime servicesAtish Patra
2020-10-02RISC-V: Add early ioremap supportAtish Patra
2020-10-02RISC-V: Move DT mapping outof fixmapAnup Patel
2020-08-20RISC-V: Remove CLINT related code from timer and archAnup Patel
2020-06-09mm: don't include asm/pgtable.h if linux/mm.h is already includedMike Rapoport
2020-05-18riscv: Allow device trees to be built into the kernelPalmer Dabbelt
2020-03-31RISC-V: Support cpu hotplugAtish Patra
2020-03-31RISC-V: Add basic support for SBI v0.2Atish Patra
2020-03-03riscv: force hart_lottery to put in .sdata sectionZong Li
2020-01-31Merge tag 'riscv-for-linus-5.6-mw0' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds
2020-01-22riscv: Add KASAN supportNick Hu
2020-01-14arch/riscv/setup: Drop dummy_con initializationArvind Sankar
2019-11-17riscv: provide native clint access for M-modeChristoph Hellwig
2019-10-28riscv: add prototypes for assembly language functions from head.SPaul Walmsley
2019-07-09RISC-V: Setup initial page tables in two stagesAnup Patel
2019-05-24treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 120Thomas Gleixner
2019-04-25riscv: cleanup the parse_dtb calling conventionsChristoph Hellwig
2019-03-26RISC-V: Always compile mm/init.c with cmodel=medany and notraceAnup Patel
2019-03-04RISC-V: Fixmap support and MM cleanupsPalmer Dabbelt
2019-03-04arch: riscv: fix logic error in parse_dtbAndreas Schwab
2019-03-04RISC-V: Move cpuid to hartid mapping to SMP.Atish Patra
2019-02-21RISC-V: Move setup_vm() to mm/init.cAnup Patel
2019-02-21RISC-V: Move setup_bootmem() to mm/init.cAnup Patel
2019-02-21RISC-V: Setup init_mm before parse_early_param()Anup Patel
2019-02-11riscv: use pr_info and friendsJohan Hovold
2019-01-23riscv: fixup max_low_pfn with PFN_DOWN.Guo Ren
2019-01-07arch: riscv: support kernel command line forcing when no DTB passedPaul Walmsley
2018-12-17RISC-V: Remove EARLY_PRINTK supportAnup Patel
2018-10-22RISC-V: SMP cleanup and new featuresPalmer Dabbelt
2018-10-22RISC-V: Use Linux logical CPU number instead of hartidAtish Patra
2018-10-22RISC-V: Add logical CPU indexing for RISC-VAtish Patra
2018-10-22RISC-V: Use swiotlb on RV64 onlyZong Li
2018-10-02RISCV: Fix end PFN for low memoryAtish Patra
2018-09-04riscv: Do not overwrite initrd_start and initrd_endGuenter Roeck
2018-08-13RISC-V: Add early printk support via the SBI consolePalmer Dabbelt
2018-07-04riscv: remove unnecessary of_platform_populate callRob Herring
2018-05-19riscv: add swiotlb supportChristoph Hellwig
2018-02-20Rename sbi_save to parse_dtb to improve code readabilityMichael Clark
2018-01-30riscv: add ZONE_DMA32Christoph Hellwig
2018-01-30RISC-V: Remove mem_end command line processingPalmer Dabbelt