| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-05-04 | RISC-V: Add bitmap reprensenting ISA features common across CPUs | Anup Patel |
| 2019-10-28 | riscv: add missing header file includes | Paul Walmsley |
| 2019-06-19 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234 | Thomas Gleixner |
| 2019-03-04 | RISC-V: Assign hwcap as per comman capabilities. | Atish Patra |
| 2019-02-11 | riscv: use for_each_of_cpu_node iterator | Johan Hovold |
| 2019-02-11 | riscv: add missing newlines to printk messages | Johan Hovold |
| 2018-12-21 | RISC-V: Fix of_node_* refcount | Atish Patra |
| 2018-10-31 | RISC-V: properly determine hardware caps | Andreas Schwab |
| 2018-10-22 | riscv: Add support to no-FPU systems | Palmer Dabbelt |
| 2018-10-22 | RISC-V: Mask out the F extension on systems without D | Palmer Dabbelt |
| 2018-10-22 | Auto-detect whether a FPU exists | Alan Kao |
| 2017-09-26 | RISC-V: User-facing API | Palmer Dabbelt |
 |
index : daniel.thompson/linux.git | |
| Personal repo for development and upstreaming. Contains significant work on NMI/FIQ. |
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