| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-05-04 | RISC-V: Add bitmap reprensenting ISA features common across CPUs | Anup Patel |
| 2019-11-12 | riscv: clean up the macro format in each header file | Zong Li |
| 2019-06-19 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234 | Thomas Gleixner |
| 2017-09-26 | RISC-V: ELF and module implementation | Palmer Dabbelt |
 |
index : daniel.thompson/linux.git | |
| Personal repo for development and upstreaming. Contains significant work on NMI/FIQ. |
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