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authorStefan Agner <stefan@agner.ch>2016-04-04 22:28:33 -0700
committerShawn Guo <shawnguo@kernel.org>2016-04-12 09:21:53 +0800
commit3218b21ab07f066c99537fbbf2b4dc331b842246 (patch)
treee493fa5c510667a53c1c8af399768b5febe2a5d3 /include/dt-bindings/clock/vf610-clock.h
parent4aba2755b8e8abbe29a12d18523d97c27bf53183 (diff)
clk: imx: vf610: fix DCU clock tree
Similar to an earlier fix for the SAI clocks, the DCU clock hierarchy mixes the bus clock with the display controllers pixel clock. Tests have shown that the gates in CCM_CCGR3/9 registers do not control the DCU pixel clock, but only the register access clock (bus clock). Fix this by defining the parent clock of VF610_CLK_DCUx to be the bus clock (ipg_bus). Since the clock has not been used far, there are no further changes needed. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'include/dt-bindings/clock/vf610-clock.h')
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